1 // SPDX-License-Identifier: GPL-2.0 <<
2 /********************************************* 1 /***************************************************************************/
3 2
4 /* 3 /*
5 * cache.c -- general ColdFire Cache main 4 * cache.c -- general ColdFire Cache maintenance code
6 * 5 *
7 * Copyright (C) 2010, Greg Ungerer (gerg 6 * Copyright (C) 2010, Greg Ungerer (gerg@snapgear.com)
8 */ 7 */
9 8
10 /********************************************* 9 /***************************************************************************/
11 10
12 #include <linux/kernel.h> 11 #include <linux/kernel.h>
13 #include <asm/coldfire.h> 12 #include <asm/coldfire.h>
14 #include <asm/mcfsim.h> 13 #include <asm/mcfsim.h>
15 14
16 /********************************************* 15 /***************************************************************************/
17 #ifdef CACHE_PUSH 16 #ifdef CACHE_PUSH
18 /********************************************* 17 /***************************************************************************/
19 18
20 /* 19 /*
21 * Use cpushl to push all dirty cache lin 20 * Use cpushl to push all dirty cache lines back to memory.
22 * Older versions of GAS don't seem to kn 21 * Older versions of GAS don't seem to know how to generate the
23 * ColdFire cpushl instruction... Oh well 22 * ColdFire cpushl instruction... Oh well, bit stuff it for now.
24 */ 23 */
25 24
26 void mcf_cache_push(void) 25 void mcf_cache_push(void)
27 { 26 {
28 __asm__ __volatile__ ( 27 __asm__ __volatile__ (
29 "clrl %%d0\n\t" 28 "clrl %%d0\n\t"
30 "1:\n\t" 29 "1:\n\t"
31 "movel %%d0,%%a0\n\t" 30 "movel %%d0,%%a0\n\t"
32 "2:\n\t" 31 "2:\n\t"
33 ".word 0xf468\n\t" 32 ".word 0xf468\n\t"
34 "addl %0,%%a0\n\t" 33 "addl %0,%%a0\n\t"
35 "cmpl %1,%%a0\n\t" 34 "cmpl %1,%%a0\n\t"
36 "blt 2b\n\t" 35 "blt 2b\n\t"
37 "addql #1,%%d0\n\t" 36 "addql #1,%%d0\n\t"
38 "cmpil %2,%%d0\n\t" 37 "cmpil %2,%%d0\n\t"
39 "bne 1b\n\t" 38 "bne 1b\n\t"
40 : /* No output */ 39 : /* No output */
41 : "i" (CACHE_LINE_SIZE), 40 : "i" (CACHE_LINE_SIZE),
42 "i" (DCACHE_SIZE / CACHE_WAY 41 "i" (DCACHE_SIZE / CACHE_WAYS),
43 "i" (CACHE_WAYS) 42 "i" (CACHE_WAYS)
44 : "d0", "a0" ); 43 : "d0", "a0" );
45 } 44 }
46 45
47 /********************************************* 46 /***************************************************************************/
48 #endif /* CACHE_PUSH */ 47 #endif /* CACHE_PUSH */
49 /********************************************* 48 /***************************************************************************/
50 49
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