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Linux/arch/m68k/coldfire/m5272.c

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Diff markup

Differences between /arch/m68k/coldfire/m5272.c (Version linux-6.12-rc7) and /arch/m68k/coldfire/m5272.c (Version linux-4.10.17)


  1 // SPDX-License-Identifier: GPL-2.0            << 
  2 /*********************************************      1 /***************************************************************************/
  3                                                     2 
  4 /*                                                  3 /*
  5  *      m5272.c  -- platform support for ColdF      4  *      m5272.c  -- platform support for ColdFire 5272 based boards
  6  *                                                  5  *
  7  *      Copyright (C) 1999-2002, Greg Ungerer       6  *      Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
  8  *      Copyright (C) 2001-2002, SnapGear Inc.      7  *      Copyright (C) 2001-2002, SnapGear Inc. (www.snapgear.com)
  9  */                                                 8  */
 10                                                     9 
 11 /*********************************************     10 /***************************************************************************/
 12                                                    11 
 13 #include <linux/clkdev.h>                      << 
 14 #include <linux/kernel.h>                          12 #include <linux/kernel.h>
 15 #include <linux/param.h>                           13 #include <linux/param.h>
 16 #include <linux/init.h>                            14 #include <linux/init.h>
 17 #include <linux/io.h>                              15 #include <linux/io.h>
 18 #include <linux/phy.h>                             16 #include <linux/phy.h>
 19 #include <linux/phy_fixed.h>                       17 #include <linux/phy_fixed.h>
 20 #include <asm/machdep.h>                           18 #include <asm/machdep.h>
 21 #include <asm/coldfire.h>                          19 #include <asm/coldfire.h>
 22 #include <asm/mcfsim.h>                            20 #include <asm/mcfsim.h>
 23 #include <asm/mcfuart.h>                           21 #include <asm/mcfuart.h>
 24 #include <asm/mcfclk.h>                            22 #include <asm/mcfclk.h>
 25                                                    23 
 26 /*********************************************     24 /***************************************************************************/
 27                                                    25 
 28 /*                                                 26 /*
 29  *      Some platforms need software versions      27  *      Some platforms need software versions of the GPIO data registers.
 30  */                                                28  */
 31 unsigned short ppdata;                             29 unsigned short ppdata;
 32 unsigned char ledbank = 0xff;                      30 unsigned char ledbank = 0xff;
 33                                                    31 
 34 /*********************************************     32 /***************************************************************************/
 35                                                    33 
 36 DEFINE_CLK(pll, "pll.0", MCF_CLK);                 34 DEFINE_CLK(pll, "pll.0", MCF_CLK);
 37 DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);              35 DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
 38                                                !!  36 DEFINE_CLK(mcftmr0, "mcftmr.0", MCF_BUSCLK);
 39 static struct clk_lookup m5272_clk_lookup[] =  !!  37 DEFINE_CLK(mcftmr1, "mcftmr.1", MCF_BUSCLK);
 40         CLKDEV_INIT(NULL, "pll.0", &clk_pll),  !!  38 DEFINE_CLK(mcftmr2, "mcftmr.2", MCF_BUSCLK);
 41         CLKDEV_INIT(NULL, "sys.0", &clk_sys),  !!  39 DEFINE_CLK(mcftmr3, "mcftmr.3", MCF_BUSCLK);
 42         CLKDEV_INIT("mcftmr.0", NULL, &clk_sys !!  40 DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK);
 43         CLKDEV_INIT("mcftmr.1", NULL, &clk_sys !!  41 DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK);
 44         CLKDEV_INIT("mcftmr.2", NULL, &clk_sys !!  42 DEFINE_CLK(mcfqspi0, "mcfqspi.0", MCF_BUSCLK);
 45         CLKDEV_INIT("mcftmr.3", NULL, &clk_sys !!  43 DEFINE_CLK(fec0, "fec.0", MCF_BUSCLK);
 46         CLKDEV_INIT("mcfuart.0", NULL, &clk_sy !!  44 
 47         CLKDEV_INIT("mcfuart.1", NULL, &clk_sy !!  45 struct clk *mcf_clks[] = {
 48         CLKDEV_INIT("mcfqspi.0", NULL, &clk_sy !!  46         &clk_pll,
 49         CLKDEV_INIT("fec.0", NULL, &clk_sys),  !!  47         &clk_sys,
                                                   >>  48         &clk_mcftmr0,
                                                   >>  49         &clk_mcftmr1,
                                                   >>  50         &clk_mcftmr2,
                                                   >>  51         &clk_mcftmr3,
                                                   >>  52         &clk_mcfuart0,
                                                   >>  53         &clk_mcfuart1,
                                                   >>  54         &clk_mcfqspi0,
                                                   >>  55         &clk_fec0,
                                                   >>  56         NULL
 50 };                                                 57 };
 51                                                    58 
 52 /*********************************************     59 /***************************************************************************/
 53                                                    60 
 54 static void __init m5272_uarts_init(void)          61 static void __init m5272_uarts_init(void)
 55 {                                                  62 {
 56         u32 v;                                     63         u32 v;
 57                                                    64 
 58         /* Enable the output lines for the ser     65         /* Enable the output lines for the serial ports */
 59         v = readl(MCFSIM_PBCNT);                   66         v = readl(MCFSIM_PBCNT);
 60         v = (v & ~0x000000ff) | 0x00000055;        67         v = (v & ~0x000000ff) | 0x00000055;
 61         writel(v, MCFSIM_PBCNT);                   68         writel(v, MCFSIM_PBCNT);
 62                                                    69 
 63         v = readl(MCFSIM_PDCNT);                   70         v = readl(MCFSIM_PDCNT);
 64         v = (v & ~0x000003fc) | 0x000002a8;        71         v = (v & ~0x000003fc) | 0x000002a8;
 65         writel(v, MCFSIM_PDCNT);                   72         writel(v, MCFSIM_PDCNT);
 66 }                                                  73 }
 67                                                    74 
 68 /*********************************************     75 /***************************************************************************/
 69                                                    76 
 70 static void m5272_cpu_reset(void)                  77 static void m5272_cpu_reset(void)
 71 {                                                  78 {
 72         local_irq_disable();                       79         local_irq_disable();
 73         /* Set watchdog to reset, and enabled      80         /* Set watchdog to reset, and enabled */
 74         __raw_writew(0, MCFSIM_WIRR);              81         __raw_writew(0, MCFSIM_WIRR);
 75         __raw_writew(1, MCFSIM_WRRR);              82         __raw_writew(1, MCFSIM_WRRR);
 76         __raw_writew(0, MCFSIM_WCR);               83         __raw_writew(0, MCFSIM_WCR);
 77         for (;;)                                   84         for (;;)
 78                 /* wait for watchdog to timeou     85                 /* wait for watchdog to timeout */;
 79 }                                                  86 }
 80                                                    87 
 81 /*********************************************     88 /***************************************************************************/
 82                                                    89 
 83 void __init config_BSP(char *commandp, int siz     90 void __init config_BSP(char *commandp, int size)
 84 {                                                  91 {
 85 #if defined (CONFIG_MOD5272)                       92 #if defined (CONFIG_MOD5272)
 86         /* Set base of device vectors to be 64     93         /* Set base of device vectors to be 64 */
 87         writeb(0x40, MCFSIM_PIVR);                 94         writeb(0x40, MCFSIM_PIVR);
 88 #endif                                             95 #endif
 89                                                    96 
 90 #if defined(CONFIG_NETtel) || defined(CONFIG_S     97 #if defined(CONFIG_NETtel) || defined(CONFIG_SCALES)
 91         /* Copy command line from FLASH to loc     98         /* Copy command line from FLASH to local buffer... */
 92         memcpy(commandp, (char *) 0xf0004000,      99         memcpy(commandp, (char *) 0xf0004000, size);
 93         commandp[size-1] = 0;                     100         commandp[size-1] = 0;
 94 #elif defined(CONFIG_CANCam)                      101 #elif defined(CONFIG_CANCam)
 95         /* Copy command line from FLASH to loc    102         /* Copy command line from FLASH to local buffer... */
 96         memcpy(commandp, (char *) 0xf0010000,     103         memcpy(commandp, (char *) 0xf0010000, size);
 97         commandp[size-1] = 0;                     104         commandp[size-1] = 0;
 98 #endif                                            105 #endif
 99                                                   106 
100         mach_reset = m5272_cpu_reset;             107         mach_reset = m5272_cpu_reset;
101         mach_sched_init = hw_timer_init;          108         mach_sched_init = hw_timer_init;
102 }                                                 109 }
103                                                   110 
104 /*********************************************    111 /***************************************************************************/
105                                                   112 
106 /*                                                113 /*
107  * Some 5272 based boards have the FEC etherne    114  * Some 5272 based boards have the FEC ethernet directly connected to
108  * an ethernet switch. In this case we need to    115  * an ethernet switch. In this case we need to use the fixed phy type,
109  * and we need to declare it early in boot.       116  * and we need to declare it early in boot.
110  */                                               117  */
111 static struct fixed_phy_status nettel_fixed_ph    118 static struct fixed_phy_status nettel_fixed_phy_status __initdata = {
112         .link   = 1,                              119         .link   = 1,
113         .speed  = 100,                            120         .speed  = 100,
114         .duplex = 0,                              121         .duplex = 0,
115 };                                                122 };
116                                                   123 
117 /*********************************************    124 /***************************************************************************/
118                                                   125 
119 static int __init init_BSP(void)                  126 static int __init init_BSP(void)
120 {                                                 127 {
121         m5272_uarts_init();                       128         m5272_uarts_init();
122         fixed_phy_add(PHY_POLL, 0, &nettel_fix !! 129         fixed_phy_add(PHY_POLL, 0, &nettel_fixed_phy_status, -1);
123         clkdev_add_table(m5272_clk_lookup, ARR << 
124         return 0;                                 130         return 0;
125 }                                                 131 }
126                                                   132 
127 arch_initcall(init_BSP);                          133 arch_initcall(init_BSP);
128                                                   134 
129 /*********************************************    135 /***************************************************************************/
130                                                   136 

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