1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /********************************************* 2 /***************************************************************************/
3 3
4 /* 4 /*
5 * m5272.c -- platform support for ColdF 5 * m5272.c -- platform support for ColdFire 5272 based boards
6 * 6 *
7 * Copyright (C) 1999-2002, Greg Ungerer 7 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
8 * Copyright (C) 2001-2002, SnapGear Inc. 8 * Copyright (C) 2001-2002, SnapGear Inc. (www.snapgear.com)
9 */ 9 */
10 10
11 /********************************************* 11 /***************************************************************************/
12 12
13 #include <linux/clkdev.h> <<
14 #include <linux/kernel.h> 13 #include <linux/kernel.h>
15 #include <linux/param.h> 14 #include <linux/param.h>
16 #include <linux/init.h> 15 #include <linux/init.h>
17 #include <linux/io.h> 16 #include <linux/io.h>
18 #include <linux/phy.h> 17 #include <linux/phy.h>
19 #include <linux/phy_fixed.h> 18 #include <linux/phy_fixed.h>
20 #include <asm/machdep.h> 19 #include <asm/machdep.h>
21 #include <asm/coldfire.h> 20 #include <asm/coldfire.h>
22 #include <asm/mcfsim.h> 21 #include <asm/mcfsim.h>
23 #include <asm/mcfuart.h> 22 #include <asm/mcfuart.h>
24 #include <asm/mcfclk.h> 23 #include <asm/mcfclk.h>
25 24
26 /********************************************* 25 /***************************************************************************/
27 26
28 /* 27 /*
29 * Some platforms need software versions 28 * Some platforms need software versions of the GPIO data registers.
30 */ 29 */
31 unsigned short ppdata; 30 unsigned short ppdata;
32 unsigned char ledbank = 0xff; 31 unsigned char ledbank = 0xff;
33 32
34 /********************************************* 33 /***************************************************************************/
35 34
36 DEFINE_CLK(pll, "pll.0", MCF_CLK); 35 DEFINE_CLK(pll, "pll.0", MCF_CLK);
37 DEFINE_CLK(sys, "sys.0", MCF_BUSCLK); 36 DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
38 !! 37 DEFINE_CLK(mcftmr0, "mcftmr.0", MCF_BUSCLK);
39 static struct clk_lookup m5272_clk_lookup[] = !! 38 DEFINE_CLK(mcftmr1, "mcftmr.1", MCF_BUSCLK);
40 CLKDEV_INIT(NULL, "pll.0", &clk_pll), !! 39 DEFINE_CLK(mcftmr2, "mcftmr.2", MCF_BUSCLK);
41 CLKDEV_INIT(NULL, "sys.0", &clk_sys), !! 40 DEFINE_CLK(mcftmr3, "mcftmr.3", MCF_BUSCLK);
42 CLKDEV_INIT("mcftmr.0", NULL, &clk_sys !! 41 DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK);
43 CLKDEV_INIT("mcftmr.1", NULL, &clk_sys !! 42 DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK);
44 CLKDEV_INIT("mcftmr.2", NULL, &clk_sys !! 43 DEFINE_CLK(mcfqspi0, "mcfqspi.0", MCF_BUSCLK);
45 CLKDEV_INIT("mcftmr.3", NULL, &clk_sys !! 44 DEFINE_CLK(fec0, "fec.0", MCF_BUSCLK);
46 CLKDEV_INIT("mcfuart.0", NULL, &clk_sy !! 45
47 CLKDEV_INIT("mcfuart.1", NULL, &clk_sy !! 46 struct clk *mcf_clks[] = {
48 CLKDEV_INIT("mcfqspi.0", NULL, &clk_sy !! 47 &clk_pll,
49 CLKDEV_INIT("fec.0", NULL, &clk_sys), !! 48 &clk_sys,
>> 49 &clk_mcftmr0,
>> 50 &clk_mcftmr1,
>> 51 &clk_mcftmr2,
>> 52 &clk_mcftmr3,
>> 53 &clk_mcfuart0,
>> 54 &clk_mcfuart1,
>> 55 &clk_mcfqspi0,
>> 56 &clk_fec0,
>> 57 NULL
50 }; 58 };
51 59
52 /********************************************* 60 /***************************************************************************/
53 61
54 static void __init m5272_uarts_init(void) 62 static void __init m5272_uarts_init(void)
55 { 63 {
56 u32 v; 64 u32 v;
57 65
58 /* Enable the output lines for the ser 66 /* Enable the output lines for the serial ports */
59 v = readl(MCFSIM_PBCNT); 67 v = readl(MCFSIM_PBCNT);
60 v = (v & ~0x000000ff) | 0x00000055; 68 v = (v & ~0x000000ff) | 0x00000055;
61 writel(v, MCFSIM_PBCNT); 69 writel(v, MCFSIM_PBCNT);
62 70
63 v = readl(MCFSIM_PDCNT); 71 v = readl(MCFSIM_PDCNT);
64 v = (v & ~0x000003fc) | 0x000002a8; 72 v = (v & ~0x000003fc) | 0x000002a8;
65 writel(v, MCFSIM_PDCNT); 73 writel(v, MCFSIM_PDCNT);
66 } 74 }
67 75
68 /********************************************* 76 /***************************************************************************/
69 77
70 static void m5272_cpu_reset(void) 78 static void m5272_cpu_reset(void)
71 { 79 {
72 local_irq_disable(); 80 local_irq_disable();
73 /* Set watchdog to reset, and enabled 81 /* Set watchdog to reset, and enabled */
74 __raw_writew(0, MCFSIM_WIRR); 82 __raw_writew(0, MCFSIM_WIRR);
75 __raw_writew(1, MCFSIM_WRRR); 83 __raw_writew(1, MCFSIM_WRRR);
76 __raw_writew(0, MCFSIM_WCR); 84 __raw_writew(0, MCFSIM_WCR);
77 for (;;) 85 for (;;)
78 /* wait for watchdog to timeou 86 /* wait for watchdog to timeout */;
79 } 87 }
80 88
81 /********************************************* 89 /***************************************************************************/
82 90
83 void __init config_BSP(char *commandp, int siz 91 void __init config_BSP(char *commandp, int size)
84 { 92 {
85 #if defined (CONFIG_MOD5272) 93 #if defined (CONFIG_MOD5272)
86 /* Set base of device vectors to be 64 94 /* Set base of device vectors to be 64 */
87 writeb(0x40, MCFSIM_PIVR); 95 writeb(0x40, MCFSIM_PIVR);
88 #endif 96 #endif
89 97
90 #if defined(CONFIG_NETtel) || defined(CONFIG_S 98 #if defined(CONFIG_NETtel) || defined(CONFIG_SCALES)
91 /* Copy command line from FLASH to loc 99 /* Copy command line from FLASH to local buffer... */
92 memcpy(commandp, (char *) 0xf0004000, 100 memcpy(commandp, (char *) 0xf0004000, size);
93 commandp[size-1] = 0; 101 commandp[size-1] = 0;
94 #elif defined(CONFIG_CANCam) 102 #elif defined(CONFIG_CANCam)
95 /* Copy command line from FLASH to loc 103 /* Copy command line from FLASH to local buffer... */
96 memcpy(commandp, (char *) 0xf0010000, 104 memcpy(commandp, (char *) 0xf0010000, size);
97 commandp[size-1] = 0; 105 commandp[size-1] = 0;
98 #endif 106 #endif
99 107
100 mach_reset = m5272_cpu_reset; 108 mach_reset = m5272_cpu_reset;
101 mach_sched_init = hw_timer_init; 109 mach_sched_init = hw_timer_init;
102 } 110 }
103 111
104 /********************************************* 112 /***************************************************************************/
105 113
106 /* 114 /*
107 * Some 5272 based boards have the FEC etherne 115 * Some 5272 based boards have the FEC ethernet directly connected to
108 * an ethernet switch. In this case we need to 116 * an ethernet switch. In this case we need to use the fixed phy type,
109 * and we need to declare it early in boot. 117 * and we need to declare it early in boot.
110 */ 118 */
111 static struct fixed_phy_status nettel_fixed_ph 119 static struct fixed_phy_status nettel_fixed_phy_status __initdata = {
112 .link = 1, 120 .link = 1,
113 .speed = 100, 121 .speed = 100,
114 .duplex = 0, 122 .duplex = 0,
115 }; 123 };
116 124
117 /********************************************* 125 /***************************************************************************/
118 126
119 static int __init init_BSP(void) 127 static int __init init_BSP(void)
120 { 128 {
121 m5272_uarts_init(); 129 m5272_uarts_init();
122 fixed_phy_add(PHY_POLL, 0, &nettel_fix 130 fixed_phy_add(PHY_POLL, 0, &nettel_fixed_phy_status);
123 clkdev_add_table(m5272_clk_lookup, ARR <<
124 return 0; 131 return 0;
125 } 132 }
126 133
127 arch_initcall(init_BSP); 134 arch_initcall(init_BSP);
128 135
129 /********************************************* 136 /***************************************************************************/
130 137
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