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Linux/arch/m68k/fpsp040/smovecr.S

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Diff markup

Differences between /arch/m68k/fpsp040/smovecr.S (Architecture sparc64) and /arch/alpha/fpsp040/smovecr.S (Architecture alpha)


  1 |                                                 
  2 |       smovecr.sa 3.1 12/10/90                   
  3 |                                                 
  4 |       The entry point sMOVECR returns the co    
  5 |       offset given in the instruction field.    
  6 |                                                 
  7 |       Input: An offset in the instruction wo    
  8 |                                                 
  9 |       Output: The constant rounded to the us    
 10 |               mode unchecked for overflow.      
 11 |                                                 
 12 |       Modified: fp0.                            
 13 |                                                 
 14 |                                                 
 15 |               Copyright (C) Motorola, Inc. 1    
 16 |                       All Rights Reserved       
 17 |                                                 
 18 |       For details on the license for this fi    
 19 |       file, README, in this same directory.     
 20                                                   
 21 |SMOVECR        idnt    2,1 | Motorola 040 Flo    
 22                                                   
 23         |section 8                                
 24                                                   
 25 #include "fpsp.h"                                 
 26                                                   
 27         |xref   nrm_set                           
 28         |xref   round                             
 29         |xref   PIRN                              
 30         |xref   PIRZRM                            
 31         |xref   PIRP                              
 32         |xref   SMALRN                            
 33         |xref   SMALRZRM                          
 34         |xref   SMALRP                            
 35         |xref   BIGRN                             
 36         |xref   BIGRZRM                           
 37         |xref   BIGRP                             
 38                                                   
 39 FZERO:  .long   00000000                          
 40 |                                                 
 41 |       FMOVECR                                   
 42 |                                                 
 43         .global smovcr                            
 44 smovcr:                                           
 45         bfextu  CMDREG1B(%a6){#9:#7},%d0 |get     
 46         bfextu  USER_FPCR(%a6){#26:#2},%d1 |ge    
 47 |                                                 
 48 | check range of offset                           
 49 |                                                 
 50         tstb    %d0             |if zero, offs    
 51         beqs    PI_TBL          |it is pi         
 52         cmpib   #0x0a,%d0               |check    
 53         bles    Z_VAL           |if in this ra    
 54         cmpib   #0x0e,%d0               |check    
 55         bles    SM_TBL          |valid constan    
 56         cmpib   #0x2f,%d0               |check    
 57         bles    Z_VAL           |if in this ra    
 58         cmpib   #0x3f,%d0               |check    
 59         ble     BG_TBL          |valid constan    
 60 Z_VAL:                                            
 61         fmoves  FZERO,%fp0                        
 62         rts                                       
 63 PI_TBL:                                           
 64         tstb    %d1             |offset is zer    
 65         beqs    PI_RN           |if zero, rn m    
 66         cmpib   #0x3,%d1                |check    
 67         beqs    PI_RP           |if 3, rp mode    
 68 PI_RZRM:                                          
 69         leal    PIRZRM,%a0      |rmode is rz o    
 70         bra     set_finx                          
 71 PI_RN:                                            
 72         leal    PIRN,%a0                |rmode    
 73         bra     set_finx                          
 74 PI_RP:                                            
 75         leal    PIRP,%a0                |rmode    
 76         bra     set_finx                          
 77 SM_TBL:                                           
 78         subil   #0xb,%d0                |make     
 79         tstb    %d1             |check for rmo    
 80         beqs    SM_RN           |if zero, rn m    
 81         cmpib   #0x3,%d1                |check    
 82         beqs    SM_RP           |if 3, rp mode    
 83 SM_RZRM:                                          
 84         leal    SMALRZRM,%a0    |rmode is rz o    
 85         cmpib   #0x2,%d0                |check    
 86         ble     set_finx        |if 0 - 2, it     
 87         bra     no_finx         |if 3, it is e    
 88 SM_RN:                                            
 89         leal    SMALRN,%a0      |rmode is rn,     
 90         cmpib   #0x2,%d0                |check    
 91         ble     set_finx        |if 0 - 2, it     
 92         bra     no_finx         |if 3, it is e    
 93 SM_RP:                                            
 94         leal    SMALRP,%a0      |rmode is rp,     
 95         cmpib   #0x2,%d0                |check    
 96         ble     set_finx        |if 0 - 2, it     
 97         bra     no_finx         |if 3, it is e    
 98 BG_TBL:                                           
 99         subil   #0x30,%d0               |make     
100         tstb    %d1             |check for rmo    
101         beqs    BG_RN           |if zero, rn m    
102         cmpib   #0x3,%d1                |check    
103         beqs    BG_RP           |if 3, rp mode    
104 BG_RZRM:                                          
105         leal    BIGRZRM,%a0     |rmode is rz o    
106         cmpib   #0x1,%d0                |check    
107         ble     set_finx        |if 0 - 1, it     
108         cmpib   #0x7,%d0                |secon    
109         ble     no_finx         |if 0 - 7, it     
110         bra     set_finx        |if 8 - f, it     
111 BG_RN:                                            
112         leal    BIGRN,%a0       |rmode is rn,     
113         cmpib   #0x1,%d0                |check    
114         ble     set_finx        |if 0 - 1, it     
115         cmpib   #0x7,%d0                |secon    
116         ble     no_finx         |if 0 - 7, it     
117         bra     set_finx        |if 8 - f, it     
118 BG_RP:                                            
119         leal    BIGRP,%a0       |rmode is rp,     
120         cmpib   #0x1,%d0                |check    
121         ble     set_finx        |if 0 - 1, it     
122         cmpib   #0x7,%d0                |secon    
123         ble     no_finx         |if 0 - 7, it     
124 |       bra     set_finx        ;if 8 - f, it     
125 set_finx:                                         
126         orl     #inx2a_mask,USER_FPSR(%a6) |se    
127 no_finx:                                          
128         mulul   #12,%d0                 |use o    
129         movel   %d1,L_SCR1(%a6)         |load     
130         bfextu  USER_FPCR(%a6){#24:#2},%d1        
131         tstl    %d1                     |check    
132 |                                                 
133 | Precision is extended                           
134 |                                                 
135         bnes    not_ext                 |if ex    
136         fmovemx (%a0,%d0),%fp0-%fp0               
137         rts                                       
138 |                                                 
139 | Precision is single or double                   
140 |                                                 
141 not_ext:                                          
142         swap    %d1                     |rnd p    
143         addl    L_SCR1(%a6),%d1         |merge    
144         movel   (%a0,%d0),FP_SCR1(%a6)  |load     
145         movel   4(%a0,%d0),FP_SCR1+4(%a6)         
146         movel   8(%a0,%d0),FP_SCR1+8(%a6)         
147         clrl    %d0                     |clear    
148         lea     FP_SCR1(%a6),%a0                  
149         btstb   #sign_bit,LOCAL_EX(%a0)           
150         sne     LOCAL_SGN(%a0)          |conve    
151                                                   
152         bsr     round                   |go ro    
153                                                   
154         bfclr   LOCAL_SGN(%a0){#0:#8}   |conve    
155         beqs    fin_fcr                           
156         bsetb   #sign_bit,LOCAL_EX(%a0)           
157 fin_fcr:                                          
158         fmovemx (%a0),%fp0-%fp0                   
159         rts                                       
160                                                   
161         |end                                      
                                                      

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