1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2 MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GR 2 MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
3 M68000 Hi-Performance Microprocessor Division 3 M68000 Hi-Performance Microprocessor Division
4 M68060 Software Package 4 M68060 Software Package
5 Production Release P1.00 -- October 10, 1994 5 Production Release P1.00 -- October 10, 1994
6 6
7 M68060 Software Package Copyright © 1993, 199 7 M68060 Software Package Copyright © 1993, 1994 Motorola Inc. All rights reserved.
8 8
9 THE SOFTWARE is provided on an "AS IS" basis a 9 THE SOFTWARE is provided on an "AS IS" basis and without warranty.
10 To the maximum extent permitted by applicable 10 To the maximum extent permitted by applicable law,
11 MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPR 11 MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
12 INCLUDING IMPLIED WARRANTIES OF MERCHANTABILIT 12 INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
13 and any warranty against infringement with reg 13 and any warranty against infringement with regard to the SOFTWARE
14 (INCLUDING ANY MODIFIED VERSIONS THEREOF) and 14 (INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.
15 15
16 To the maximum extent permitted by applicable 16 To the maximum extent permitted by applicable law,
17 IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY D 17 IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
18 (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOS 18 (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
19 BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORM 19 BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
20 ARISING OF THE USE OR INABILITY TO USE THE SOF 20 ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
21 Motorola assumes no responsibility for the mai 21 Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.
22 22
23 You are hereby granted a copyright license to 23 You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
24 so long as this entire notice is retained with 24 so long as this entire notice is retained without alteration in any modified and/or
25 redistributed versions, and that such modified 25 redistributed versions, and that such modified versions are clearly identified as such.
26 No licenses are granted by implication, estopp 26 No licenses are granted by implication, estoppel or otherwise under any patents
27 or trademarks of Motorola, Inc. 27 or trademarks of Motorola, Inc.
28 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 28 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
29 29
30 68060 FLOATING-POINT SOFTWARE PACKAGE (Library 30 68060 FLOATING-POINT SOFTWARE PACKAGE (Library version)
31 ---------------------------------------------- 31 --------------------------------------------------------
32 32
33 The file fplsp.sa contains the "Library versio 33 The file fplsp.sa contains the "Library version" of the
34 68060SP Floating-Point Software Package. The r 34 68060SP Floating-Point Software Package. The routines
35 included in this module can be used to emulate 35 included in this module can be used to emulate the
36 FP instructions not implemented in 68060 hardw 36 FP instructions not implemented in 68060 hardware. These
37 instructions normally take exception vector #1 37 instructions normally take exception vector #11
38 "FP Unimplemented Instruction". 38 "FP Unimplemented Instruction".
39 39
40 By re-compiling a program that uses these inst 40 By re-compiling a program that uses these instructions, and
41 making subroutine calls in place of the unimpl 41 making subroutine calls in place of the unimplemented
42 instructions, a program can avoid the overhead 42 instructions, a program can avoid the overhead associated
43 with taking the exception. 43 with taking the exception.
44 44
45 Release file format: 45 Release file format:
46 -------------------- 46 --------------------
47 The file fplsp.sa is essentially a hexadecimal 47 The file fplsp.sa is essentially a hexadecimal image of the
48 release package. This is the ONLY format which 48 release package. This is the ONLY format which will be supported.
49 The hex image was created by assembling the so 49 The hex image was created by assembling the source code and
50 then converting the resulting binary output im 50 then converting the resulting binary output image into an
51 ASCII text file. The hexadecimal numbers are l 51 ASCII text file. The hexadecimal numbers are listed
52 using the Motorola Assembly Syntax assembler d 52 using the Motorola Assembly Syntax assembler directive "dc.l"
53 (define constant longword). The file can be co 53 (define constant longword). The file can be converted to other
54 assembly syntaxes by using any word processor 54 assembly syntaxes by using any word processor with a global
55 search and replace function. 55 search and replace function.
56 56
57 To assist in assembling and linking this modul 57 To assist in assembling and linking this module with other modules,
58 the installer should add a symbolic label to t 58 the installer should add a symbolic label to the top of the file.
59 This will allow calling routines to access the 59 This will allow calling routines to access the entry points
60 of this package. 60 of this package.
61 61
62 The source code fplsp.s has also been included 62 The source code fplsp.s has also been included but only for
63 documentation purposes. 63 documentation purposes.
64 64
65 Release file structure: 65 Release file structure:
66 ----------------------- 66 -----------------------
67 The file fplsp.sa contains an "Entry-Point" se 67 The file fplsp.sa contains an "Entry-Point" section and a
68 code section. The FPLSP has no "Call-Out" sect 68 code section. The FPLSP has no "Call-Out" section. The first section
69 is the "Entry-Point" section. In order to acce 69 is the "Entry-Point" section. In order to access a function in the
70 package, a program must "bsr" or "jsr" to the 70 package, a program must "bsr" or "jsr" to the location listed
71 below in "68060FPLSP entry points" that corres 71 below in "68060FPLSP entry points" that corresponds to the desired
72 function. A branch instruction located at the 72 function. A branch instruction located at the selected entry point
73 within the package will then enter the correct 73 within the package will then enter the correct emulation code routine.
74 74
75 The entry point addresses at the beginning of 75 The entry point addresses at the beginning of the package will remain
76 fixed so that a program calling the routines w 76 fixed so that a program calling the routines will not have to be
77 re-compiled with every new 68060FPLSP release. 77 re-compiled with every new 68060FPLSP release.
78 78
79 There are 3 entry-points for each instruction 79 There are 3 entry-points for each instruction type: single precision,
80 double precision, and extended precision. 80 double precision, and extended precision.
81 81
82 As an example, the "fsin" library instruction 82 As an example, the "fsin" library instruction can be passed an
83 extended precision operand if program executes 83 extended precision operand if program executes:
84 84
85 # fsin.x fp0 85 # fsin.x fp0
86 86
87 fmovm.x &0x01,-(%sp) # pass operand 87 fmovm.x &0x01,-(%sp) # pass operand on stack
88 bsr.l _060FPLSP_TOP+0x1a8 # branch t 88 bsr.l _060FPLSP_TOP+0x1a8 # branch to fsin routine
89 add.l &0xc,%sp # clear operan 89 add.l &0xc,%sp # clear operand from stack
90 90
91 Upon return, fp0 holds the correct result. The 91 Upon return, fp0 holds the correct result. The FPSR is
92 set correctly. The FPCR is unchanged. The FPIA 92 set correctly. The FPCR is unchanged. The FPIAR is undefined.
93 93
94 Another example. This time, a dyadic operation 94 Another example. This time, a dyadic operation:
95 95
96 # frem.s %fp1,%fp0 96 # frem.s %fp1,%fp0
97 97
98 fmov.s %fp1,-(%sp) # pass src ope 98 fmov.s %fp1,-(%sp) # pass src operand
99 fmov.s %fp0,-(%sp) # pass dst ope 99 fmov.s %fp0,-(%sp) # pass dst operand
100 bsr.l _060FPLSP_TOP+0x168 # branch t 100 bsr.l _060FPLSP_TOP+0x168 # branch to frem routine
101 addq.l &0x8,%sp # clear operan 101 addq.l &0x8,%sp # clear operands from stack
102 102
103 Again, the result is returned in fp0. Note tha 103 Again, the result is returned in fp0. Note that BOTH operands
104 are passed in single precision format. 104 are passed in single precision format.
105 105
106 Exception reporting: 106 Exception reporting:
107 -------------------- 107 --------------------
108 The package takes exceptions according to the 108 The package takes exceptions according to the FPCR value upon subroutine
109 entry. If an exception should be reported, the 109 entry. If an exception should be reported, then the package forces
110 this exception using implemented floating-poin 110 this exception using implemented floating-point instructions.
111 For example, if the instruction being emulated 111 For example, if the instruction being emulated should cause a
112 floating-point Operand Error exception, then t 112 floating-point Operand Error exception, then the library routine
113 executes an FMUL of a zero and an infinity to 113 executes an FMUL of a zero and an infinity to force the OPERR
114 exception. Although the FPIAR will be undefine 114 exception. Although the FPIAR will be undefined for the enabled
115 Operand Error exception handler, the user will 115 Operand Error exception handler, the user will at least be able
116 to record that the event occurred. 116 to record that the event occurred.
117 117
118 Miscellaneous: 118 Miscellaneous:
119 -------------- 119 --------------
120 The package does not attempt to correctly emul 120 The package does not attempt to correctly emulate instructions
121 with Signalling NAN inputs. Use of SNANs shoul 121 with Signalling NAN inputs. Use of SNANs should be avoided with
122 this package. 122 this package.
123 123
124 The fabs/fadd/fdiv/fint/fintrz/fmul/fneg/fsqrt 124 The fabs/fadd/fdiv/fint/fintrz/fmul/fneg/fsqrt/fsub entry points
125 are provided for the convenience of older comp 125 are provided for the convenience of older compilers that make
126 subroutine calls for all fp instructions. The 126 subroutine calls for all fp instructions. The code does NOT emulate
127 the instruction but rather simply executes it. 127 the instruction but rather simply executes it.
128 128
129 68060FPLSP entry points: 129 68060FPLSP entry points:
130 ------------------------ 130 ------------------------
131 _060FPLSP_TOP: 131 _060FPLSP_TOP:
132 0x000: _060LSP__facoss_ 132 0x000: _060LSP__facoss_
133 0x008: _060LSP__facosd_ 133 0x008: _060LSP__facosd_
134 0x010: _060LSP__facosx_ 134 0x010: _060LSP__facosx_
135 0x018: _060LSP__fasins_ 135 0x018: _060LSP__fasins_
136 0x020: _060LSP__fasind_ 136 0x020: _060LSP__fasind_
137 0x028: _060LSP__fasinx_ 137 0x028: _060LSP__fasinx_
138 0x030: _060LSP__fatans_ 138 0x030: _060LSP__fatans_
139 0x038: _060LSP__fatand_ 139 0x038: _060LSP__fatand_
140 0x040: _060LSP__fatanx_ 140 0x040: _060LSP__fatanx_
141 0x048: _060LSP__fatanhs_ 141 0x048: _060LSP__fatanhs_
142 0x050: _060LSP__fatanhd_ 142 0x050: _060LSP__fatanhd_
143 0x058: _060LSP__fatanhx_ 143 0x058: _060LSP__fatanhx_
144 0x060: _060LSP__fcoss_ 144 0x060: _060LSP__fcoss_
145 0x068: _060LSP__fcosd_ 145 0x068: _060LSP__fcosd_
146 0x070: _060LSP__fcosx_ 146 0x070: _060LSP__fcosx_
147 0x078: _060LSP__fcoshs_ 147 0x078: _060LSP__fcoshs_
148 0x080: _060LSP__fcoshd_ 148 0x080: _060LSP__fcoshd_
149 0x088: _060LSP__fcoshx_ 149 0x088: _060LSP__fcoshx_
150 0x090: _060LSP__fetoxs_ 150 0x090: _060LSP__fetoxs_
151 0x098: _060LSP__fetoxd_ 151 0x098: _060LSP__fetoxd_
152 0x0a0: _060LSP__fetoxx_ 152 0x0a0: _060LSP__fetoxx_
153 0x0a8: _060LSP__fetoxm1s_ 153 0x0a8: _060LSP__fetoxm1s_
154 0x0b0: _060LSP__fetoxm1d_ 154 0x0b0: _060LSP__fetoxm1d_
155 0x0b8: _060LSP__fetoxm1x_ 155 0x0b8: _060LSP__fetoxm1x_
156 0x0c0: _060LSP__fgetexps_ 156 0x0c0: _060LSP__fgetexps_
157 0x0c8: _060LSP__fgetexpd_ 157 0x0c8: _060LSP__fgetexpd_
158 0x0d0: _060LSP__fgetexpx_ 158 0x0d0: _060LSP__fgetexpx_
159 0x0d8: _060LSP__fgetmans_ 159 0x0d8: _060LSP__fgetmans_
160 0x0e0: _060LSP__fgetmand_ 160 0x0e0: _060LSP__fgetmand_
161 0x0e8: _060LSP__fgetmanx_ 161 0x0e8: _060LSP__fgetmanx_
162 0x0f0: _060LSP__flog10s_ 162 0x0f0: _060LSP__flog10s_
163 0x0f8: _060LSP__flog10d_ 163 0x0f8: _060LSP__flog10d_
164 0x100: _060LSP__flog10x_ 164 0x100: _060LSP__flog10x_
165 0x108: _060LSP__flog2s_ 165 0x108: _060LSP__flog2s_
166 0x110: _060LSP__flog2d_ 166 0x110: _060LSP__flog2d_
167 0x118: _060LSP__flog2x_ 167 0x118: _060LSP__flog2x_
168 0x120: _060LSP__flogns_ 168 0x120: _060LSP__flogns_
169 0x128: _060LSP__flognd_ 169 0x128: _060LSP__flognd_
170 0x130: _060LSP__flognx_ 170 0x130: _060LSP__flognx_
171 0x138: _060LSP__flognp1s_ 171 0x138: _060LSP__flognp1s_
172 0x140: _060LSP__flognp1d_ 172 0x140: _060LSP__flognp1d_
173 0x148: _060LSP__flognp1x_ 173 0x148: _060LSP__flognp1x_
174 0x150: _060LSP__fmods_ 174 0x150: _060LSP__fmods_
175 0x158: _060LSP__fmodd_ 175 0x158: _060LSP__fmodd_
176 0x160: _060LSP__fmodx_ 176 0x160: _060LSP__fmodx_
177 0x168: _060LSP__frems_ 177 0x168: _060LSP__frems_
178 0x170: _060LSP__fremd_ 178 0x170: _060LSP__fremd_
179 0x178: _060LSP__fremx_ 179 0x178: _060LSP__fremx_
180 0x180: _060LSP__fscales_ 180 0x180: _060LSP__fscales_
181 0x188: _060LSP__fscaled_ 181 0x188: _060LSP__fscaled_
182 0x190: _060LSP__fscalex_ 182 0x190: _060LSP__fscalex_
183 0x198: _060LSP__fsins_ 183 0x198: _060LSP__fsins_
184 0x1a0: _060LSP__fsind_ 184 0x1a0: _060LSP__fsind_
185 0x1a8: _060LSP__fsinx_ 185 0x1a8: _060LSP__fsinx_
186 0x1b0: _060LSP__fsincoss_ 186 0x1b0: _060LSP__fsincoss_
187 0x1b8: _060LSP__fsincosd_ 187 0x1b8: _060LSP__fsincosd_
188 0x1c0: _060LSP__fsincosx_ 188 0x1c0: _060LSP__fsincosx_
189 0x1c8: _060LSP__fsinhs_ 189 0x1c8: _060LSP__fsinhs_
190 0x1d0: _060LSP__fsinhd_ 190 0x1d0: _060LSP__fsinhd_
191 0x1d8: _060LSP__fsinhx_ 191 0x1d8: _060LSP__fsinhx_
192 0x1e0: _060LSP__ftans_ 192 0x1e0: _060LSP__ftans_
193 0x1e8: _060LSP__ftand_ 193 0x1e8: _060LSP__ftand_
194 0x1f0: _060LSP__ftanx_ 194 0x1f0: _060LSP__ftanx_
195 0x1f8: _060LSP__ftanhs_ 195 0x1f8: _060LSP__ftanhs_
196 0x200: _060LSP__ftanhd_ 196 0x200: _060LSP__ftanhd_
197 0x208: _060LSP__ftanhx_ 197 0x208: _060LSP__ftanhx_
198 0x210: _060LSP__ftentoxs_ 198 0x210: _060LSP__ftentoxs_
199 0x218: _060LSP__ftentoxd_ 199 0x218: _060LSP__ftentoxd_
200 0x220: _060LSP__ftentoxx_ 200 0x220: _060LSP__ftentoxx_
201 0x228: _060LSP__ftwotoxs_ 201 0x228: _060LSP__ftwotoxs_
202 0x230: _060LSP__ftwotoxd_ 202 0x230: _060LSP__ftwotoxd_
203 0x238: _060LSP__ftwotoxx_ 203 0x238: _060LSP__ftwotoxx_
204 204
205 0x240: _060LSP__fabss_ 205 0x240: _060LSP__fabss_
206 0x248: _060LSP__fabsd_ 206 0x248: _060LSP__fabsd_
207 0x250: _060LSP__fabsx_ 207 0x250: _060LSP__fabsx_
208 0x258: _060LSP__fadds_ 208 0x258: _060LSP__fadds_
209 0x260: _060LSP__faddd_ 209 0x260: _060LSP__faddd_
210 0x268: _060LSP__faddx_ 210 0x268: _060LSP__faddx_
211 0x270: _060LSP__fdivs_ 211 0x270: _060LSP__fdivs_
212 0x278: _060LSP__fdivd_ 212 0x278: _060LSP__fdivd_
213 0x280: _060LSP__fdivx_ 213 0x280: _060LSP__fdivx_
214 0x288: _060LSP__fints_ 214 0x288: _060LSP__fints_
215 0x290: _060LSP__fintd_ 215 0x290: _060LSP__fintd_
216 0x298: _060LSP__fintx_ 216 0x298: _060LSP__fintx_
217 0x2a0: _060LSP__fintrzs_ 217 0x2a0: _060LSP__fintrzs_
218 0x2a8: _060LSP__fintrzd_ 218 0x2a8: _060LSP__fintrzd_
219 0x2b0: _060LSP__fintrzx_ 219 0x2b0: _060LSP__fintrzx_
220 0x2b8: _060LSP__fmuls_ 220 0x2b8: _060LSP__fmuls_
221 0x2c0: _060LSP__fmuld_ 221 0x2c0: _060LSP__fmuld_
222 0x2c8: _060LSP__fmulx_ 222 0x2c8: _060LSP__fmulx_
223 0x2d0: _060LSP__fnegs_ 223 0x2d0: _060LSP__fnegs_
224 0x2d8: _060LSP__fnegd_ 224 0x2d8: _060LSP__fnegd_
225 0x2e0: _060LSP__fnegx_ 225 0x2e0: _060LSP__fnegx_
226 0x2e8: _060LSP__fsqrts_ 226 0x2e8: _060LSP__fsqrts_
227 0x2f0: _060LSP__fsqrtd_ 227 0x2f0: _060LSP__fsqrtd_
228 0x2f8: _060LSP__fsqrtx_ 228 0x2f8: _060LSP__fsqrtx_
229 0x300: _060LSP__fsubs_ 229 0x300: _060LSP__fsubs_
230 0x308: _060LSP__fsubd_ 230 0x308: _060LSP__fsubd_
231 0x310: _060LSP__fsubx_ 231 0x310: _060LSP__fsubx_
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