1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2 MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GR
3 M68000 Hi-Performance Microprocessor Division
4 M68060 Software Package
5 Production Release P1.00 -- October 10, 1994
6
7 M68060 Software Package Copyright © 1993, 199
8
9 THE SOFTWARE is provided on an "AS IS" basis a
10 To the maximum extent permitted by applicable
11 MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPR
12 INCLUDING IMPLIED WARRANTIES OF MERCHANTABILIT
13 and any warranty against infringement with reg
14 (INCLUDING ANY MODIFIED VERSIONS THEREOF) and
15
16 To the maximum extent permitted by applicable
17 IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY D
18 (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOS
19 BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORM
20 ARISING OF THE USE OR INABILITY TO USE THE SOF
21 Motorola assumes no responsibility for the mai
22
23 You are hereby granted a copyright license to
24 so long as this entire notice is retained with
25 redistributed versions, and that such modified
26 No licenses are granted by implication, estopp
27 or trademarks of Motorola, Inc.
28 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
29 # litop.s:
30 # This file is appended to the top of th
31 # and contains the entry points into the packa
32 # effect, branches to one of the branch table
33 #
34
35 bra.l _060LSP__idivs64_
36 short 0x0000
37 bra.l _060LSP__idivu64_
38 short 0x0000
39
40 bra.l _060LSP__imuls64_
41 short 0x0000
42 bra.l _060LSP__imulu64_
43 short 0x0000
44
45 bra.l _060LSP__cmp2_Ab_
46 short 0x0000
47 bra.l _060LSP__cmp2_Aw_
48 short 0x0000
49 bra.l _060LSP__cmp2_Al_
50 short 0x0000
51 bra.l _060LSP__cmp2_Db_
52 short 0x0000
53 bra.l _060LSP__cmp2_Dw_
54 short 0x0000
55 bra.l _060LSP__cmp2_Dl_
56 short 0x0000
57
58 # leave room for future possible aditions.
59 align 0x200
60
61 ##############################################
62 # XDEF ***************************************
63 # _060LSP__idivu64_(): Emulate 64-bit un
64 # _060LSP__idivs64_(): Emulate 64-bit si
65 #
66 # This is the library version which is a
67 # and therefore does not work exactly li
68 # 64-bit divide instruction.
69 #
70 # XREF ***************************************
71 # None.
72 #
73 # INPUT **************************************
74 # 0x4(sp) = divisor
75 # 0x8(sp) = hi(dividend)
76 # 0xc(sp) = lo(dividend)
77 # 0x10(sp) = pointer to location to plac
78 #
79 # OUTPUT *************************************
80 # 0x10(sp) = points to location of remai
81 # remainder is in first longw
82 #
83 # ALGORITHM **********************************
84 # If the operands are signed, make them
85 # sign info for later. Separate out special ca
86 # or 32-bit divides if possible. Else, use a s
87 # to calculate the result.
88 # Restore sign info if signed instructio
89 # codes before performing the final "rts". If
90 # zero, then perform a divide-by-zero using a
91 # divide instruction. This way, the operating
92 # the event occurred even though it may not po
93 #
94 ##############################################
95
96 set POSNEG, -1
97 set NDIVISOR, -2
98 set NDIVIDEND, -3
99 set DDSECOND, -4
100 set DDNORMAL, -8
101 set DDQUOTIENT, -12
102 set DIV64_CC, -16
103
104 ##########
105 # divs.l #
106 ##########
107 global _060LSP__idivs64_
108 _060LSP__idivs64_:
109 # PROLOGUE BEGIN #############################
110 link.w %a6,&-16
111 movm.l &0x3f00,-(%sp)
112 # fmovm.l &0x0,-(%sp)
113 # PROLOGUE END ###############################
114
115 mov.w %cc,DIV64_CC(%a6)
116 st POSNEG(%a6)
117 bra.b ldiv64_cont
118
119 ##########
120 # divu.l #
121 ##########
122 global _060LSP__idivu64_
123 _060LSP__idivu64_:
124 # PROLOGUE BEGIN #############################
125 link.w %a6,&-16
126 movm.l &0x3f00,-(%sp)
127 # fmovm.l &0x0,-(%sp)
128 # PROLOGUE END ###############################
129
130 mov.w %cc,DIV64_CC(%a6)
131 sf POSNEG(%a6)
132
133 ldiv64_cont:
134 mov.l 0x8(%a6),%d7
135
136 beq.w ldiv64eq0
137
138 mov.l 0xc(%a6), %d5
139 mov.l 0x10(%a6), %d6
140
141 # separate signed and unsigned divide
142 tst.b POSNEG(%a6)
143 beq.b ldspecialcases
144
145 # save the sign of the divisor
146 # make divisor unsigned if it's negative
147 tst.l %d7
148 slt NDIVISOR(%a6)
149 bpl.b ldsgndividend
150 neg.l %d7
151
152 # save the sign of the dividend
153 # make dividend unsigned if it's negative
154 ldsgndividend:
155 tst.l %d5
156 slt NDIVIDEND(%a6)
157 bpl.b ldspecialcases
158
159 mov.w &0x0, %cc
160 negx.l %d6
161 negx.l %d5
162
163 # extract some special cases:
164 # - is (dividend == 0) ?
165 # - is (hi(dividend) == 0 && (divisor <=
166 ldspecialcases:
167 tst.l %d5
168 bne.b ldnormaldivide
169
170 tst.l %d6
171 beq.w lddone
172
173 cmp.l %d7,%d6
174 bls.b ld32bitdivide
175
176 exg %d5,%d6
177 bra.w ldivfinish
178
179 ld32bitdivide:
180 tdivu.l %d7, %d5:%d6
181
182 bra.b ldivfinish
183
184 ldnormaldivide:
185 # last special case:
186 # - is hi(dividend) >= divisor ? if yes,
187 cmp.l %d7,%d5
188 bls.b lddovf
189
190 # perform the divide algorithm:
191 bsr.l ldclassical
192
193 # separate into signed and unsigned finishes.
194 ldivfinish:
195 tst.b POSNEG(%a6)
196 beq.b lddone
197
198 # it was a divs.l, so ccode setting is a littl
199 tst.b NDIVIDEND(%a6)
200 beq.b ldcc
201 neg.l %d5
202 ldcc:
203 mov.b NDIVISOR(%a6), %d0
204 eor.b %d0, NDIVIDEND(%a6)
205 beq.b ldqpos
206
207 # 0x80000000 is the largest number representab
208 # number. the negative of 0x80000000 is 0x8000
209 cmpi.l %d6, &0x80000000
210 bhi.b lddovf
211
212 neg.l %d6
213
214 bra.b lddone
215
216 ldqpos:
217 btst &0x1f, %d6
218 bne.b lddovf
219
220 lddone:
221 # if the register numbers are the same, only t
222 # so, if we always save the quotient second, w
223 andi.w &0x10,DIV64_CC(%a6)
224 mov.w DIV64_CC(%a6),%cc
225 tst.l %d6
226
227 # here, the result is in d1 and d0. the curren
228 # the values at the location pointed to by a0.
229 # use movm here to not disturb the condition c
230 ldexit:
231 movm.l &0x0060,([0x14,%a6])
232
233 # EPILOGUE BEGIN #############################
234 # fmovm.l (%sp)+,&0x0
235 movm.l (%sp)+,&0x00fc
236 unlk %a6
237 # EPILOGUE END ###############################
238
239 rts
240
241 # the result should be the unchanged dividend
242 lddovf:
243 mov.l 0xc(%a6), %d5
244 mov.l 0x10(%a6), %d6
245
246 andi.w &0x1c,DIV64_CC(%a6)
247 ori.w &0x02,DIV64_CC(%a6)
248 mov.w DIV64_CC(%a6),%cc
249
250 bra.b ldexit
251
252 ldiv64eq0:
253 mov.l 0xc(%a6),([0x14,%a6])
254 mov.l 0x10(%a6),([0x14,%a6],
255
256 mov.w DIV64_CC(%a6),%cc
257
258 # EPILOGUE BEGIN #############################
259 # fmovm.l (%sp)+,&0x0
260 movm.l (%sp)+,&0x00fc
261 unlk %a6
262 # EPILOGUE END ###############################
263
264 divu.w &0x0,%d0
265 rts
266
267 ##############################################
268 ##############################################
269 # This routine uses the 'classical' Algorithm
270 # Art of Computer Programming, vol II, Seminum
271 # For this implementation b=2**16, and the tar
272 # where U,V are words of the quadword dividend
273 # and U1, V1 are the most significant words.
274 #
275 # The most sig. longword of the 64 bit dividen
276 # in %d6. The divisor must be in the variable
277 # signed/unsigned flag ddusign must be set (0=
278 # The quotient is returned in %d6, remainder i
279 # v (overflow) bit is set in the saved %ccr. I
280 # is unchanged.
281 ##############################################
282 ldclassical:
283 # if the divisor msw is 0, use simpler algorit
284 # one at ddknuth:
285
286 cmpi.l %d7, &0xffff
287 bhi.b lddknuth
288
289 # Since the divisor is only a word (and larger
290 # a simpler algorithm may be used :
291 # In the general case, four quotient words wou
292 # dividing the divisor word into each dividend
293 # the first two quotient words must be zero, o
294 # Since we already checked this case above, we
295 # longword of the dividend as (0) remainder (s
296 # the last two divisions to get a quotient lon
297
298 clr.l %d1
299 swap %d5
300 swap %d6
301 mov.w %d6, %d5
302
303 divu.w %d7, %d5
304
305 mov.w %d5, %d1
306 swap %d6
307 mov.w %d6, %d5
308
309 divu.w %d7, %d5
310
311 swap %d1
312 mov.w %d5, %d1
313 clr.w %d5
314 swap %d5
315 mov.l %d1, %d6
316
317 rts
318
319 lddknuth:
320 # In this algorithm, the divisor is treated as
321 # which is divided into a 3 digit (word) divid
322 # digit (word). After subtraction, the dividen
323 # process repeated. Before beginning, the divi
324 # 'normalized' so that the process of estimati
325 # will yield verifiably correct results..
326
327 clr.l DDNORMAL(%a6)
328 clr.b DDSECOND(%a6)
329 clr.l %d1
330 lddnchk:
331 btst &31, %d7
332 bne.b lddnormalized
333 addq.l &0x1, DDNORMAL(%a6)
334 lsl.l &0x1, %d7
335 lsl.l &0x1, %d6
336 roxl.l &0x1, %d5
337 bra.w lddnchk
338 lddnormalized:
339
340 # Now calculate an estimate of the quotient wo
341 # The comments use subscripts for the first qu
342 mov.l %d7, %d3
343 mov.l %d5, %d2
344 swap %d2
345 swap %d3
346 cmp.w %d2, %d3
347 bne.b lddqcalc1
348 mov.w &0xffff, %d1
349 bra.b lddadj0
350 lddqcalc1:
351 mov.l %d5, %d1
352
353 divu.w %d3, %d1
354
355 andi.l &0x0000ffff, %d1
356 lddadj0:
357
358 # now test the trial quotient and adjust. This
359 # normalization assures (according to Knuth) t
360 # quotient will be at worst 1 too large.
361 mov.l %d6, -(%sp)
362 clr.w %d6
363 swap %d6
364 lddadj1: mov.l %d7, %d3
365 mov.l %d1, %d2
366 mulu.w %d7, %d2
367 swap %d3
368 mulu.w %d1, %d3
369 mov.l %d5, %d4
370 sub.l %d3, %d4
371
372 swap %d4
373
374 mov.w %d4,%d0
375 mov.w %d6,%d4
376
377 tst.w %d0
378 bne.w lddadjd1
379
380 # add.l %d6, %d4
381
382 cmp.l %d2, %d4
383 bls.b lddadjd1
384 subq.l &0x1, %d1
385 bra.b lddadj1
386 lddadjd1:
387 # now test the word by multiplying it by the d
388 # the 3 digit (word) result with the current d
389 mov.l %d5, -(%sp)
390 mov.l %d1, %d6
391 swap %d6
392 mov.l %d7, %d5
393 bsr.l ldmm2
394 mov.l %d5, %d2
395 mov.l %d6, %d3
396 mov.l (%sp)+, %d5
397 mov.l (%sp)+, %d6
398 sub.l %d3, %d6
399 subx.l %d2, %d5
400 bcc ldd2nd
401 subq.l &0x1, %d1
402 # need to add back divisor longword to current
403 # - according to Knuth, this is done only 2 ou
404 # divisor, dividend selection.
405 clr.l %d2
406 mov.l %d7, %d3
407 swap %d3
408 clr.w %d3
409 add.l %d3, %d6
410 addx.l %d2, %d5
411 mov.l %d7, %d3
412 clr.w %d3
413 swap %d3
414 add.l %d3, %d5
415 ldd2nd:
416 tst.b DDSECOND(%a6) # both
417 bne.b lddremain
418 # first quotient digit now correct. store digi
419 # (subtracted) dividend
420 mov.w %d1, DDQUOTIENT(%a6)
421 clr.l %d1
422 swap %d5
423 swap %d6
424 mov.w %d6, %d5
425 clr.w %d6
426 st DDSECOND(%a6)
427 bra.w lddnormalized
428 lddremain:
429 # add 2nd word to quotient, get the remainder.
430 mov.w %d1, DDQUOTIENT+2(%a6)
431 # shift down one word/digit to renormalize rem
432 mov.w %d5, %d6
433 swap %d6
434 swap %d5
435 mov.l DDNORMAL(%a6), %d7
436 beq.b lddrn
437 subq.l &0x1, %d7
438 lddnlp:
439 lsr.l &0x1, %d5
440 roxr.l &0x1, %d6
441 dbf %d7, lddnlp
442 lddrn:
443 mov.l %d6, %d5
444 mov.l DDQUOTIENT(%a6), %d6
445
446 rts
447 ldmm2:
448 # factors for the 32X32->64 multiplication are
449 # returns 64 bit result in %d5 (hi) %d6(lo).
450 # destroys %d2,%d3,%d4.
451
452 # multiply hi,lo words of each factor to get 4
453 mov.l %d6, %d2
454 mov.l %d6, %d3
455 mov.l %d5, %d4
456 swap %d3
457 swap %d4
458 mulu.w %d5, %d6
459 mulu.w %d3, %d5
460 mulu.w %d4, %d2
461 mulu.w %d4, %d3
462 # now use swap and addx to consolidate to two
463 clr.l %d4
464 swap %d6
465 add.w %d5, %d6
466 addx.w %d4, %d3
467 add.w %d2, %d6
468 addx.w %d4, %d3
469 swap %d6
470 clr.w %d5
471 clr.w %d2
472 swap %d5
473 swap %d2
474 add.l %d2, %d5
475 add.l %d3, %d5 # %d5
476 rts
477
478 ##############################################
479 # XDEF ***************************************
480 # _060LSP__imulu64_(): Emulate 64-bit un
481 # _060LSP__imuls64_(): Emulate 64-bit si
482 #
483 # This is the library version which is a
484 # and therefore does not work exactly li
485 # 64-bit multiply instruction.
486 #
487 # XREF ***************************************
488 # None
489 #
490 # INPUT **************************************
491 # 0x4(sp) = multiplier
492 # 0x8(sp) = multiplicand
493 # 0xc(sp) = pointer to location to place
494 #
495 # OUTPUT *************************************
496 # 0xc(sp) = points to location of 64-bit
497 #
498 # ALGORITHM **********************************
499 # Perform the multiply in pieces using 1
500 # multiplies and "add" instructions.
501 # Set the condition codes as appropriate
502 # "rts".
503 #
504 ##############################################
505
506 set MUL64_CC, -4
507
508 global _060LSP__imulu64_
509 _060LSP__imulu64_:
510
511 # PROLOGUE BEGIN #############################
512 link.w %a6,&-4
513 movm.l &0x3800,-(%sp)
514 # fmovm.l &0x0,-(%sp)
515 # PROLOGUE END ###############################
516
517 mov.w %cc,MUL64_CC(%a6)
518
519 mov.l 0x8(%a6),%d0
520 beq.w mulu64_zero
521
522 mov.l 0xc(%a6),%d1
523 beq.w mulu64_zero
524
525 ##############################################
526 # 63 32
527 # ----------------------------
528 # | hi(mplier) * hi(mplicand)|
529 # ----------------------------
530 # -------------------------
531 # | hi(mplier) * lo(mplican
532 # -------------------------
533 # -------------------------
534 # | lo(mplier) * hi(mplican
535 # -------------------------
536 # | -----------
537 # --|-- | lo(mplier
538 # | -----------
539 # ======================================
540 # --------------------------------------
541 # | hi(result) | lo
542 # --------------------------------------
543 ##############################################
544 mulu64_alg:
545 # load temp registers with operands
546 mov.l %d0,%d2
547 mov.l %d0,%d3
548 mov.l %d1,%d4
549 swap %d3
550 swap %d4
551
552 # complete necessary multiplies:
553 mulu.w %d1,%d0
554 mulu.w %d3,%d1
555 mulu.w %d4,%d2
556 mulu.w %d4,%d3
557
558 # add lo portions of [2],[3] to hi portion of
559 # add carries produced from these adds to [4].
560 # lo([1]) is the final lo 16 bits of the resul
561 clr.l %d4
562 swap %d0
563 add.w %d1,%d0
564 addx.l %d4,%d3
565 add.w %d2,%d0
566 addx.l %d4,%d3
567 swap %d0
568
569 # lo portions of [2],[3] have been added in to
570 # now, clear lo, put hi in lo reg, and add to
571 clr.w %d1
572 clr.w %d2
573 swap %d1
574 swap %d2
575 add.l %d2,%d1
576 add.l %d3,%d1
577
578 # now, grab the condition codes. only one that
579 # 'N' CAN be set if the operation is unsigned
580 mov.w MUL64_CC(%a6),%d4
581 andi.b &0x10,%d4
582 tst.l %d1
583 bpl.b mulu64_ddone
584 ori.b &0x8,%d4
585 mulu64_ddone:
586 mov.w %d4,%cc
587
588 # here, the result is in d1 and d0. the curren
589 # the values at the location pointed to by a0.
590 # use movm here to not disturb the condition c
591 mulu64_end:
592 exg %d1,%d0
593 movm.l &0x0003,([0x10,%a6])
594
595 # EPILOGUE BEGIN #############################
596 # fmovm.l (%sp)+,&0x0
597 movm.l (%sp)+,&0x001c
598 unlk %a6
599 # EPILOGUE END ###############################
600
601 rts
602
603 # one or both of the operands is zero so the r
604 # save the zero result to the register file an
605 mulu64_zero:
606 clr.l %d0
607 clr.l %d1
608
609 mov.w MUL64_CC(%a6),%d4
610 andi.b &0x10,%d4
611 ori.b &0x4,%d4
612 mov.w %d4,%cc
613
614 bra.b mulu64_end
615
616 ##########
617 # muls.l #
618 ##########
619 global _060LSP__imuls64_
620 _060LSP__imuls64_:
621
622 # PROLOGUE BEGIN #############################
623 link.w %a6,&-4
624 movm.l &0x3c00,-(%sp)
625 # fmovm.l &0x0,-(%sp)
626 # PROLOGUE END ###############################
627
628 mov.w %cc,MUL64_CC(%a6)
629
630 mov.l 0x8(%a6),%d0
631 beq.b mulu64_zero
632
633 mov.l 0xc(%a6),%d1
634 beq.b mulu64_zero
635
636 clr.b %d5
637 tst.l %d0
638 bge.b muls64_chk_md_sgn
639 neg.l %d0
640
641 ori.b &0x1,%d5
642
643 # the result sign is the exclusive or of the o
644 muls64_chk_md_sgn:
645 tst.l %d1
646 bge.b muls64_alg
647 neg.l %d1
648
649 eori.b &0x1,%d5
650
651 ##############################################
652 # 63 32
653 # ----------------------------
654 # | hi(mplier) * hi(mplicand)|
655 # ----------------------------
656 # -------------------------
657 # | hi(mplier) * lo(mplican
658 # -------------------------
659 # -------------------------
660 # | lo(mplier) * hi(mplican
661 # -------------------------
662 # | -----------
663 # --|-- | lo(mplier
664 # | -----------
665 # ======================================
666 # --------------------------------------
667 # | hi(result) | lo
668 # --------------------------------------
669 ##############################################
670 muls64_alg:
671 # load temp registers with operands
672 mov.l %d0,%d2
673 mov.l %d0,%d3
674 mov.l %d1,%d4
675 swap %d3
676 swap %d4
677
678 # complete necessary multiplies:
679 mulu.w %d1,%d0
680 mulu.w %d3,%d1
681 mulu.w %d4,%d2
682 mulu.w %d4,%d3
683
684 # add lo portions of [2],[3] to hi portion of
685 # add carries produced from these adds to [4].
686 # lo([1]) is the final lo 16 bits of the resul
687 clr.l %d4
688 swap %d0
689 add.w %d1,%d0
690 addx.l %d4,%d3
691 add.w %d2,%d0
692 addx.l %d4,%d3
693 swap %d0
694
695 # lo portions of [2],[3] have been added in to
696 # now, clear lo, put hi in lo reg, and add to
697 clr.w %d1
698 clr.w %d2
699 swap %d1
700 swap %d2
701 add.l %d2,%d1
702 add.l %d3,%d1
703
704 tst.b %d5
705 beq.b muls64_done
706
707 # result should be a signed negative number.
708 # compute 2's complement of the unsigned numbe
709 # -negate all bits and add 1
710 muls64_neg:
711 not.l %d0
712 not.l %d1
713 addq.l &1,%d0
714 addx.l %d4,%d1
715
716 muls64_done:
717 mov.w MUL64_CC(%a6),%d4
718 andi.b &0x10,%d4
719 tst.l %d1
720 bpl.b muls64_ddone
721 ori.b &0x8,%d4
722 muls64_ddone:
723 mov.w %d4,%cc
724
725 # here, the result is in d1 and d0. the curren
726 # the values at the location pointed to by a0.
727 # use movm here to not disturb the condition c
728 muls64_end:
729 exg %d1,%d0
730 movm.l &0x0003,([0x10,%a6])
731
732 # EPILOGUE BEGIN #############################
733 # fmovm.l (%sp)+,&0x0
734 movm.l (%sp)+,&0x003c
735 unlk %a6
736 # EPILOGUE END ###############################
737
738 rts
739
740 # one or both of the operands is zero so the r
741 # save the zero result to the register file an
742 muls64_zero:
743 clr.l %d0
744 clr.l %d1
745
746 mov.w MUL64_CC(%a6),%d4
747 andi.b &0x10,%d4
748 ori.b &0x4,%d4
749 mov.w %d4,%cc
750
751 bra.b muls64_end
752
753 ##############################################
754 # XDEF ***************************************
755 # _060LSP__cmp2_Ab_(): Emulate "cmp2.b A
756 # _060LSP__cmp2_Aw_(): Emulate "cmp2.w A
757 # _060LSP__cmp2_Al_(): Emulate "cmp2.l A
758 # _060LSP__cmp2_Db_(): Emulate "cmp2.b D
759 # _060LSP__cmp2_Dw_(): Emulate "cmp2.w D
760 # _060LSP__cmp2_Dl_(): Emulate "cmp2.l D
761 #
762 # This is the library version which is a
763 # and therefore does not work exactly li
764 # instruction.
765 #
766 # XREF ***************************************
767 # None
768 #
769 # INPUT **************************************
770 # 0x4(sp) = Rn
771 # 0x8(sp) = pointer to boundary pair
772 #
773 # OUTPUT *************************************
774 # cc = condition codes are set correctly
775 #
776 # ALGORITHM **********************************
777 # In the interest of simplicity, all ope
778 # longword size whether the operation is byte,
779 # bounds are sign extended accordingly. If Rn
780 # also sign extended. If Rn is an address regi
781 # extended since the full register is always u
782 # The condition codes are set correctly
783 #
784 ##############################################
785
786 set CMP2_CC, -4
787
788 global _060LSP__cmp2_Ab_
789 _060LSP__cmp2_Ab_:
790
791 # PROLOGUE BEGIN #############################
792 link.w %a6,&-4
793 movm.l &0x3800,-(%sp)
794 # fmovm.l &0x0,-(%sp)
795 # PROLOGUE END ###############################
796
797 mov.w %cc,CMP2_CC(%a6)
798 mov.l 0x8(%a6), %d2
799
800 mov.b ([0xc,%a6],0x0),%d0
801 mov.b ([0xc,%a6],0x1),%d1
802
803 extb.l %d0
804 extb.l %d1
805 bra.w l_cmp2_cmp
806
807 global _060LSP__cmp2_Aw_
808 _060LSP__cmp2_Aw_:
809
810 # PROLOGUE BEGIN #############################
811 link.w %a6,&-4
812 movm.l &0x3800,-(%sp)
813 # fmovm.l &0x0,-(%sp)
814 # PROLOGUE END ###############################
815
816 mov.w %cc,CMP2_CC(%a6)
817 mov.l 0x8(%a6), %d2
818
819 mov.w ([0xc,%a6],0x0),%d0
820 mov.w ([0xc,%a6],0x2),%d1
821
822 ext.l %d0
823 ext.l %d1
824 bra.w l_cmp2_cmp
825
826 global _060LSP__cmp2_Al_
827 _060LSP__cmp2_Al_:
828
829 # PROLOGUE BEGIN #############################
830 link.w %a6,&-4
831 movm.l &0x3800,-(%sp)
832 # fmovm.l &0x0,-(%sp)
833 # PROLOGUE END ###############################
834
835 mov.w %cc,CMP2_CC(%a6)
836 mov.l 0x8(%a6), %d2
837
838 mov.l ([0xc,%a6],0x0),%d0
839 mov.l ([0xc,%a6],0x4),%d1
840 bra.w l_cmp2_cmp
841
842 global _060LSP__cmp2_Db_
843 _060LSP__cmp2_Db_:
844
845 # PROLOGUE BEGIN #############################
846 link.w %a6,&-4
847 movm.l &0x3800,-(%sp)
848 # fmovm.l &0x0,-(%sp)
849 # PROLOGUE END ###############################
850
851 mov.w %cc,CMP2_CC(%a6)
852 mov.l 0x8(%a6), %d2
853
854 mov.b ([0xc,%a6],0x0),%d0
855 mov.b ([0xc,%a6],0x1),%d1
856
857 extb.l %d0
858 extb.l %d1
859
860 # operation is a data register compare.
861 # sign extend byte to long so we can do simple
862 extb.l %d2
863 bra.w l_cmp2_cmp
864
865 global _060LSP__cmp2_Dw_
866 _060LSP__cmp2_Dw_:
867
868 # PROLOGUE BEGIN #############################
869 link.w %a6,&-4
870 movm.l &0x3800,-(%sp)
871 # fmovm.l &0x0,-(%sp)
872 # PROLOGUE END ###############################
873
874 mov.w %cc,CMP2_CC(%a6)
875 mov.l 0x8(%a6), %d2
876
877 mov.w ([0xc,%a6],0x0),%d0
878 mov.w ([0xc,%a6],0x2),%d1
879
880 ext.l %d0
881 ext.l %d1
882
883 # operation is a data register compare.
884 # sign extend word to long so we can do simple
885 ext.l %d2
886 bra.w l_cmp2_cmp
887
888 global _060LSP__cmp2_Dl_
889 _060LSP__cmp2_Dl_:
890
891 # PROLOGUE BEGIN #############################
892 link.w %a6,&-4
893 movm.l &0x3800,-(%sp)
894 # fmovm.l &0x0,-(%sp)
895 # PROLOGUE END ###############################
896
897 mov.w %cc,CMP2_CC(%a6)
898 mov.l 0x8(%a6), %d2
899
900 mov.l ([0xc,%a6],0x0),%d0
901 mov.l ([0xc,%a6],0x4),%d1
902
903 #
904 # To set the ccodes correctly:
905 # (1) save 'Z' bit from (Rn - lo)
906 # (2) save 'Z' and 'N' bits from ((hi -
907 # (3) keep 'X', 'N', and 'V' from before
908 # (4) combine ccodes
909 #
910 l_cmp2_cmp:
911 sub.l %d0, %d2
912 mov.w %cc, %d3
913 andi.b &0x4, %d3
914 sub.l %d0, %d1
915 cmp.l %d1,%d2
916
917 mov.w %cc, %d4
918 or.b %d4, %d3
919 andi.b &0x5, %d3
920
921 mov.w CMP2_CC(%a6), %d4
922 andi.b &0x1a, %d4
923 or.b %d3, %d4
924 mov.w %d4,%cc
925
926 # EPILOGUE BEGIN #############################
927 # fmovm.l (%sp)+,&0x0
928 movm.l (%sp)+,&0x001c
929 unlk %a6
930 # EPILOGUE END ###############################
931
932 rts
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