1 /* SPDX-License-Identifier: GPL-2.0 */ 1
2 #ifndef _ASM_HASH_H
3 #define _ASM_HASH_H
4
5 /*
6 * If CONFIG_M68000=y (original mc68000/010),
7 * to work around the lack of a MULU.L instruc
8 */
9
10 #define HAVE_ARCH__HASH_32 1
11 /*
12 * While it would be legal to substitute a dif
13 * entirely, let's keep it simple and just use
14 * by GOLDEN_RATIO_32 = 0x61C88647.
15 *
16 * The best way to do that appears to be to mu
17 * shifts and adds, and use mulu.w to multiply
18 *
19 * Because the 68000 has multi-cycle shifts, t
20 * chosen to minimise the shift distances.
21 *
22 * Despite every attempt to spoon-feed it simp
23 * 6.1.1 doggedly insists on doing annoying th
24 * "lsl.l #2,<reg>" (12 cycles) to two adds (8
25 *
26 * It also likes to notice two shifts in a row
27 * "a <<= 7", and convert that to "a = x << 9"
28 * than 8 bits are extra-slow on m68k, so that
29 *
30 * Since the 68000 is a very simple in-order p
31 * instruction scheduling effects on execution
32 * take it out of GCC's hands and write one bi
33 *
34 * Without calling overhead, this operation is
35 * plus one immediate constant) and 166 cycles
36 *
37 * (Because %2 is fetched twice, it can't be p
38 * can't be a fully general "g" or "m". Regis
39 * offsettable memory or immediate will work.)
40 */
41 static inline u32 __attribute_const__ __hash_3
42 {
43 u32 a, b;
44
45 asm( "move.l %2,%0" /* a = x * 0x0
46 "\n lsl.l #2,%0" /* a = x * 0x0
47 "\n move.l %0,%1"
48 "\n lsl.l #7,%0" /* a = x * 0x0
49 "\n add.l %2,%0" /* a = x * 0x0
50 "\n add.l %0,%1" /* b = x * 0x0
51 "\n add.l %0,%0" /* a = x * 0x0
52 "\n add.l %0,%1" /* b = x * 0x0
53 "\n lsl.l #5,%0" /* a = x * 0x8
54 : "=&d,d" (a), "=&r,r" (b)
55 : "r,roi?" (x)); /* a+b = x*0x8
56
57 return ((u16)(x*0x61c8) << 16) + a + b
58 }
59
60 #endif /* _ASM_HASH_H */
61
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