1 /* SPDX-License-Identifier: GPL-2.0 */ 1 2 /********************************************* 3 4 /* 5 * mcfdma.h -- Coldfire internal DMA supp 6 * 7 * (C) Copyright 1999, Rob Scott (rscott@ 8 */ 9 10 /********************************************* 11 #ifndef mcfdma_h 12 #define mcfdma_h 13 /********************************************* 14 15 #if !defined(CONFIG_M5272) 16 17 /* 18 * Define the DMA register set addresses. 19 * Note: these are longword registers, us 20 */ 21 #define MCFDMA_SAR 0x00 22 #define MCFDMA_DAR 0x01 23 /* these are word registers, use unsigned shor 24 #define MCFDMA_DCR 0x04 25 #define MCFDMA_BCR 0x06 26 /* these are byte registers, use unsiged char 27 #define MCFDMA_DSR 0x10 28 #define MCFDMA_DIVR 0x14 29 30 /* 31 * Bit definitions for the DMA Control Re 32 */ 33 #define MCFDMA_DCR_INT 0x8000 34 #define MCFDMA_DCR_EEXT 0x4000 35 #define MCFDMA_DCR_CS 0x2000 36 #define MCFDMA_DCR_AA 0x1000 37 #define MCFDMA_DCR_BWC_MASK 0x0E00 38 #define MCFDMA_DCR_BWC_512 0x0200 39 #define MCFDMA_DCR_BWC_1024 0x0400 40 #define MCFDMA_DCR_BWC_2048 0x0600 41 #define MCFDMA_DCR_BWC_4096 0x0800 42 #define MCFDMA_DCR_BWC_8192 0x0a00 43 #define MCFDMA_DCR_BWC_16384 0x0c00 44 #define MCFDMA_DCR_BWC_32768 0x0e00 45 #define MCFDMA_DCR_SAA 0x0100 46 #define MCFDMA_DCR_S_RW 0x0080 47 #define MCFDMA_DCR_SINC 0x0040 48 #define MCFDMA_DCR_SSIZE_MASK 0x0030 49 #define MCFDMA_DCR_SSIZE_LONG 0x0000 50 #define MCFDMA_DCR_SSIZE_BYTE 0x0010 51 #define MCFDMA_DCR_SSIZE_WORD 0x0020 52 #define MCFDMA_DCR_SSIZE_LINE 0x0030 53 #define MCFDMA_DCR_DINC 0x0008 54 #define MCFDMA_DCR_DSIZE_MASK 0x0006 55 #define MCFDMA_DCR_DSIZE_LONG 0x0000 56 #define MCFDMA_DCR_DSIZE_BYTE 0x0002 57 #define MCFDMA_DCR_DSIZE_WORD 0x0004 58 #define MCFDMA_DCR_DSIZE_LINE 0x0006 59 #define MCFDMA_DCR_START 0x0001 60 61 /* 62 * Bit definitions for the DMA Status Reg 63 */ 64 #define MCFDMA_DSR_CE 0x40 65 #define MCFDMA_DSR_BES 0x20 66 #define MCFDMA_DSR_BED 0x10 67 #define MCFDMA_DSR_REQ 0x04 68 #define MCFDMA_DSR_BSY 0x02 69 #define MCFDMA_DSR_DONE 0x01 70 71 #else /* This is an MCF5272 */ 72 73 #define MCFDMA_DMR 0x00 /* Mode Regi 74 #define MCFDMA_DIR 0x03 /* Interrupt 75 #define MCFDMA_DSAR 0x03 /* Source Ad 76 #define MCFDMA_DDAR 0x04 /* Destinati 77 #define MCFDMA_DBCR 0x02 /* Byte Coun 78 79 /* Bit definitions for the DMA Mode Register ( 80 #define MCFDMA_DMR_RESET 0x80000000L /* Re 81 #define MCFDMA_DMR_EN 0x40000000L /* DM 82 #define MCFDMA_DMR_RQM 0x000C0000L /* Re 83 #define MCFDMA_DMR_RQM_DUAL 0x000C0000L /* Du 84 #define MCFDMA_DMR_DSTM 0x00002000L /* De 85 #define MCFDMA_DMR_DSTM_SA 0x00000000L /* De 86 #define MCFDMA_DMR_DSTM_IA 0x00002000L /* De 87 #define MCFDMA_DMR_DSTT_UD 0x00000400L /* De 88 #define MCFDMA_DMR_DSTT_UC 0x00000800L /* De 89 #define MCFDMA_DMR_DSTT_SD 0x00001400L /* De 90 #define MCFDMA_DMR_DSTT_SC 0x00001800L /* De 91 #define MCFDMA_DMR_DSTS_OFF 0x8 /* of 92 #define MCFDMA_DMR_DSTS_LONG 0x00000000L /* Lo 93 #define MCFDMA_DMR_DSTS_BYTE 0x00000100L /* By 94 #define MCFDMA_DMR_DSTS_WORD 0x00000200L /* Wo 95 #define MCFDMA_DMR_DSTS_LINE 0x00000300L /* Li 96 #define MCFDMA_DMR_SRCM 0x00000020L /* So 97 #define MCFDMA_DMR_SRCM_SA 0x00000000L /* So 98 #define MCFDMA_DMR_SRCM_IA 0x00000020L /* So 99 #define MCFDMA_DMR_SRCT_UD 0x00000004L /* So 100 #define MCFDMA_DMR_SRCT_UC 0x00000008L /* So 101 #define MCFDMA_DMR_SRCT_SD 0x00000014L /* So 102 #define MCFDMA_DMR_SRCT_SC 0x00000018L /* So 103 #define MCFDMA_DMR_SRCS_OFF 0x0 /* Of 104 #define MCFDMA_DMR_SRCS_LONG 0x00000000L /* Lo 105 #define MCFDMA_DMR_SRCS_BYTE 0x00000001L /* By 106 #define MCFDMA_DMR_SRCS_WORD 0x00000002L /* Wo 107 #define MCFDMA_DMR_SRCS_LINE 0x00000003L /* Li 108 109 /* Bit definitions for the DMA interrupt regis 110 #define MCFDMA_DIR_INVEN 0x1000 /* Invalid 111 #define MCFDMA_DIR_ASCEN 0x0800 /* Address 112 #define MCFDMA_DIR_TEEN 0x0200 /* Transfe 113 #define MCFDMA_DIR_TCEN 0x0100 /* Transfe 114 #define MCFDMA_DIR_INV 0x0010 /* Invalid 115 #define MCFDMA_DIR_ASC 0x0008 /* Address 116 #define MCFDMA_DIR_TE 0x0002 /* Transfe 117 #define MCFDMA_DIR_TC 0x0001 /* Transfe 118 119 #endif /* !defined(CONFIG_M5272) */ 120 121 /********************************************* 122 #endif /* mcfdma_h */ 123
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