1 /* SPDX-License-Identifier: GPL-2.0 */ 1
2 /*********************************************
3
4 /*
5 * mcfuart.h -- ColdFire internal UART su
6 *
7 * (C) Copyright 1999-2003, Greg Ungerer
8 * (C) Copyright 2000, Lineo Inc. (www.li
9 */
10
11 /*********************************************
12 #ifndef mcfuart_h
13 #define mcfuart_h
14 /*********************************************
15
16 #include <linux/serial_core.h>
17 #include <linux/platform_device.h>
18
19 struct mcf_platform_uart {
20 unsigned long mapbase; /* Phy
21 void __iomem *membase; /* Vir
22 unsigned int irq; /* Int
23 unsigned int uartclk; /* UAR
24 };
25
26 /*
27 * Define the ColdFire UART register set
28 */
29 #define MCFUART_UMR 0x00
30 #define MCFUART_USR 0x04
31 #define MCFUART_UCSR 0x04
32 #define MCFUART_UCR 0x08
33 #define MCFUART_URB 0x0c
34 #define MCFUART_UTB 0x0c
35 #define MCFUART_UIPCR 0x10
36 #define MCFUART_UACR 0x10
37 #define MCFUART_UISR 0x14
38 #define MCFUART_UIMR 0x14
39 #define MCFUART_UBG1 0x18
40 #define MCFUART_UBG2 0x1c
41 #ifdef CONFIG_M5272
42 #define MCFUART_UTF 0x28
43 #define MCFUART_URF 0x2c
44 #define MCFUART_UFPD 0x30
45 #endif
46 #if defined(CONFIG_M5206) || defined(CONFIG_M5
47 defined(CONFIG_M5249) || defined(CONFI
48 defined(CONFIG_M5307) || defined(CONFI
49 #define MCFUART_UIVR 0x30
50 #endif
51 #define MCFUART_UIPR 0x34
52 #define MCFUART_UOP1 0x38
53 #define MCFUART_UOP0 0x3c
54
55
56 /*
57 * Define bit flags in Mode Register 1 (M
58 */
59 #define MCFUART_MR1_RXRTS 0x80
60 #define MCFUART_MR1_RXIRQFULL 0x40
61 #define MCFUART_MR1_RXIRQRDY 0x00
62 #define MCFUART_MR1_RXERRBLOCK 0x20
63 #define MCFUART_MR1_RXERRCHAR 0x00
64
65 #define MCFUART_MR1_PARITYNONE 0x10
66 #define MCFUART_MR1_PARITYEVEN 0x00
67 #define MCFUART_MR1_PARITYODD 0x04
68 #define MCFUART_MR1_PARITYSPACE 0x08
69 #define MCFUART_MR1_PARITYMARK 0x0c
70
71 #define MCFUART_MR1_CS5 0x00
72 #define MCFUART_MR1_CS6 0x01
73 #define MCFUART_MR1_CS7 0x02
74 #define MCFUART_MR1_CS8 0x03
75
76 /*
77 * Define bit flags in Mode Register 2 (M
78 */
79 #define MCFUART_MR2_LOOPBACK 0x80
80 #define MCFUART_MR2_REMOTELOOP 0xc0
81 #define MCFUART_MR2_AUTOECHO 0x40
82 #define MCFUART_MR2_TXRTS 0x20
83 #define MCFUART_MR2_TXCTS 0x10
84
85 #define MCFUART_MR2_STOP1 0x07
86 #define MCFUART_MR2_STOP15 0x08
87 #define MCFUART_MR2_STOP2 0x0f
88
89 /*
90 * Define bit flags in Status Register (U
91 */
92 #define MCFUART_USR_RXBREAK 0x80
93 #define MCFUART_USR_RXFRAMING 0x40
94 #define MCFUART_USR_RXPARITY 0x20
95 #define MCFUART_USR_RXOVERRUN 0x10
96 #define MCFUART_USR_TXEMPTY 0x08
97 #define MCFUART_USR_TXREADY 0x04
98 #define MCFUART_USR_RXFULL 0x02
99 #define MCFUART_USR_RXREADY 0x01
100
101 #define MCFUART_USR_RXERR (MCFUART_USR_R
102 MCFUART_USR_RX
103
104 /*
105 * Define bit flags in Clock Select Regis
106 */
107 #define MCFUART_UCSR_RXCLKTIMER 0xd0
108 #define MCFUART_UCSR_RXCLKEXT16 0xe0
109 #define MCFUART_UCSR_RXCLKEXT1 0xf0
110
111 #define MCFUART_UCSR_TXCLKTIMER 0x0d
112 #define MCFUART_UCSR_TXCLKEXT16 0x0e
113 #define MCFUART_UCSR_TXCLKEXT1 0x0f
114
115 /*
116 * Define bit flags in Command Register (
117 */
118 #define MCFUART_UCR_CMDNULL 0x00
119 #define MCFUART_UCR_CMDRESETMRPTR 0x10
120 #define MCFUART_UCR_CMDRESETRX 0x20
121 #define MCFUART_UCR_CMDRESETTX 0x30
122 #define MCFUART_UCR_CMDRESETERR 0x40
123 #define MCFUART_UCR_CMDRESETBREAK 0x50
124 #define MCFUART_UCR_CMDBREAKSTART 0x60
125 #define MCFUART_UCR_CMDBREAKSTOP 0x70
126
127 #define MCFUART_UCR_TXNULL 0x00
128 #define MCFUART_UCR_TXENABLE 0x04
129 #define MCFUART_UCR_TXDISABLE 0x08
130 #define MCFUART_UCR_RXNULL 0x00
131 #define MCFUART_UCR_RXENABLE 0x01
132 #define MCFUART_UCR_RXDISABLE 0x02
133
134 /*
135 * Define bit flags in Input Port Change
136 */
137 #define MCFUART_UIPCR_CTSCOS 0x10
138 #define MCFUART_UIPCR_CTS 0x01
139
140 /*
141 * Define bit flags in Input Port Registe
142 */
143 #define MCFUART_UIPR_CTS 0x01
144
145 /*
146 * Define bit flags in Output Port Regist
147 * Clear bit by writing to UOP0, set by w
148 */
149 #define MCFUART_UOP_RTS 0x01
150
151 /*
152 * Define bit flags in the Auxiliary Cont
153 */
154 #define MCFUART_UACR_IEC 0x01
155
156 /*
157 * Define bit flags in Interrupt Status R
158 * These same bits are used for the Inter
159 */
160 #define MCFUART_UIR_COS 0x80
161 #define MCFUART_UIR_DELTABREAK 0x04
162 #define MCFUART_UIR_RXREADY 0x02
163 #define MCFUART_UIR_TXREADY 0x01
164
165 #ifdef CONFIG_M5272
166 /*
167 * Define bit flags in the Transmitter FI
168 */
169 #define MCFUART_UTF_TXB 0x1f
170 #define MCFUART_UTF_FULL 0x20
171 #define MCFUART_UTF_TXS 0xc0
172
173 /*
174 * Define bit flags in the Receiver FIFO
175 */
176 #define MCFUART_URF_RXB 0x1f
177 #define MCFUART_URF_FULL 0x20
178 #define MCFUART_URF_RXS 0xc0
179 #endif
180
181 #if defined(CONFIG_M54xx)
182 #define MCFUART_TXFIFOSIZE 512
183 #elif defined(CONFIG_M5272)
184 #define MCFUART_TXFIFOSIZE 25
185 #else
186 #define MCFUART_TXFIFOSIZE 1
187 #endif
188 /*********************************************
189 #endif /* mcfuart_h */
190
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