1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Macintosh interrupts 3 * Macintosh interrupts
4 * 4 *
5 * General design: 5 * General design:
6 * In contrary to the Amiga and Atari platform 6 * In contrary to the Amiga and Atari platforms, the Mac hardware seems to
7 * exclusively use the autovector interrupts ( 7 * exclusively use the autovector interrupts (the 'generic level0-level7'
8 * interrupts with exception vectors 0x19-0x1f 8 * interrupts with exception vectors 0x19-0x1f). The following interrupt levels
9 * are used: 9 * are used:
10 * 1 - VIA1 10 * 1 - VIA1
11 * - slot 0: one second interru 11 * - slot 0: one second interrupt (CA2)
12 * - slot 1: VBlank (CA1) 12 * - slot 1: VBlank (CA1)
13 * - slot 2: ADB data ready (SR 13 * - slot 2: ADB data ready (SR full)
14 * - slot 3: ADB data (CB2) 14 * - slot 3: ADB data (CB2)
15 * - slot 4: ADB clock (CB1) 15 * - slot 4: ADB clock (CB1)
16 * - slot 5: timer 2 16 * - slot 5: timer 2
17 * - slot 6: timer 1 17 * - slot 6: timer 1
18 * - slot 7: status of IRQ; sig 18 * - slot 7: status of IRQ; signals 'any enabled int.'
19 * 19 *
20 * 2 - VIA2 or RBV 20 * 2 - VIA2 or RBV
21 * - slot 0: SCSI DRQ (CA2) 21 * - slot 0: SCSI DRQ (CA2)
22 * - slot 1: NUBUS IRQ (CA1) ne 22 * - slot 1: NUBUS IRQ (CA1) need to read port A to find which
23 * - slot 2: /EXP IRQ (only on 23 * - slot 2: /EXP IRQ (only on IIci)
24 * - slot 3: SCSI IRQ (CB2) 24 * - slot 3: SCSI IRQ (CB2)
25 * - slot 4: ASC IRQ (CB1) 25 * - slot 4: ASC IRQ (CB1)
26 * - slot 5: timer 2 (not on II 26 * - slot 5: timer 2 (not on IIci)
27 * - slot 6: timer 1 (not on II 27 * - slot 6: timer 1 (not on IIci)
28 * - slot 7: status of IRQ; sig 28 * - slot 7: status of IRQ; signals 'any enabled int.'
29 * 29 *
30 * Levels 3-6 vary by machine type. For VIA or 30 * Levels 3-6 vary by machine type. For VIA or RBV Macintoshes:
31 * 31 *
32 * 3 - unused (?) 32 * 3 - unused (?)
33 * 33 *
34 * 4 - SCC 34 * 4 - SCC
35 * 35 *
36 * 5 - unused (?) 36 * 5 - unused (?)
37 * [serial errors or special co 37 * [serial errors or special conditions seem to raise level 6
38 * interrupts on some models (L 38 * interrupts on some models (LC4xx?)]
39 * 39 *
40 * 6 - off switch (?) 40 * 6 - off switch (?)
41 * 41 *
42 * Machines with Quadra-like VIA hardware, exc 42 * Machines with Quadra-like VIA hardware, except PSC and PMU machines, support
43 * an alternate interrupt mapping, as used by 43 * an alternate interrupt mapping, as used by A/UX. It spreads ethernet and
44 * sound out to their own autovector IRQs and 44 * sound out to their own autovector IRQs and gives VIA1 a higher priority:
45 * 45 *
46 * 1 - unused (?) 46 * 1 - unused (?)
47 * 47 *
48 * 3 - on-board SONIC 48 * 3 - on-board SONIC
49 * 49 *
50 * 5 - Apple Sound Chip (ASC) 50 * 5 - Apple Sound Chip (ASC)
51 * 51 *
52 * 6 - VIA1 52 * 6 - VIA1
53 * 53 *
54 * For OSS Macintoshes (IIfx only), we apply a 54 * For OSS Macintoshes (IIfx only), we apply an interrupt mapping similar to
55 * the Quadra (A/UX) mapping: 55 * the Quadra (A/UX) mapping:
56 * 56 *
57 * 1 - ISM IOP (ADB) 57 * 1 - ISM IOP (ADB)
58 * 58 *
59 * 2 - SCSI 59 * 2 - SCSI
60 * 60 *
61 * 3 - NuBus 61 * 3 - NuBus
62 * 62 *
63 * 4 - SCC IOP 63 * 4 - SCC IOP
64 * 64 *
65 * 6 - VIA1 65 * 6 - VIA1
66 * 66 *
67 * For PSC Macintoshes (660AV, 840AV): 67 * For PSC Macintoshes (660AV, 840AV):
68 * 68 *
69 * 3 - PSC level 3 69 * 3 - PSC level 3
70 * - slot 0: MACE 70 * - slot 0: MACE
71 * 71 *
72 * 4 - PSC level 4 72 * 4 - PSC level 4
73 * - slot 1: SCC channel A inte 73 * - slot 1: SCC channel A interrupt
74 * - slot 2: SCC channel B inte 74 * - slot 2: SCC channel B interrupt
75 * - slot 3: MACE DMA 75 * - slot 3: MACE DMA
76 * 76 *
77 * 5 - PSC level 5 77 * 5 - PSC level 5
78 * 78 *
79 * 6 - PSC level 6 79 * 6 - PSC level 6
80 * 80 *
81 * Finally we have good 'ole level 7, the non- 81 * Finally we have good 'ole level 7, the non-maskable interrupt:
82 * 82 *
83 * 7 - NMI (programmer's switch on 83 * 7 - NMI (programmer's switch on the back of some Macs)
84 * Also RAM parity error on mod 84 * Also RAM parity error on models which support it (IIc, IIfx?)
85 * 85 *
86 * The current interrupt logic looks something 86 * The current interrupt logic looks something like this:
87 * 87 *
88 * - We install dispatchers for the autovector 88 * - We install dispatchers for the autovector interrupts (1-7). These
89 * dispatchers are responsible for querying 89 * dispatchers are responsible for querying the hardware (the
90 * VIA/RBV/OSS/PSC chips) to determine the a 90 * VIA/RBV/OSS/PSC chips) to determine the actual interrupt source. Using
91 * this information a machspec interrupt num 91 * this information a machspec interrupt number is generated by placing the
92 * index of the interrupt hardware into the 92 * index of the interrupt hardware into the low three bits and the original
93 * autovector interrupt number in the upper 93 * autovector interrupt number in the upper 5 bits. The handlers for the
94 * resulting machspec interrupt are then cal 94 * resulting machspec interrupt are then called.
95 * 95 *
96 * - Nubus is a special case because its inter 96 * - Nubus is a special case because its interrupts are hidden behind two
97 * layers of hardware. Nubus interrupts come 97 * layers of hardware. Nubus interrupts come in as index 1 on VIA #2,
98 * which translates to IRQ number 17. In thi 98 * which translates to IRQ number 17. In this spot we install _another_
99 * dispatcher. This dispatcher finds the int 99 * dispatcher. This dispatcher finds the interrupting slot number (9-F) and
100 * then forms a new machspec interrupt numbe 100 * then forms a new machspec interrupt number as above with the slot number
101 * minus 9 in the low three bits and the pse 101 * minus 9 in the low three bits and the pseudo-level 7 in the upper five
102 * bits. The handlers for this new machspec 102 * bits. The handlers for this new machspec interrupt number are then
103 * called. This puts Nubus interrupts into t 103 * called. This puts Nubus interrupts into the range 56-62.
104 * 104 *
105 * - The Baboon interrupts (used on some Power 105 * - The Baboon interrupts (used on some PowerBooks) are an even more special
106 * case. They're hidden behind the Nubus slo 106 * case. They're hidden behind the Nubus slot $C interrupt thus adding a
107 * third layer of indirection. Why oh why di 107 * third layer of indirection. Why oh why did the Apple engineers do that?
108 * 108 *
109 */ 109 */
110 110
111 #include <linux/types.h> 111 #include <linux/types.h>
112 #include <linux/kernel.h> 112 #include <linux/kernel.h>
113 #include <linux/sched.h> 113 #include <linux/sched.h>
114 #include <linux/sched/debug.h> 114 #include <linux/sched/debug.h>
115 #include <linux/interrupt.h> 115 #include <linux/interrupt.h>
116 #include <linux/irq.h> 116 #include <linux/irq.h>
117 #include <linux/delay.h> 117 #include <linux/delay.h>
118 118
119 #include <asm/irq.h> 119 #include <asm/irq.h>
120 #include <asm/macintosh.h> 120 #include <asm/macintosh.h>
121 #include <asm/macints.h> 121 #include <asm/macints.h>
122 #include <asm/mac_via.h> 122 #include <asm/mac_via.h>
123 #include <asm/mac_psc.h> 123 #include <asm/mac_psc.h>
124 #include <asm/mac_oss.h> 124 #include <asm/mac_oss.h>
125 #include <asm/mac_iop.h> 125 #include <asm/mac_iop.h>
126 #include <asm/mac_baboon.h> 126 #include <asm/mac_baboon.h>
127 #include <asm/hwtest.h> 127 #include <asm/hwtest.h>
128 #include <asm/irq_regs.h> 128 #include <asm/irq_regs.h>
129 #include <asm/processor.h> 129 #include <asm/processor.h>
130 130
131 static unsigned int mac_irq_startup(struct irq 131 static unsigned int mac_irq_startup(struct irq_data *);
132 static void mac_irq_shutdown(struct irq_data * 132 static void mac_irq_shutdown(struct irq_data *);
133 133
134 static struct irq_chip mac_irq_chip = { 134 static struct irq_chip mac_irq_chip = {
135 .name = "mac", 135 .name = "mac",
136 .irq_enable = mac_irq_enable, 136 .irq_enable = mac_irq_enable,
137 .irq_disable = mac_irq_disable, 137 .irq_disable = mac_irq_disable,
138 .irq_startup = mac_irq_startup, 138 .irq_startup = mac_irq_startup,
139 .irq_shutdown = mac_irq_shutdown, 139 .irq_shutdown = mac_irq_shutdown,
140 }; 140 };
141 141
142 static irqreturn_t mac_nmi_handler(int irq, vo 142 static irqreturn_t mac_nmi_handler(int irq, void *dev_id)
143 { 143 {
144 static volatile int in_nmi; 144 static volatile int in_nmi;
145 145
146 if (in_nmi) 146 if (in_nmi)
147 return IRQ_HANDLED; 147 return IRQ_HANDLED;
148 in_nmi = 1; 148 in_nmi = 1;
149 149
150 pr_info("Non-Maskable Interrupt\n"); 150 pr_info("Non-Maskable Interrupt\n");
151 show_registers(get_irq_regs()); 151 show_registers(get_irq_regs());
152 152
153 in_nmi = 0; 153 in_nmi = 0;
154 return IRQ_HANDLED; 154 return IRQ_HANDLED;
155 } 155 }
156 156
157 void __init mac_init_IRQ(void) 157 void __init mac_init_IRQ(void)
158 { 158 {
159 m68k_setup_irq_controller(&mac_irq_chi 159 m68k_setup_irq_controller(&mac_irq_chip, handle_simple_irq, IRQ_USER,
160 NUM_MAC_SOUR 160 NUM_MAC_SOURCES - IRQ_USER);
161 161
162 /* 162 /*
163 * Now register the handlers for the m 163 * Now register the handlers for the master IRQ handlers
164 * at levels 1-7. Most of the work is 164 * at levels 1-7. Most of the work is done elsewhere.
165 */ 165 */
166 166
167 if (oss_present) 167 if (oss_present)
168 oss_register_interrupts(); 168 oss_register_interrupts();
169 else 169 else
170 via_register_interrupts(); 170 via_register_interrupts();
171 if (psc) 171 if (psc)
172 psc_register_interrupts(); 172 psc_register_interrupts();
173 if (baboon_present) 173 if (baboon_present)
174 baboon_register_interrupts(); 174 baboon_register_interrupts();
175 iop_register_interrupts(); 175 iop_register_interrupts();
176 if (request_irq(IRQ_AUTO_7, mac_nmi_ha 176 if (request_irq(IRQ_AUTO_7, mac_nmi_handler, 0, "NMI",
177 mac_nmi_handler)) 177 mac_nmi_handler))
178 pr_err("Couldn't register NMI\ 178 pr_err("Couldn't register NMI\n");
179 } 179 }
180 180
181 /* 181 /*
182 * mac_irq_enable - enable an interrupt sourc 182 * mac_irq_enable - enable an interrupt source
183 * mac_irq_disable - disable an interrupt sour 183 * mac_irq_disable - disable an interrupt source
184 * 184 *
185 * These routines are just dispatchers to the 185 * These routines are just dispatchers to the VIA/OSS/PSC routines.
186 */ 186 */
187 187
188 void mac_irq_enable(struct irq_data *data) 188 void mac_irq_enable(struct irq_data *data)
189 { 189 {
190 int irq = data->irq; 190 int irq = data->irq;
191 int irq_src = IRQ_SRC(irq); 191 int irq_src = IRQ_SRC(irq);
192 192
193 switch(irq_src) { 193 switch(irq_src) {
194 case 1: 194 case 1:
195 case 2: 195 case 2:
196 case 7: 196 case 7:
197 if (oss_present) 197 if (oss_present)
198 oss_irq_enable(irq); 198 oss_irq_enable(irq);
199 else 199 else
200 via_irq_enable(irq); 200 via_irq_enable(irq);
201 break; 201 break;
202 case 3: 202 case 3:
203 case 4: 203 case 4:
204 case 5: 204 case 5:
205 case 6: 205 case 6:
206 if (psc) 206 if (psc)
207 psc_irq_enable(irq); 207 psc_irq_enable(irq);
208 else if (oss_present) 208 else if (oss_present)
209 oss_irq_enable(irq); 209 oss_irq_enable(irq);
210 break; 210 break;
211 case 8: 211 case 8:
212 if (baboon_present) 212 if (baboon_present)
213 baboon_irq_enable(irq) 213 baboon_irq_enable(irq);
214 break; 214 break;
215 } 215 }
216 } 216 }
217 217
218 void mac_irq_disable(struct irq_data *data) 218 void mac_irq_disable(struct irq_data *data)
219 { 219 {
220 int irq = data->irq; 220 int irq = data->irq;
221 int irq_src = IRQ_SRC(irq); 221 int irq_src = IRQ_SRC(irq);
222 222
223 switch(irq_src) { 223 switch(irq_src) {
224 case 1: 224 case 1:
225 case 2: 225 case 2:
226 case 7: 226 case 7:
227 if (oss_present) 227 if (oss_present)
228 oss_irq_disable(irq); 228 oss_irq_disable(irq);
229 else 229 else
230 via_irq_disable(irq); 230 via_irq_disable(irq);
231 break; 231 break;
232 case 3: 232 case 3:
233 case 4: 233 case 4:
234 case 5: 234 case 5:
235 case 6: 235 case 6:
236 if (psc) 236 if (psc)
237 psc_irq_disable(irq); 237 psc_irq_disable(irq);
238 else if (oss_present) 238 else if (oss_present)
239 oss_irq_disable(irq); 239 oss_irq_disable(irq);
240 break; 240 break;
241 case 8: 241 case 8:
242 if (baboon_present) 242 if (baboon_present)
243 baboon_irq_disable(irq 243 baboon_irq_disable(irq);
244 break; 244 break;
245 } 245 }
246 } 246 }
247 247
248 static unsigned int mac_irq_startup(struct irq 248 static unsigned int mac_irq_startup(struct irq_data *data)
249 { 249 {
250 int irq = data->irq; 250 int irq = data->irq;
251 251
252 if (IRQ_SRC(irq) == 7 && !oss_present) 252 if (IRQ_SRC(irq) == 7 && !oss_present)
253 via_nubus_irq_startup(irq); 253 via_nubus_irq_startup(irq);
254 else 254 else
255 mac_irq_enable(data); 255 mac_irq_enable(data);
256 256
257 return 0; 257 return 0;
258 } 258 }
259 259
260 static void mac_irq_shutdown(struct irq_data * 260 static void mac_irq_shutdown(struct irq_data *data)
261 { 261 {
262 int irq = data->irq; 262 int irq = data->irq;
263 263
264 if (IRQ_SRC(irq) == 7 && !oss_present) 264 if (IRQ_SRC(irq) == 7 && !oss_present)
265 via_nubus_irq_shutdown(irq); 265 via_nubus_irq_shutdown(irq);
266 else 266 else
267 mac_irq_disable(data); 267 mac_irq_disable(data);
268 } 268 }
269 269
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