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Linux/arch/m68k/mm/hwtest.c

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Diff markup

Differences between /arch/m68k/mm/hwtest.c (Architecture sparc64) and /arch/m68k/mm/hwtest.c (Architecture m68k)


  1 // SPDX-License-Identifier: GPL-2.0                 1 // SPDX-License-Identifier: GPL-2.0
  2 /* Tests for presence or absence of hardware r      2 /* Tests for presence or absence of hardware registers.
  3  * This code was originally in atari/config.c,      3  * This code was originally in atari/config.c, but I noticed
  4  * that it was also in drivers/nubus/nubus.c a      4  * that it was also in drivers/nubus/nubus.c and I wanted to
  5  * use it in hp300/config.c, so it seemed sens      5  * use it in hp300/config.c, so it seemed sensible to pull it
  6  * out into its own file.                           6  * out into its own file.
  7  *                                                  7  *
  8  * The test is for use when trying to read a h      8  * The test is for use when trying to read a hardware register
  9  * that isn't present would cause a bus error.      9  * that isn't present would cause a bus error. We set up a
 10  * temporary handler so that this doesn't kill     10  * temporary handler so that this doesn't kill the kernel.
 11  *                                                 11  *
 12  * There is a test-by-reading and a test-by-wr     12  * There is a test-by-reading and a test-by-writing; I present
 13  * them here complete with the comments from t     13  * them here complete with the comments from the original atari
 14  * config.c...                                     14  * config.c...
 15  *                -- PMM <pmaydell@chiark.gree     15  *                -- PMM <pmaydell@chiark.greenend.org.uk>, 05/1998
 16  */                                                16  */
 17                                                    17 
 18 /* This function tests for the presence of an      18 /* This function tests for the presence of an address, specially a
 19  * hardware register address. It is called ver     19  * hardware register address. It is called very early in the kernel
 20  * initialization process, when the VBR regist     20  * initialization process, when the VBR register isn't set up yet. On
 21  * an Atari, it still points to address 0, whi     21  * an Atari, it still points to address 0, which is unmapped. So a bus
 22  * error would cause another bus error while f     22  * error would cause another bus error while fetching the exception
 23  * vector, and the CPU would do nothing at all     23  * vector, and the CPU would do nothing at all. So we needed to set up
 24  * a temporary VBR and a vector table for the      24  * a temporary VBR and a vector table for the duration of the test.
 25  */                                                25  */
 26                                                    26 
 27 #include <linux/module.h>                          27 #include <linux/module.h>
 28                                                    28 
 29 #include <asm/hwtest.h>                            29 #include <asm/hwtest.h>
 30                                                    30 
 31 int hwreg_present(volatile void *regp)             31 int hwreg_present(volatile void *regp)
 32 {                                                  32 {
 33         int ret = 0;                               33         int ret = 0;
 34         unsigned long flags;                       34         unsigned long flags;
 35         long save_sp, save_vbr;                    35         long save_sp, save_vbr;
 36         long tmp_vectors[3];                       36         long tmp_vectors[3];
 37                                                    37 
 38         local_irq_save(flags);                     38         local_irq_save(flags);
 39         __asm__ __volatile__ (                     39         __asm__ __volatile__ (
 40                 "movec %/vbr,%2\n\t"               40                 "movec %/vbr,%2\n\t"
 41                 "movel #Lberr1,%4@(8)\n\t"         41                 "movel #Lberr1,%4@(8)\n\t"
 42                 "movec %4,%/vbr\n\t"               42                 "movec %4,%/vbr\n\t"
 43                 "movel %/sp,%1\n\t"                43                 "movel %/sp,%1\n\t"
 44                 "moveq #0,%0\n\t"                  44                 "moveq #0,%0\n\t"
 45                 "tstb %3@\n\t"                     45                 "tstb %3@\n\t"
 46                 "nop\n\t"                          46                 "nop\n\t"
 47                 "moveq #1,%0\n"                    47                 "moveq #1,%0\n"
 48         "Lberr1:\n\t"                              48         "Lberr1:\n\t"
 49                 "movel %1,%/sp\n\t"                49                 "movel %1,%/sp\n\t"
 50                 "movec %2,%/vbr"                   50                 "movec %2,%/vbr"
 51                 : "=&d" (ret), "=&r" (save_sp)     51                 : "=&d" (ret), "=&r" (save_sp), "=&r" (save_vbr)
 52                 : "a" (regp), "a" (tmp_vectors     52                 : "a" (regp), "a" (tmp_vectors)
 53         );                                         53         );
 54         local_irq_restore(flags);                  54         local_irq_restore(flags);
 55                                                    55 
 56         return ret;                                56         return ret;
 57 }                                                  57 }
 58 EXPORT_SYMBOL(hwreg_present);                      58 EXPORT_SYMBOL(hwreg_present);
 59                                                    59 
 60 /* Basically the same, but writes a value into     60 /* Basically the same, but writes a value into a word register, protected
 61  * by a bus error handler. Returns 1 if succes     61  * by a bus error handler. Returns 1 if successful, 0 otherwise.
 62  */                                                62  */
 63                                                    63 
 64 int hwreg_write(volatile void *regp, unsigned      64 int hwreg_write(volatile void *regp, unsigned short val)
 65 {                                                  65 {
 66         int ret;                                   66         int ret;
 67         unsigned long flags;                       67         unsigned long flags;
 68         long save_sp, save_vbr;                    68         long save_sp, save_vbr;
 69         long tmp_vectors[3];                       69         long tmp_vectors[3];
 70                                                    70 
 71         local_irq_save(flags);                     71         local_irq_save(flags);
 72         __asm__ __volatile__ (                     72         __asm__ __volatile__ (
 73                 "movec %/vbr,%2\n\t"               73                 "movec %/vbr,%2\n\t"
 74                 "movel #Lberr2,%4@(8)\n\t"         74                 "movel #Lberr2,%4@(8)\n\t"
 75                 "movec %4,%/vbr\n\t"               75                 "movec %4,%/vbr\n\t"
 76                 "movel %/sp,%1\n\t"                76                 "movel %/sp,%1\n\t"
 77                 "moveq #0,%0\n\t"                  77                 "moveq #0,%0\n\t"
 78                 "movew %5,%3@\n\t"                 78                 "movew %5,%3@\n\t"
 79                 "nop\n\t"                          79                 "nop\n\t"
 80                 /*                                 80                 /*
 81                  * If this nop isn't present,      81                  * If this nop isn't present, 'ret' may already be loaded
 82                  * with 1 at the time the bus      82                  * with 1 at the time the bus error happens!
 83                  */                                83                  */
 84                 "moveq #1,%0\n"                    84                 "moveq #1,%0\n"
 85         "Lberr2:\n\t"                              85         "Lberr2:\n\t"
 86                 "movel %1,%/sp\n\t"                86                 "movel %1,%/sp\n\t"
 87                 "movec %2,%/vbr"                   87                 "movec %2,%/vbr"
 88                 : "=&d" (ret), "=&r" (save_sp)     88                 : "=&d" (ret), "=&r" (save_sp), "=&r" (save_vbr)
 89                 : "a" (regp), "a" (tmp_vectors     89                 : "a" (regp), "a" (tmp_vectors), "g" (val)
 90         );                                         90         );
 91         local_irq_restore(flags);                  91         local_irq_restore(flags);
 92                                                    92 
 93         return ret;                                93         return ret;
 94 }                                                  94 }
 95 EXPORT_SYMBOL(hwreg_write);                        95 EXPORT_SYMBOL(hwreg_write);
 96                                                    96 
 97                                                    97 

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