>> 1 /* -*- mode: asm -*-
>> 2 **
>> 3 ** head.S -- This file contains the initial boot code for the
>> 4 ** Linux/68k kernel.
>> 5 **
>> 6 ** Copyright 1993 by Hamish Macdonald
>> 7 **
>> 8 ** 68040 fixes by Michael Rausch
>> 9 ** 68060 fixes by Roman Hodek
>> 10 ** MMU cleanup by Randy Thelen
>> 11 ** Final MMU cleanup by Roman Zippel
>> 12 **
>> 13 ** Atari support by Andreas Schwab, using ideas of Robert de Vries
>> 14 ** and Bjoern Brauel
>> 15 ** VME Support by Richard Hirst
>> 16 **
>> 17 ** 94/11/14 Andreas Schwab: put kernel at PAGESIZE
>> 18 ** 94/11/18 Andreas Schwab: remove identity mapping of STRAM for Atari
>> 19 ** ++ Bjoern & Roman: ATARI-68040 support for the Medusa
>> 20 ** 95/11/18 Richard Hirst: Added MVME166 support
>> 21 ** 96/04/26 Guenther Kelleter: fixed identity mapping for Falcon with
>> 22 ** Magnum- and FX-alternate ram
>> 23 ** 98/04/25 Phil Blundell: added HP300 support
>> 24 ** 1998/08/30 David Kilzer: Added support for font_desc structures
>> 25 ** for linux-2.1.115
>> 26 ** 1999/02/11 Richard Zidlicky: added Q40 support (initial version 99/01/01)
>> 27 ** 2004/05/13 Kars de Jong: Finalised HP300 support
>> 28 **
>> 29 ** This file is subject to the terms and conditions of the GNU General Public
>> 30 ** License. See the file README.legal in the main directory of this archive
>> 31 ** for more details.
>> 32 **
>> 33 */
>> 34
1 /* 35 /*
2 * Copyright (C) 2007-2009 Michal Simek <monstr !! 36 * Linux startup code.
3 * Copyright (C) 2007-2009 PetaLogix !! 37 *
4 * Copyright (C) 2006 Atmark Techno, Inc. !! 38 * At this point, the boot loader has:
5 * !! 39 * Disabled interrupts
6 * MMU code derived from arch/ppc/kernel/head_ !! 40 * Disabled caches
7 * Copyright (c) 1995-1996 Gary Thomas <gdt@ !! 41 * Put us in supervisor state.
8 * Initial PowerPC version. !! 42 *
9 * Copyright (c) 1996 Cort Dougan <cort@cs.n !! 43 * The kernel setup code takes the following steps:
10 * Rewritten for PReP !! 44 * . Raise interrupt level
11 * Copyright (c) 1996 Paul Mackerras <paulus !! 45 * . Set up initial kernel memory mapping.
12 * Low-level exception handers, MMU suppo !! 46 * . This sets up a mapping of the 4M of memory the kernel is located in.
13 * Copyright (c) 1997 Dan Malek <dmalek@jlc. !! 47 * . It also does a mapping of any initial machine specific areas.
14 * PowerPC 8xx modifications. !! 48 * . Enable the MMU
15 * Copyright (c) 1998-1999 TiVo, Inc. !! 49 * . Enable cache memories
16 * PowerPC 403GCX modifications. !! 50 * . Jump to kernel startup
17 * Copyright (c) 1999 Grant Erickson <grant@ !! 51 *
18 * PowerPC 403GCX/405GP modifications. !! 52 * Much of the file restructuring was to accomplish:
19 * Copyright 2000 MontaVista Software Inc. !! 53 * 1) Remove register dependency through-out the file.
20 * PPC405 modifications !! 54 * 2) Increase use of subroutines to perform functions
21 * PowerPC 403GCX/405GP modifications. !! 55 * 3) Increase readability of the code
22 * Author: MontaVista Software, Inc. !! 56 *
23 * frank_rowand@mvista.com or sou !! 57 * Of course, readability is a subjective issue, so it will never be
24 * debbie_chu@mvista.com !! 58 * argued that that goal was accomplished. It was merely a goal.
25 * !! 59 * A key way to help make code more readable is to give good
26 * This file is subject to the terms and condi !! 60 * documentation. So, the first thing you will find is exhaustive
27 * License. See the file "COPYING" in the main !! 61 * write-ups on the structure of the file, and the features of the
28 * for more details. !! 62 * functional subroutines.
>> 63 *
>> 64 * General Structure:
>> 65 * ------------------
>> 66 * Without a doubt the single largest chunk of head.S is spent
>> 67 * mapping the kernel and I/O physical space into the logical range
>> 68 * for the kernel.
>> 69 * There are new subroutines and data structures to make MMU
>> 70 * support cleaner and easier to understand.
>> 71 * First, you will find a routine call "mmu_map" which maps
>> 72 * a logical to a physical region for some length given a cache
>> 73 * type on behalf of the caller. This routine makes writing the
>> 74 * actual per-machine specific code very simple.
>> 75 * A central part of the code, but not a subroutine in itself,
>> 76 * is the mmu_init code which is broken down into mapping the kernel
>> 77 * (the same for all machines) and mapping machine-specific I/O
>> 78 * regions.
>> 79 * Also, there will be a description of engaging the MMU and
>> 80 * caches.
>> 81 * You will notice that there is a chunk of code which
>> 82 * can emit the entire MMU mapping of the machine. This is present
>> 83 * only in debug modes and can be very helpful.
>> 84 * Further, there is a new console driver in head.S that is
>> 85 * also only engaged in debug mode. Currently, it's only supported
>> 86 * on the Macintosh class of machines. However, it is hoped that
>> 87 * others will plug-in support for specific machines.
>> 88 *
>> 89 * ######################################################################
>> 90 *
>> 91 * mmu_map
>> 92 * -------
>> 93 * mmu_map was written for two key reasons. First, it was clear
>> 94 * that it was very difficult to read the previous code for mapping
>> 95 * regions of memory. Second, the Macintosh required such extensive
>> 96 * memory allocations that it didn't make sense to propagate the
>> 97 * existing code any further.
>> 98 * mmu_map requires some parameters:
>> 99 *
>> 100 * mmu_map (logical, physical, length, cache_type)
>> 101 *
>> 102 * While this essentially describes the function in the abstract, you'll
>> 103 * find more indepth description of other parameters at the implementation site.
>> 104 *
>> 105 * mmu_get_root_table_entry
>> 106 * ------------------------
>> 107 * mmu_get_ptr_table_entry
>> 108 * -----------------------
>> 109 * mmu_get_page_table_entry
>> 110 * ------------------------
>> 111 *
>> 112 * These routines are used by other mmu routines to get a pointer into
>> 113 * a table, if necessary a new table is allocated. These routines are working
>> 114 * basically like pmd_alloc() and pte_alloc() in <asm/pgtable.h>. The root
>> 115 * table needs of course only to be allocated once in mmu_get_root_table_entry,
>> 116 * so that here also some mmu specific initialization is done. The second page
>> 117 * at the start of the kernel (the first page is unmapped later) is used for
>> 118 * the kernel_pg_dir. It must be at a position known at link time (as it's used
>> 119 * to initialize the init task struct) and since it needs special cache
>> 120 * settings, it's the easiest to use this page, the rest of the page is used
>> 121 * for further pointer tables.
>> 122 * mmu_get_page_table_entry allocates always a whole page for page tables, this
>> 123 * means 1024 pages and so 4MB of memory can be mapped. It doesn't make sense
>> 124 * to manage page tables in smaller pieces as nearly all mappings have that
>> 125 * size.
>> 126 *
>> 127 * ######################################################################
>> 128 *
>> 129 *
>> 130 * ######################################################################
>> 131 *
>> 132 * mmu_engage
>> 133 * ----------
>> 134 * Thanks to a small helping routine enabling the mmu got quite simple
>> 135 * and there is only one way left. mmu_engage makes a complete a new mapping
>> 136 * that only includes the absolute necessary to be able to jump to the final
>> 137 * position and to restore the original mapping.
>> 138 * As this code doesn't need a transparent translation register anymore this
>> 139 * means all registers are free to be used by machines that needs them for
>> 140 * other purposes.
>> 141 *
>> 142 * ######################################################################
>> 143 *
>> 144 * mmu_print
>> 145 * ---------
>> 146 * This algorithm will print out the page tables of the system as
>> 147 * appropriate for an 030 or an 040. This is useful for debugging purposes
>> 148 * and as such is enclosed in #ifdef MMU_PRINT/#endif clauses.
>> 149 *
>> 150 * ######################################################################
>> 151 *
>> 152 * console_init
>> 153 * ------------
>> 154 * The console is also able to be turned off. The console in head.S
>> 155 * is specifically for debugging and can be very useful. It is surrounded by
>> 156 * #ifdef / #endif clauses so it doesn't have to ship in known-good
>> 157 * kernels. It's basic algorithm is to determine the size of the screen
>> 158 * (in height/width and bit depth) and then use that information for
>> 159 * displaying an 8x8 font or an 8x16 (widthxheight). I prefer the 8x8 for
>> 160 * debugging so I can see more good data. But it was trivial to add support
>> 161 * for both fonts, so I included it.
>> 162 * Also, the algorithm for plotting pixels is abstracted so that in
>> 163 * theory other platforms could add support for different kinds of frame
>> 164 * buffers. This could be very useful.
>> 165 *
>> 166 * console_put_penguin
>> 167 * -------------------
>> 168 * An important part of any Linux bring up is the penguin and there's
>> 169 * nothing like getting the Penguin on the screen! This algorithm will work
>> 170 * on any machine for which there is a console_plot_pixel.
>> 171 *
>> 172 * console_scroll
>> 173 * --------------
>> 174 * My hope is that the scroll algorithm does the right thing on the
>> 175 * various platforms, but it wouldn't be hard to add the test conditions
>> 176 * and new code if it doesn't.
>> 177 *
>> 178 * console_putc
>> 179 * -------------
>> 180 *
>> 181 * ######################################################################
>> 182 *
>> 183 * Register usage has greatly simplified within head.S. Every subroutine
>> 184 * saves and restores all registers that it modifies (except it returns a
>> 185 * value in there of course). So the only register that needs to be initialized
>> 186 * is the stack pointer.
>> 187 * All other init code and data is now placed in the init section, so it will
>> 188 * be automatically freed at the end of the kernel initialization.
>> 189 *
>> 190 * ######################################################################
>> 191 *
>> 192 * options
>> 193 * -------
>> 194 * There are many options available in a build of this file. I've
>> 195 * taken the time to describe them here to save you the time of searching
>> 196 * for them and trying to understand what they mean.
>> 197 *
>> 198 * CONFIG_xxx: These are the obvious machine configuration defines created
>> 199 * during configuration. These are defined in autoconf.h.
>> 200 *
>> 201 * CONSOLE_DEBUG: Only supports a Mac frame buffer but could easily be
>> 202 * extended to support other platforms.
>> 203 *
>> 204 * TEST_MMU: This is a test harness for running on any given machine but
>> 205 * getting an MMU dump for another class of machine. The classes of machines
>> 206 * that can be tested are any of the makes (Atari, Amiga, Mac, VME, etc.)
>> 207 * and any of the models (030, 040, 060, etc.).
>> 208 *
>> 209 * NOTE: TEST_MMU is NOT permanent! It is scheduled to be removed
>> 210 * When head.S boots on Atari, Amiga, Macintosh, and VME
>> 211 * machines. At that point the underlying logic will be
>> 212 * believed to be solid enough to be trusted, and TEST_MMU
>> 213 * can be dropped. Do note that that will clean up the
>> 214 * head.S code significantly as large blocks of #if/#else
>> 215 * clauses can be removed.
>> 216 *
>> 217 * MMU_NOCACHE_KERNEL: On the Macintosh platform there was an inquiry into
>> 218 * determing why devices don't appear to work. A test case was to remove
>> 219 * the cacheability of the kernel bits.
>> 220 *
>> 221 * MMU_PRINT: There is a routine built into head.S that can display the
>> 222 * MMU data structures. It outputs its result through the serial_putc
>> 223 * interface. So where ever that winds up driving data, that's where the
>> 224 * mmu struct will appear.
>> 225 *
>> 226 * SERIAL_DEBUG: There are a series of putc() macro statements
>> 227 * scattered through out the code to give progress of status to the
>> 228 * person sitting at the console. This constant determines whether those
>> 229 * are used.
>> 230 *
>> 231 * DEBUG: This is the standard DEBUG flag that can be set for building
>> 232 * the kernel. It has the effect adding additional tests into
>> 233 * the code.
>> 234 *
>> 235 * FONT_6x11:
>> 236 * FONT_8x8:
>> 237 * FONT_8x16:
>> 238 * In theory these could be determined at run time or handed
>> 239 * over by the booter. But, let's be real, it's a fine hard
>> 240 * coded value. (But, you will notice the code is run-time
>> 241 * flexible!) A pointer to the font's struct font_desc
>> 242 * is kept locally in Lconsole_font. It is used to determine
>> 243 * font size information dynamically.
>> 244 *
>> 245 * Atari constants:
>> 246 * USE_PRINTER: Use the printer port for serial debug.
>> 247 * USE_SCC_B: Use the SCC port A (Serial2) for serial debug.
>> 248 * USE_SCC_A: Use the SCC port B (Modem2) for serial debug.
>> 249 * USE_MFP: Use the ST-MFP port (Modem1) for serial debug.
>> 250 *
>> 251 * Macintosh constants:
>> 252 * MAC_USE_SCC_A: Use SCC port A (modem) for serial debug.
>> 253 * MAC_USE_SCC_B: Use SCC port B (printer) for serial debug.
29 */ 254 */
30 255
31 #include <linux/init.h> <<
32 #include <linux/linkage.h> 256 #include <linux/linkage.h>
33 #include <asm/thread_info.h> !! 257 #include <linux/init.h>
>> 258 #include <linux/pgtable.h>
>> 259 #include <asm/bootinfo.h>
>> 260 #include <asm/bootinfo-amiga.h>
>> 261 #include <asm/bootinfo-atari.h>
>> 262 #include <asm/bootinfo-hp300.h>
>> 263 #include <asm/bootinfo-mac.h>
>> 264 #include <asm/bootinfo-q40.h>
>> 265 #include <asm/bootinfo-virt.h>
>> 266 #include <asm/bootinfo-vme.h>
>> 267 #include <asm/setup.h>
>> 268 #include <asm/entry.h>
34 #include <asm/page.h> 269 #include <asm/page.h>
35 #include <linux/of_fdt.h> /* for !! 270 #include <asm/asm-offsets.h>
>> 271 #ifdef CONFIG_MAC
>> 272 # include <asm/machw.h>
>> 273 #endif
>> 274
>> 275 #ifdef CONFIG_EARLY_PRINTK
>> 276 # define SERIAL_DEBUG
>> 277 # if defined(CONFIG_MAC) && defined(CONFIG_FONT_SUPPORT)
>> 278 # define CONSOLE_DEBUG
>> 279 # endif
>> 280 #endif
>> 281
>> 282 #undef MMU_PRINT
>> 283 #undef MMU_NOCACHE_KERNEL
>> 284 #undef DEBUG
>> 285
>> 286 /*
>> 287 * For the head.S console, there are three supported fonts, 6x11, 8x16 and 8x8.
>> 288 * The 8x8 font is harder to read but fits more on the screen.
>> 289 */
>> 290 #define FONT_8x8 /* default */
>> 291 /* #define FONT_8x16 */ /* 2nd choice */
>> 292 /* #define FONT_6x11 */ /* 3rd choice */
>> 293
>> 294 .globl kernel_pg_dir
>> 295 .globl availmem
>> 296 .globl m68k_init_mapped_size
>> 297 .globl m68k_pgtable_cachemode
>> 298 .globl m68k_supervisor_cachemode
>> 299 #ifdef CONFIG_MVME16x
>> 300 .globl mvme_bdid
>> 301 #endif
>> 302 #ifdef CONFIG_Q40
>> 303 .globl q40_mem_cptr
>> 304 #endif
>> 305
>> 306 CPUTYPE_040 = 1 /* indicates an 040 */
>> 307 CPUTYPE_060 = 2 /* indicates an 060 */
>> 308 CPUTYPE_0460 = 3 /* if either above are set, this is set */
>> 309 CPUTYPE_020 = 4 /* indicates an 020 */
>> 310
>> 311 /* Translation control register */
>> 312 TC_ENABLE = 0x8000
>> 313 TC_PAGE8K = 0x4000
>> 314 TC_PAGE4K = 0x0000
>> 315
>> 316 /* Transparent translation registers */
>> 317 TTR_ENABLE = 0x8000 /* enable transparent translation */
>> 318 TTR_ANYMODE = 0x4000 /* user and kernel mode access */
>> 319 TTR_KERNELMODE = 0x2000 /* only kernel mode access */
>> 320 TTR_USERMODE = 0x0000 /* only user mode access */
>> 321 TTR_CI = 0x0400 /* inhibit cache */
>> 322 TTR_RW = 0x0200 /* read/write mode */
>> 323 TTR_RWM = 0x0100 /* read/write mask */
>> 324 TTR_FCB2 = 0x0040 /* function code base bit 2 */
>> 325 TTR_FCB1 = 0x0020 /* function code base bit 1 */
>> 326 TTR_FCB0 = 0x0010 /* function code base bit 0 */
>> 327 TTR_FCM2 = 0x0004 /* function code mask bit 2 */
>> 328 TTR_FCM1 = 0x0002 /* function code mask bit 1 */
>> 329 TTR_FCM0 = 0x0001 /* function code mask bit 0 */
>> 330
>> 331 /* Cache Control registers */
>> 332 CC6_ENABLE_D = 0x80000000 /* enable data cache (680[46]0) */
>> 333 CC6_FREEZE_D = 0x40000000 /* freeze data cache (68060) */
>> 334 CC6_ENABLE_SB = 0x20000000 /* enable store buffer (68060) */
>> 335 CC6_PUSH_DPI = 0x10000000 /* disable CPUSH invalidation (68060) */
>> 336 CC6_HALF_D = 0x08000000 /* half-cache mode for data cache (68060) */
>> 337 CC6_ENABLE_B = 0x00800000 /* enable branch cache (68060) */
>> 338 CC6_CLRA_B = 0x00400000 /* clear all entries in branch cache (68060) */
>> 339 CC6_CLRU_B = 0x00200000 /* clear user entries in branch cache (68060) */
>> 340 CC6_ENABLE_I = 0x00008000 /* enable instruction cache (680[46]0) */
>> 341 CC6_FREEZE_I = 0x00004000 /* freeze instruction cache (68060) */
>> 342 CC6_HALF_I = 0x00002000 /* half-cache mode for instruction cache (68060) */
>> 343 CC3_ALLOC_WRITE = 0x00002000 /* write allocate mode(68030) */
>> 344 CC3_ENABLE_DB = 0x00001000 /* enable data burst (68030) */
>> 345 CC3_CLR_D = 0x00000800 /* clear data cache (68030) */
>> 346 CC3_CLRE_D = 0x00000400 /* clear entry in data cache (68030) */
>> 347 CC3_FREEZE_D = 0x00000200 /* freeze data cache (68030) */
>> 348 CC3_ENABLE_D = 0x00000100 /* enable data cache (68030) */
>> 349 CC3_ENABLE_IB = 0x00000010 /* enable instruction burst (68030) */
>> 350 CC3_CLR_I = 0x00000008 /* clear instruction cache (68030) */
>> 351 CC3_CLRE_I = 0x00000004 /* clear entry in instruction cache (68030) */
>> 352 CC3_FREEZE_I = 0x00000002 /* freeze instruction cache (68030) */
>> 353 CC3_ENABLE_I = 0x00000001 /* enable instruction cache (68030) */
>> 354
>> 355 /* Miscellaneous definitions */
>> 356 PAGESIZE = 4096
>> 357 PAGESHIFT = 12
>> 358
>> 359 ROOT_TABLE_SIZE = 128
>> 360 PTR_TABLE_SIZE = 128
>> 361 PAGE_TABLE_SIZE = 64
>> 362 ROOT_INDEX_SHIFT = 25
>> 363 PTR_INDEX_SHIFT = 18
>> 364 PAGE_INDEX_SHIFT = 12
>> 365
>> 366 #ifdef DEBUG
>> 367 /* When debugging use readable names for labels */
>> 368 #ifdef __STDC__
>> 369 #define L(name) .head.S.##name
>> 370 #else
>> 371 #define L(name) .head.S./**/name
>> 372 #endif
>> 373 #else
>> 374 #ifdef __STDC__
>> 375 #define L(name) .L##name
>> 376 #else
>> 377 #define L(name) .L/**/name
>> 378 #endif
>> 379 #endif
>> 380
>> 381 /* The __INITDATA stuff is a no-op when ftrace or kgdb are turned on */
>> 382 #ifndef __INITDATA
>> 383 #define __INITDATA .data
>> 384 #define __FINIT .previous
>> 385 #endif
>> 386
>> 387 /* Several macros to make the writing of subroutines easier:
>> 388 * - func_start marks the beginning of the routine which setups the frame
>> 389 * register and saves the registers, it also defines another macro
>> 390 * to automatically restore the registers again.
>> 391 * - func_return marks the end of the routine and simply calls the prepared
>> 392 * macro to restore registers and jump back to the caller.
>> 393 * - func_define generates another macro to automatically put arguments
>> 394 * onto the stack call the subroutine and cleanup the stack again.
>> 395 */
>> 396
>> 397 /* Within subroutines these macros can be used to access the arguments
>> 398 * on the stack. With STACK some allocated memory on the stack can be
>> 399 * accessed and ARG0 points to the return address (used by mmu_engage).
>> 400 */
>> 401 #define STACK %a6@(stackstart)
>> 402 #define ARG0 %a6@(4)
>> 403 #define ARG1 %a6@(8)
>> 404 #define ARG2 %a6@(12)
>> 405 #define ARG3 %a6@(16)
>> 406 #define ARG4 %a6@(20)
>> 407
>> 408 .macro func_start name,saveregs,stack=0
>> 409 L(\name):
>> 410 linkw %a6,#-\stack
>> 411 moveml \saveregs,%sp@-
>> 412 .set stackstart,-\stack
>> 413
>> 414 .macro func_return_\name
>> 415 moveml %sp@+,\saveregs
>> 416 unlk %a6
>> 417 rts
>> 418 .endm
>> 419 .endm
>> 420
>> 421 .macro func_return name
>> 422 func_return_\name
>> 423 .endm
>> 424
>> 425 .macro func_call name
>> 426 jbsr L(\name)
>> 427 .endm
>> 428
>> 429 .macro move_stack nr,arg1,arg2,arg3,arg4
>> 430 .if \nr
>> 431 move_stack "(\nr-1)",\arg2,\arg3,\arg4
>> 432 movel \arg1,%sp@-
>> 433 .endif
>> 434 .endm
>> 435
>> 436 .macro func_define name,nr=0
>> 437 .macro \name arg1,arg2,arg3,arg4
>> 438 move_stack \nr,\arg1,\arg2,\arg3,\arg4
>> 439 func_call \name
>> 440 .if \nr
>> 441 lea %sp@(\nr*4),%sp
>> 442 .endif
>> 443 .endm
>> 444 .endm
>> 445
>> 446 func_define mmu_map,4
>> 447 func_define mmu_map_tt,4
>> 448 func_define mmu_fixup_page_mmu_cache,1
>> 449 func_define mmu_temp_map,2
>> 450 func_define mmu_engage
>> 451 func_define mmu_get_root_table_entry,1
>> 452 func_define mmu_get_ptr_table_entry,2
>> 453 func_define mmu_get_page_table_entry,2
>> 454 func_define mmu_print
>> 455 func_define get_new_page
>> 456 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
>> 457 func_define set_leds
>> 458 #endif
>> 459
>> 460 .macro mmu_map_eq arg1,arg2,arg3
>> 461 mmu_map \arg1,\arg1,\arg2,\arg3
>> 462 .endm
>> 463
>> 464 .macro get_bi_record record
>> 465 pea \record
>> 466 func_call get_bi_record
>> 467 addql #4,%sp
>> 468 .endm
>> 469
>> 470 func_define serial_putc,1
>> 471 func_define console_putc,1
>> 472
>> 473 func_define console_init
>> 474 func_define console_put_penguin
>> 475 func_define console_plot_pixel,3
>> 476 func_define console_scroll
>> 477
>> 478 .macro putc ch
>> 479 #if defined(CONSOLE_DEBUG) || defined(SERIAL_DEBUG)
>> 480 pea \ch
>> 481 #endif
>> 482 #ifdef CONSOLE_DEBUG
>> 483 func_call console_putc
>> 484 #endif
>> 485 #ifdef SERIAL_DEBUG
>> 486 func_call serial_putc
>> 487 #endif
>> 488 #if defined(CONSOLE_DEBUG) || defined(SERIAL_DEBUG)
>> 489 addql #4,%sp
>> 490 #endif
>> 491 .endm
>> 492
>> 493 .macro dputc ch
>> 494 #ifdef DEBUG
>> 495 putc \ch
>> 496 #endif
>> 497 .endm
>> 498
>> 499 func_define putn,1
>> 500
>> 501 .macro dputn nr
>> 502 #ifdef DEBUG
>> 503 putn \nr
>> 504 #endif
>> 505 .endm
>> 506
>> 507 .macro puts string
>> 508 #if defined(CONSOLE_DEBUG) || defined(SERIAL_DEBUG)
>> 509 __INITDATA
>> 510 .Lstr\@:
>> 511 .string "\string"
>> 512 __FINIT
>> 513 pea %pc@(.Lstr\@)
>> 514 func_call puts
>> 515 addql #4,%sp
>> 516 #endif
>> 517 .endm
>> 518
>> 519 .macro dputs string
>> 520 #ifdef DEBUG
>> 521 puts "\string"
>> 522 #endif
>> 523 .endm
>> 524
>> 525 #define is_not_amiga(lab) cmpl &MACH_AMIGA,%pc@(m68k_machtype); jne lab
>> 526 #define is_not_atari(lab) cmpl &MACH_ATARI,%pc@(m68k_machtype); jne lab
>> 527 #define is_not_mac(lab) cmpl &MACH_MAC,%pc@(m68k_machtype); jne lab
>> 528 #define is_not_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jne lab
>> 529 #define is_not_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jne lab
>> 530 #define is_not_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jne lab
>> 531 #define is_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jeq lab
>> 532 #define is_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jeq lab
>> 533 #define is_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jeq lab
>> 534 #define is_not_hp300(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); jne lab
>> 535 #define is_not_apollo(lab) cmpl &MACH_APOLLO,%pc@(m68k_machtype); jne lab
>> 536 #define is_not_q40(lab) cmpl &MACH_Q40,%pc@(m68k_machtype); jne lab
>> 537 #define is_not_sun3x(lab) cmpl &MACH_SUN3X,%pc@(m68k_machtype); jne lab
>> 538 #define is_not_virt(lab) cmpl &MACH_VIRT,%pc@(m68k_machtype); jne lab
>> 539
>> 540 #define hasnt_leds(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); \
>> 541 jeq 42f; \
>> 542 cmpl &MACH_APOLLO,%pc@(m68k_machtype); \
>> 543 jne lab ;\
>> 544 42:\
>> 545
>> 546 #define is_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jne lab
>> 547 #define is_not_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jeq lab
>> 548 #define is_040(lab) btst &CPUTYPE_040,%pc@(L(cputype)+3); jne lab
>> 549 #define is_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jne lab
>> 550 #define is_not_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jeq lab
>> 551 #define is_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+3); jne lab
>> 552 #define is_not_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+3); jeq lab
>> 553
>> 554 /* On the HP300 we use the on-board LEDs for debug output before
>> 555 the console is running. Writing a 1 bit turns the corresponding LED
>> 556 _off_ - on the 340 bit 7 is towards the back panel of the machine. */
>> 557 .macro leds mask
>> 558 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
>> 559 hasnt_leds(.Lled\@)
>> 560 pea \mask
>> 561 func_call set_leds
>> 562 addql #4,%sp
>> 563 .Lled\@:
>> 564 #endif
>> 565 .endm
>> 566
>> 567 __HEAD
>> 568 ENTRY(_stext)
>> 569 /*
>> 570 * Version numbers of the bootinfo interface
>> 571 * The area from _stext to _start will later be used as kernel pointer table
>> 572 */
>> 573 bras 1f /* Jump over bootinfo version numbers */
36 574
37 #include <asm/setup.h> /* COMMAND_LINE_SIZE */ !! 575 .long BOOTINFOV_MAGIC
38 #include <asm/mmu.h> !! 576 .long MACH_AMIGA, AMIGA_BOOTI_VERSION
39 #include <asm/processor.h> !! 577 .long MACH_ATARI, ATARI_BOOTI_VERSION
40 !! 578 .long MACH_MVME147, MVME147_BOOTI_VERSION
41 .section .data !! 579 .long MACH_MVME16x, MVME16x_BOOTI_VERSION
42 .global empty_zero_page !! 580 .long MACH_BVME6000, BVME6000_BOOTI_VERSION
43 .align 12 !! 581 .long MACH_MAC, MAC_BOOTI_VERSION
44 empty_zero_page: !! 582 .long MACH_Q40, Q40_BOOTI_VERSION
45 .space PAGE_SIZE !! 583 .long MACH_HP300, HP300_BOOTI_VERSION
46 .global swapper_pg_dir !! 584 .long 0
47 swapper_pg_dir: !! 585 1: jra __start
48 .space PAGE_SIZE !! 586
49 !! 587 .equ kernel_pg_dir,_stext
50 .section .rodata !! 588
51 .align 4 !! 589 .equ .,_stext+PAGESIZE
52 endian_check: <<
53 .word 1 <<
54 590
55 __HEAD <<
56 ENTRY(_start) 591 ENTRY(_start)
57 #if CONFIG_KERNEL_BASE_ADDR == 0 !! 592 jra __start
58 brai TOPHYS(real_start) !! 593 __INIT
59 .org 0x100 !! 594 ENTRY(__start)
60 real_start: !! 595 /*
61 #endif !! 596 * Setup initial stack pointer
62 !! 597 */
63 mts rmsr, r0 !! 598 lea %pc@(_stext),%sp
64 /* Disable stack protection from bootloader */ !! 599
65 mts rslr, r0 !! 600 /*
66 addi r8, r0, 0xFFFFFFFF !! 601 * Record the CPU and machine type.
67 mts rshr, r8 !! 602 */
68 /* !! 603 get_bi_record BI_MACHTYPE
69 * According to Xilinx, msrclr instruction beh !! 604 lea %pc@(m68k_machtype),%a1
70 * if the msrclr instruction is not enabled. W !! 605 movel %a0@,%a1@
71 * if the opcode is available, by issuing msrc !! 606
72 * r8 == 0 - msr instructions are implemented !! 607 get_bi_record BI_FPUTYPE
73 * r8 != 0 - msr instructions are not implemen !! 608 lea %pc@(m68k_fputype),%a1
74 */ !! 609 movel %a0@,%a1@
75 mfs r1, rmsr !! 610
76 msrclr r8, 0 /* clear nothing - just !! 611 get_bi_record BI_MMUTYPE
77 cmpu r8, r8, r1 /* r1 must contain !! 612 lea %pc@(m68k_mmutype),%a1
78 !! 613 movel %a0@,%a1@
79 /* r7 may point to an FDT, or there may be one !! 614
80 if it's in r7, we've got to save it away AS !! 615 get_bi_record BI_CPUTYPE
81 We ensure r7 points to a valid FDT, just in !! 616 lea %pc@(m68k_cputype),%a1
82 is broken or non-existent */ !! 617 movel %a0@,%a1@
83 beqi r7, no_fdt_arg !! 618
84 /* Does r7 point to a valid FDT? Load HEADER m !! 619 leds 0x1
85 /* Run time Big/Little endian platform !! 620
86 /* Save 1 as word and load byte - 0 - !! 621 #ifdef CONFIG_MAC
87 lbui r11, r0, TOPHYS(endian_check) !! 622 /*
88 beqid r11, big_endian /* DO NOT brea !! 623 * For Macintosh, we need to determine the display parameters early (at least
89 lw r11, r0, r7 /* Big endian load !! 624 * while debugging it).
90 lwr r11, r0, r7 /* Little endian l !! 625 */
91 big_endian: !! 626
92 rsubi r11, r11, OF_DT_HEADER /* Che !! 627 is_not_mac(L(test_notmac))
93 beqi r11, _prepare_copy_fdt !! 628
94 or r7, r0, r0 /* cle !! 629 get_bi_record BI_MAC_VADDR
95 bnei r11, no_fdt_arg !! 630 lea %pc@(L(mac_videobase)),%a1
96 _prepare_copy_fdt: !! 631 movel %a0@,%a1@
97 or r11, r0, r0 /* incremment */ !! 632
98 ori r4, r0, TOPHYS(_fdt_start) !! 633 get_bi_record BI_MAC_VDEPTH
99 ori r3, r0, (0x10000 - 4) !! 634 lea %pc@(L(mac_videodepth)),%a1
100 _copy_fdt: !! 635 movel %a0@,%a1@
101 lw r12, r7, r11 /* r12 = r7 + r11 !! 636
102 sw r12, r4, r11 /* addr[r4 + r11] !! 637 get_bi_record BI_MAC_VDIM
103 addik r11, r11, 4 /* increment count !! 638 lea %pc@(L(mac_dimensions)),%a1
104 bgtid r3, _copy_fdt /* loop for all !! 639 movel %a0@,%a1@
105 addik r3, r3, -4 /* descrement loop !! 640
106 no_fdt_arg: !! 641 get_bi_record BI_MAC_VROW
107 !! 642 lea %pc@(L(mac_rowbytes)),%a1
108 #ifndef CONFIG_CMDLINE_BOOL !! 643 movel %a0@,%a1@
109 /* !! 644
110 * handling command line !! 645 get_bi_record BI_MAC_SCCBASE
111 * copy command line directly to cmd_line plac !! 646 lea %pc@(L(mac_sccbase)),%a1
112 */ !! 647 movel %a0@,%a1@
113 beqid r5, skip /* Skip if NUL !! 648
114 or r11, r0, r0 /* inc !! 649 L(test_notmac):
115 ori r4, r0, cmd_line /* loa !! 650 #endif /* CONFIG_MAC */
116 tophys(r4,r4) /* con !! 651
117 ori r3, r0, COMMAND_LINE_SIZE - 1 !! 652 #ifdef CONFIG_VIRT
118 _copy_command_line: !! 653 is_not_virt(L(test_notvirt))
119 /* r2=r5+r11 - r5 contain pointer to c !! 654
120 lbu r2, r5, r11 !! 655 get_bi_record BI_VIRT_GF_TTY_BASE
121 beqid r2, skip /* Ski !! 656 lea %pc@(L(virt_gf_tty_base)),%a1
122 sb r2, r4, r11 /* add !! 657 movel %a0@,%a1@
123 addik r11, r11, 1 /* inc !! 658 L(test_notvirt):
124 bgtid r3, _copy_command_line /* loo !! 659 #endif /* CONFIG_VIRT */
125 addik r3, r3, -1 /* dec !! 660
126 addik r5, r4, 0 /* add !! 661 /*
127 tovirt(r5,r5) !! 662 * There are ultimately two pieces of information we want for all kinds of
128 skip: !! 663 * processors CpuType and CacheBits. The CPUTYPE was passed in from booter
129 #endif /* CONFIG_CMDLINE_BOOL */ !! 664 * and is converted here from a booter type definition to a separate bit
130 !! 665 * number which allows for the standard is_0x0 macro tests.
131 #ifdef NOT_COMPILE !! 666 */
132 /* save bram context */ !! 667 movel %pc@(m68k_cputype),%d0
133 or r11, r0, r0 !! 668 /*
134 ori r4, r0, TOPHYS(_bram_load_star !! 669 * Assume it's an 030
135 ori r3, r0, (LMB_SIZE - 4) !! 670 */
136 _copy_bram: !! 671 clrl %d1
137 lw r7, r0, r11 /* r7 !! 672
138 sw r7, r4, r11 /* add !! 673 /*
139 addik r11, r11, 4 /* inc !! 674 * Test the BootInfo cputype for 060
140 bgtid r3, _copy_bram /* loo !! 675 */
141 addik r3, r3, -4 /* des !! 676 btst #CPUB_68060,%d0
142 #endif !! 677 jeq 1f
143 /* We have to turn on the MMU right aw !! 678 bset #CPUTYPE_060,%d1
144 !! 679 bset #CPUTYPE_0460,%d1
145 /* !! 680 jra 3f
146 * Set up the initial MMU state so we !! 681 1:
147 * kernel initialization. This maps t !! 682 /*
148 * virtual to physical. !! 683 * Test the BootInfo cputype for 040
149 */ !! 684 */
150 nop !! 685 btst #CPUB_68040,%d0
151 addik r3, r0, MICROBLAZE_TLB_SIZE -1 !! 686 jeq 2f
152 _invalidate: !! 687 bset #CPUTYPE_040,%d1
153 mts rtlbx, r3 !! 688 bset #CPUTYPE_0460,%d1
154 mts rtlbhi, r0 !! 689 jra 3f
155 mts rtlblo, r0 !! 690 2:
156 bgtid r3, _invalidate /* loo !! 691 /*
157 addik r3, r3, -1 !! 692 * Test the BootInfo cputype for 020
158 /* sync */ !! 693 */
159 !! 694 btst #CPUB_68020,%d0
160 /* Setup the kernel PID */ !! 695 jeq 3f
161 mts rpid,r0 /* Loa !! 696 bset #CPUTYPE_020,%d1
162 nop !! 697 jra 3f
163 bri 4 !! 698 3:
164 !! 699 /*
165 /* !! 700 * Record the cpu type
166 * We should still be executing code a !! 701 */
167 * RAM_BASEADDR at this point. However !! 702 lea %pc@(L(cputype)),%a0
168 * a virtual address. So, set up a TLB !! 703 movel %d1,%a0@
169 * translation is enabled. !! 704
170 */ !! 705 /*
171 !! 706 * NOTE:
172 addik r3,r0, CONFIG_KERNEL_START /* !! 707 *
173 tophys(r4,r3) /* Loa !! 708 * Now the macros are valid:
174 !! 709 * is_040_or_060
175 /* start to do TLB calculation */ !! 710 * is_not_040_or_060
176 addik r12, r0, _end !! 711 * is_040
177 rsub r12, r3, r12 !! 712 * is_060
178 addik r12, r12, CONFIG_LOWMEM_SIZE > !! 713 * is_not_060
179 !! 714 */
180 or r9, r0, r0 /* TLB0 = 0 */ !! 715
181 or r10, r0, r0 /* TLB1 = 0 */ !! 716 /*
182 !! 717 * Determine the cache mode for pages holding MMU tables
183 addik r11, r12, -0x1000000 !! 718 * and for supervisor mode, unused for '020 and '030
184 bgei r11, GT16 /* size is greater t !! 719 */
185 addik r11, r12, -0x0800000 !! 720 clrl %d0
186 bgei r11, GT8 /* size is greater th !! 721 clrl %d1
187 addik r11, r12, -0x0400000 !! 722
188 bgei r11, GT4 /* size is greater th !! 723 is_not_040_or_060(L(save_cachetype))
189 /* size is less than 4MB */ !! 724
190 addik r11, r12, -0x0200000 !! 725 /*
191 bgei r11, GT2 /* size is greater th !! 726 * '040 or '060
192 addik r9, r0, 0x0100000 /* TLB0 must !! 727 * d1 := cacheable write-through
193 addik r11, r12, -0x0100000 !! 728 * NOTE: The 68040 manual strongly recommends non-cached for MMU tables,
194 bgei r11, GT1 /* size is greater th !! 729 * but we have been using write-through since at least 2.0.29 so I
195 /* TLB1 is 0 which is setup above */ !! 730 * guess it is OK.
196 bri tlb_end !! 731 */
197 GT4: /* r11 contains the rest - will be either !! 732 #ifdef CONFIG_060_WRITETHROUGH
198 ori r9, r0, 0x400000 /* TLB0 is 4MB */ !! 733 /*
199 bri TLB1 !! 734 * If this is a 68060 board using drivers with cache coherency
200 GT16: /* TLB0 is 16MB */ !! 735 * problems, then supervisor memory accesses need to be write-through
201 addik r9, r0, 0x1000000 /* means TLB !! 736 * also; otherwise, we want copyback.
202 TLB1: !! 737 */
203 /* must be used r2 because of subtract !! 738
204 addik r2, r11, -0x0400000 !! 739 is_not_060(1f)
205 bgei r2, GT20 /* size is greater th !! 740 movel #_PAGE_CACHE040W,%d0
206 /* size is >16MB and <20MB */ !! 741 jra L(save_cachetype)
207 addik r11, r11, -0x0100000 !! 742 #endif /* CONFIG_060_WRITETHROUGH */
208 bgei r11, GT17 /* size is greater t !! 743 1:
209 /* kernel is >16MB and < 17MB */ !! 744 movew #_PAGE_CACHE040,%d0
210 GT1: !! 745
211 addik r10, r0, 0x0100000 /* means TL !! 746 movel #_PAGE_CACHE040W,%d1
212 bri tlb_end !! 747
213 GT2: /* TLB0 is 0 and TLB1 will be 4MB */ !! 748 L(save_cachetype):
214 GT17: /* TLB1 is 4MB - kernel size <20MB */ !! 749 /* Save cache mode for supervisor mode and page tables
215 addik r10, r0, 0x0400000 /* means TL !! 750 */
216 bri tlb_end !! 751 lea %pc@(m68k_supervisor_cachemode),%a0
217 GT8: /* TLB0 is still zero that's why I can us !! 752 movel %d0,%a0@
218 GT20: /* TLB1 is 16MB - kernel size >20MB */ !! 753 lea %pc@(m68k_pgtable_cachemode),%a0
219 addik r10, r0, 0x1000000 /* means TL !! 754 movel %d1,%a0@
220 tlb_end: !! 755
221 !! 756 /*
222 /* !! 757 * raise interrupt level
223 * Configure and load two entries into !! 758 */
224 * In case we are pinning TLBs, these !! 759 movew #0x2700,%sr
225 * other TLB functions. If not reserv !! 760
226 * matter where they are loaded. !! 761 /*
227 */ !! 762 If running on an Atari, determine the I/O base of the
228 andi r4,r4,0xfffffc00 /* Mas !! 763 serial port and test if we are running on a Medusa or Hades.
229 ori r4,r4,(TLB_WR | TLB_EX) /* Set !! 764 This test is necessary here, because on the Hades the serial
230 !! 765 port is only accessible in the high I/O memory area.
231 /* !! 766
232 * TLB0 is always used - check if is n !! 767 The test whether it is a Medusa is done by writing to the byte at
233 * if is use TLB1 value and clear it ( !! 768 phys. 0x0. This should result in a bus error on all other machines.
234 */ !! 769
235 bnei r9, tlb0_not_zero !! 770 ...should, but doesn't. The Afterburner040 for the Falcon has the
236 add r9, r10, r0 !! 771 same behaviour (0x0..0x7 are no ROM shadow). So we have to do
237 add r10, r0, r0 !! 772 another test to distinguish Medusa and AB040. This is a
238 tlb0_not_zero: !! 773 read attempt for 0x00ff82fe phys. that should bus error on a Falcon
239 !! 774 (+AB040), but is in the range where the Medusa always asserts DTACK.
240 /* look at the code below */ !! 775
241 ori r30, r0, 0x200 !! 776 The test for the Hades is done by reading address 0xb0000000. This
242 andi r29, r9, 0x100000 !! 777 should give a bus error on the Medusa.
243 bneid r29, 1f !! 778 */
244 addik r30, r30, 0x80 !! 779
245 andi r29, r9, 0x400000 !! 780 #ifdef CONFIG_ATARI
246 bneid r29, 1f !! 781 is_not_atari(L(notypetest))
247 addik r30, r30, 0x80 !! 782
248 andi r29, r9, 0x1000000 !! 783 /* get special machine type (Medusa/Hades/AB40) */
249 bneid r29, 1f !! 784 moveq #0,%d3 /* default if tag doesn't exist */
250 addik r30, r30, 0x80 !! 785 get_bi_record BI_ATARI_MCH_TYPE
251 1: !! 786 tstl %d0
252 andi r3,r3,0xfffffc00 /* Mas !! 787 jbmi 1f
253 ori r3,r3,(TLB_VALID) !! 788 movel %a0@,%d3
254 or r3, r3, r30 !! 789 lea %pc@(atari_mch_type),%a0
255 !! 790 movel %d3,%a0@
256 /* Load tlb_skip size value which is i !! 791 1:
257 lwi r11, r0, TOPHYS(tlb_skip) !! 792 /* On the Hades, the iobase must be set up before opening the
258 mts rtlbx,r11 /* TLB !! 793 * serial port. There are no I/O regs at 0x00ffxxxx at all. */
259 !! 794 moveq #0,%d0
260 mts rtlblo,r4 /* Loa !! 795 cmpl #ATARI_MACH_HADES,%d3
261 mts rtlbhi,r3 /* Loa !! 796 jbne 1f
262 !! 797 movel #0xff000000,%d0 /* Hades I/O base addr: 0xff000000 */
263 /* Increase tlb_skip size */ !! 798 1: lea %pc@(L(iobase)),%a0
264 addik r11, r11, 1 !! 799 movel %d0,%a0@
265 swi r11, r0, TOPHYS(tlb_skip) !! 800
266 !! 801 L(notypetest):
267 /* TLB1 can be zeroes that's why we no !! 802 #endif
268 beqi r10, jump_over2 !! 803
269 !! 804 #ifdef CONFIG_VME
270 /* look at the code below */ !! 805 is_mvme147(L(getvmetype))
271 ori r30, r0, 0x200 !! 806 is_bvme6000(L(getvmetype))
272 andi r29, r10, 0x100000 !! 807 is_not_mvme16x(L(gvtdone))
273 bneid r29, 1f !! 808
274 addik r30, r30, 0x80 !! 809 /* See if the loader has specified the BI_VME_TYPE tag. Recent
275 andi r29, r10, 0x400000 !! 810 * versions of VMELILO and TFTPLILO do this. We have to do this
276 bneid r29, 1f !! 811 * early so we know how to handle console output. If the tag
277 addik r30, r30, 0x80 !! 812 * doesn't exist then we use the Bug for output on MVME16x.
278 andi r29, r10, 0x1000000 !! 813 */
279 bneid r29, 1f !! 814 L(getvmetype):
280 addik r30, r30, 0x80 !! 815 get_bi_record BI_VME_TYPE
281 1: !! 816 tstl %d0
282 addk r4, r4, r9 /* previous ad !! 817 jbmi 1f
283 addk r3, r3, r9 !! 818 movel %a0@,%d3
284 !! 819 lea %pc@(vme_brdtype),%a0
285 andi r3,r3,0xfffffc00 /* Mas !! 820 movel %d3,%a0@
286 ori r3,r3,(TLB_VALID) !! 821 1:
287 or r3, r3, r30 !! 822 #ifdef CONFIG_MVME16x
288 !! 823 is_not_mvme16x(L(gvtdone))
289 lwi r11, r0, TOPHYS(tlb_skip) !! 824
290 mts rtlbx, r11 /* r11 !! 825 /* Need to get the BRD_ID info to differentiate between 162, 167,
291 !! 826 * etc. This is available as a BI_VME_BRDINFO tag with later
292 mts rtlblo,r4 /* Loa !! 827 * versions of VMELILO and TFTPLILO, otherwise we call the Bug.
293 mts rtlbhi,r3 /* Loa !! 828 */
294 !! 829 get_bi_record BI_VME_BRDINFO
295 /* Increase tlb_skip size */ !! 830 tstl %d0
296 addik r11, r11, 1 !! 831 jpl 1f
297 swi r11, r0, TOPHYS(tlb_skip) !! 832
298 !! 833 /* Get pointer to board ID data from Bug */
299 jump_over2: !! 834 movel %d2,%sp@-
300 /* !! 835 trap #15
301 * Load a TLB entry for LMB, since we !! 836 .word 0x70 /* trap 0x70 - .BRD_ID */
302 * the exception vectors, using a 4k r !! 837 movel %sp@+,%a0
303 */ !! 838 1:
304 /* Use temporary TLB_ID for LMB - clea !! 839 lea %pc@(mvme_bdid),%a1
305 ori r11, r0, MICROBLAZE_LMB_TLB_ID !! 840 /* Structure is 32 bytes long */
306 mts rtlbx,r11 !! 841 movel %a0@+,%a1@+
307 !! 842 movel %a0@+,%a1@+
308 ori r4,r0,(TLB_WR | TLB_EX) !! 843 movel %a0@+,%a1@+
309 ori r3,r0,(TLB_VALID | TLB_PAGESZ( !! 844 movel %a0@+,%a1@+
310 !! 845 movel %a0@+,%a1@+
311 mts rtlblo,r4 /* Loa !! 846 movel %a0@+,%a1@+
312 mts rtlbhi,r3 /* Loa !! 847 movel %a0@+,%a1@+
313 !! 848 movel %a0@+,%a1@+
314 /* !! 849 #endif
315 * We now have the lower 16 Meg of RAM !! 850
316 * caches ready to work. !! 851 L(gvtdone):
317 */ !! 852
318 turn_on_mmu: !! 853 #endif
319 ori r15,r0,start_here !! 854
320 ori r4,r0,MSR_KERNEL_VMS !! 855 #ifdef CONFIG_HP300
321 mts rmsr,r4 !! 856 is_not_hp300(L(nothp))
322 nop !! 857
323 rted r15,0 /* ena !! 858 /* Get the address of the UART for serial debugging */
324 nop !! 859 get_bi_record BI_HP300_UART_ADDR
325 !! 860 tstl %d0
326 start_here: !! 861 jbmi 1f
327 !! 862 movel %a0@,%d3
328 /* Initialize small data anchors */ !! 863 lea %pc@(L(uartbase)),%a0
329 addik r13, r0, _KERNEL_SDA_BASE_ !! 864 movel %d3,%a0@
330 addik r2, r0, _KERNEL_SDA2_BASE_ !! 865 get_bi_record BI_HP300_UART_SCODE
331 !! 866 tstl %d0
332 /* Initialize stack pointer */ !! 867 jbmi 1f
333 addik r1, r0, init_thread_union + TH !! 868 movel %a0@,%d3
334 !! 869 lea %pc@(L(uart_scode)),%a0
335 /* Initialize r31 with current task ad !! 870 movel %d3,%a0@
336 addik r31, r0, init_task !! 871 1:
337 !! 872 L(nothp):
338 addik r11, r0, machine_early_init !! 873 #endif
339 brald r15, r11 !! 874
340 nop !! 875 /*
341 !! 876 * Initialize serial port
342 /* !! 877 */
343 * Initialize the MMU. !! 878 jbsr L(serial_init)
344 */ !! 879
345 bralid r15, mmu_init !! 880 /*
346 nop !! 881 * Initialize console
347 !! 882 */
348 /* Go back to running unmapped so we c !! 883 #ifdef CONFIG_MAC
349 * and change to using our exception v !! 884 is_not_mac(L(nocon))
350 * On the MicroBlaze, all we invalidat !! 885 # ifdef CONSOLE_DEBUG
351 * the old 16M byte TLB mappings. !! 886 console_init
352 */ !! 887 # ifdef CONFIG_LOGO
353 ori r15,r0,TOPHYS(kernel_load_cont !! 888 console_put_penguin
354 ori r4,r0,MSR_KERNEL !! 889 # endif /* CONFIG_LOGO */
355 mts rmsr,r4 !! 890 # endif /* CONSOLE_DEBUG */
356 nop !! 891 L(nocon):
357 bri 4 !! 892 #endif /* CONFIG_MAC */
358 rted r15,0 !! 893
359 nop !! 894
360 !! 895 putc '\n'
361 /* Load up the kernel context */ !! 896 putc 'A'
362 kernel_load_context: !! 897 leds 0x2
363 ori r5, r0, MICROBLAZE_LMB_TLB_ID !! 898 dputn %pc@(L(cputype))
364 mts rtlbx,r5 !! 899 dputn %pc@(m68k_supervisor_cachemode)
365 nop !! 900 dputn %pc@(m68k_pgtable_cachemode)
366 mts rtlbhi,r0 !! 901 dputc '\n'
367 nop !! 902
368 addi r15, r0, machine_halt !! 903 /*
369 ori r17, r0, start_kernel !! 904 * Save physical start address of kernel
370 ori r4, r0, MSR_KERNEL_VMS !! 905 */
371 mts rmsr, r4 !! 906 lea %pc@(L(phys_kernel_start)),%a0
>> 907 lea %pc@(_stext),%a1
>> 908 subl #_stext,%a1
>> 909 addl #PAGE_OFFSET,%a1
>> 910 movel %a1,%a0@
>> 911
>> 912 putc 'B'
>> 913
>> 914 leds 0x4
>> 915
>> 916 /*
>> 917 * mmu_init
>> 918 *
>> 919 * This block of code does what's necessary to map in the various kinds
>> 920 * of machines for execution of Linux.
>> 921 * First map the first 4, 8, or 16 MB of kernel code & data
>> 922 */
>> 923
>> 924 get_bi_record BI_MEMCHUNK
>> 925 movel %a0@(4),%d0
>> 926 movel #16*1024*1024,%d1
>> 927 cmpl %d0,%d1
>> 928 jls 1f
>> 929 lsrl #1,%d1
>> 930 cmpl %d0,%d1
>> 931 jls 1f
>> 932 lsrl #1,%d1
>> 933 1:
>> 934 lea %pc@(m68k_init_mapped_size),%a0
>> 935 movel %d1,%a0@
>> 936 mmu_map #PAGE_OFFSET,%pc@(L(phys_kernel_start)),%d1,\
>> 937 %pc@(m68k_supervisor_cachemode)
>> 938
>> 939 putc 'C'
>> 940
>> 941 #ifdef CONFIG_AMIGA
>> 942
>> 943 L(mmu_init_amiga):
>> 944
>> 945 is_not_amiga(L(mmu_init_not_amiga))
>> 946 /*
>> 947 * mmu_init_amiga
>> 948 */
>> 949
>> 950 putc 'D'
>> 951
>> 952 is_not_040_or_060(1f)
>> 953
>> 954 /*
>> 955 * 040: Map the 16Meg range physical 0x0 up to logical 0x8000.0000
>> 956 */
>> 957 mmu_map #0x80000000,#0,#0x01000000,#_PAGE_NOCACHE_S
>> 958 /*
>> 959 * Map the Zorro III I/O space with transparent translation
>> 960 * for frame buffer memory etc.
>> 961 */
>> 962 mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE_S
>> 963
>> 964 jbra L(mmu_init_done)
>> 965
>> 966 1:
>> 967 /*
>> 968 * 030: Map the 32Meg range physical 0x0 up to logical 0x8000.0000
>> 969 */
>> 970 mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
>> 971 mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE030
>> 972
>> 973 jbra L(mmu_init_done)
>> 974
>> 975 L(mmu_init_not_amiga):
>> 976 #endif
>> 977
>> 978 #ifdef CONFIG_ATARI
>> 979
>> 980 L(mmu_init_atari):
>> 981
>> 982 is_not_atari(L(mmu_init_not_atari))
>> 983
>> 984 putc 'E'
>> 985
>> 986 /* On the Atari, we map the I/O region (phys. 0x00ffxxxx) by mapping
>> 987 the last 16 MB of virtual address space to the first 16 MB (i.e.
>> 988 0xffxxxxxx -> 0x00xxxxxx). For this, an additional pointer table is
>> 989 needed. I/O ranges are marked non-cachable.
>> 990
>> 991 For the Medusa it is better to map the I/O region transparently
>> 992 (i.e. 0xffxxxxxx -> 0xffxxxxxx), because some I/O registers are
>> 993 accessible only in the high area.
>> 994
>> 995 On the Hades all I/O registers are only accessible in the high
>> 996 area.
>> 997 */
>> 998
>> 999 /* I/O base addr for non-Medusa, non-Hades: 0x00000000 */
>> 1000 moveq #0,%d0
>> 1001 movel %pc@(atari_mch_type),%d3
>> 1002 cmpl #ATARI_MACH_MEDUSA,%d3
>> 1003 jbeq 2f
>> 1004 cmpl #ATARI_MACH_HADES,%d3
>> 1005 jbne 1f
>> 1006 2: movel #0xff000000,%d0 /* Medusa/Hades base addr: 0xff000000 */
>> 1007 1: movel %d0,%d3
>> 1008
>> 1009 is_040_or_060(L(spata68040))
>> 1010
>> 1011 /* Map everything non-cacheable, though not all parts really
>> 1012 * need to disable caches (crucial only for 0xff8000..0xffffff
>> 1013 * (standard I/O) and 0xf00000..0xf3ffff (IDE)). The remainder
>> 1014 * isn't really used, except for sometimes peeking into the
>> 1015 * ROMs (mirror at phys. 0x0), so caching isn't necessary for
>> 1016 * this. */
>> 1017 mmu_map #0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE030
>> 1018
>> 1019 jbra L(mmu_init_done)
>> 1020
>> 1021 L(spata68040):
>> 1022
>> 1023 mmu_map #0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE_S
>> 1024
>> 1025 jbra L(mmu_init_done)
>> 1026
>> 1027 L(mmu_init_not_atari):
>> 1028 #endif
>> 1029
>> 1030 #ifdef CONFIG_Q40
>> 1031 is_not_q40(L(notq40))
>> 1032 /*
>> 1033 * add transparent mapping for 0xff00 0000 - 0xffff ffff
>> 1034 * non-cached serialized etc..
>> 1035 * this includes master chip, DAC, RTC and ISA ports
>> 1036 * 0xfe000000-0xfeffffff is for screen and ROM
>> 1037 */
>> 1038
>> 1039 putc 'Q'
>> 1040
>> 1041 mmu_map_tt #0,#0xfe000000,#0x01000000,#_PAGE_CACHE040W
>> 1042 mmu_map_tt #1,#0xff000000,#0x01000000,#_PAGE_NOCACHE_S
>> 1043
>> 1044 jbra L(mmu_init_done)
>> 1045
>> 1046 L(notq40):
>> 1047 #endif
>> 1048
>> 1049 #ifdef CONFIG_HP300
>> 1050 is_not_hp300(L(nothp300))
>> 1051
>> 1052 /* On the HP300, we map the ROM, INTIO and DIO regions (phys. 0x00xxxxxx)
>> 1053 * by mapping 32MB (on 020/030) or 16 MB (on 040) from 0xf0xxxxxx -> 0x00xxxxxx).
>> 1054 * The ROM mapping is needed because the LEDs are mapped there too.
>> 1055 */
>> 1056
>> 1057 is_040(1f)
>> 1058
>> 1059 /*
>> 1060 * 030: Map the 32Meg range physical 0x0 up to logical 0xf000.0000
>> 1061 */
>> 1062 mmu_map #0xf0000000,#0,#0x02000000,#_PAGE_NOCACHE030
>> 1063
>> 1064 jbra L(mmu_init_done)
>> 1065
>> 1066 1:
>> 1067 /*
>> 1068 * 040: Map the 16Meg range physical 0x0 up to logical 0xf000.0000
>> 1069 */
>> 1070 mmu_map #0xf0000000,#0,#0x01000000,#_PAGE_NOCACHE_S
>> 1071
>> 1072 jbra L(mmu_init_done)
>> 1073
>> 1074 L(nothp300):
>> 1075 #endif /* CONFIG_HP300 */
>> 1076
>> 1077 #ifdef CONFIG_MVME147
>> 1078
>> 1079 is_not_mvme147(L(not147))
>> 1080
>> 1081 /*
>> 1082 * On MVME147 we have already created kernel page tables for
>> 1083 * 4MB of RAM at address 0, so now need to do a transparent
>> 1084 * mapping of the top of memory space. Make it 0.5GByte for now,
>> 1085 * so we can access on-board i/o areas.
>> 1086 */
>> 1087
>> 1088 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE030
>> 1089
>> 1090 jbra L(mmu_init_done)
>> 1091
>> 1092 L(not147):
>> 1093 #endif /* CONFIG_MVME147 */
>> 1094
>> 1095 #ifdef CONFIG_MVME16x
>> 1096
>> 1097 is_not_mvme16x(L(not16x))
>> 1098
>> 1099 /*
>> 1100 * On MVME16x we have already created kernel page tables for
>> 1101 * 4MB of RAM at address 0, so now need to do a transparent
>> 1102 * mapping of the top of memory space. Make it 0.5GByte for now.
>> 1103 * Supervisor only access, so transparent mapping doesn't
>> 1104 * clash with User code virtual address space.
>> 1105 * this covers IO devices, PROM and SRAM. The PROM and SRAM
>> 1106 * mapping is needed to allow 167Bug to run.
>> 1107 * IO is in the range 0xfff00000 to 0xfffeffff.
>> 1108 * PROM is 0xff800000->0xffbfffff and SRAM is
>> 1109 * 0xffe00000->0xffe1ffff.
>> 1110 */
>> 1111
>> 1112 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S
>> 1113
>> 1114 jbra L(mmu_init_done)
>> 1115
>> 1116 L(not16x):
>> 1117 #endif /* CONFIG_MVME162 | CONFIG_MVME167 */
>> 1118
>> 1119 #ifdef CONFIG_BVME6000
>> 1120
>> 1121 is_not_bvme6000(L(not6000))
>> 1122
>> 1123 /*
>> 1124 * On BVME6000 we have already created kernel page tables for
>> 1125 * 4MB of RAM at address 0, so now need to do a transparent
>> 1126 * mapping of the top of memory space. Make it 0.5GByte for now,
>> 1127 * so we can access on-board i/o areas.
>> 1128 * Supervisor only access, so transparent mapping doesn't
>> 1129 * clash with User code virtual address space.
>> 1130 */
>> 1131
>> 1132 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S
>> 1133
>> 1134 jbra L(mmu_init_done)
>> 1135
>> 1136 L(not6000):
>> 1137 #endif /* CONFIG_BVME6000 */
>> 1138
>> 1139 /*
>> 1140 * mmu_init_mac
>> 1141 *
>> 1142 * The Macintosh mappings are less clear.
>> 1143 *
>> 1144 * Even as of this writing, it is unclear how the
>> 1145 * Macintosh mappings will be done. However, as
>> 1146 * the first author of this code I'm proposing the
>> 1147 * following model:
>> 1148 *
>> 1149 * Map the kernel (that's already done),
>> 1150 * Map the I/O (on most machines that's the
>> 1151 * 0x5000.0000 ... 0x5300.0000 range,
>> 1152 * Map the video frame buffer using as few pages
>> 1153 * as absolutely (this requirement mostly stems from
>> 1154 * the fact that when the frame buffer is at
>> 1155 * 0x0000.0000 then we know there is valid RAM just
>> 1156 * above the screen that we don't want to waste!).
>> 1157 *
>> 1158 * By the way, if the frame buffer is at 0x0000.0000
>> 1159 * then the Macintosh is known as an RBV based Mac.
>> 1160 *
>> 1161 * By the way 2, the code currently maps in a bunch of
>> 1162 * regions. But I'd like to cut that out. (And move most
>> 1163 * of the mappings up into the kernel proper ... or only
>> 1164 * map what's necessary.)
>> 1165 */
>> 1166
>> 1167 #ifdef CONFIG_MAC
>> 1168
>> 1169 L(mmu_init_mac):
>> 1170
>> 1171 is_not_mac(L(mmu_init_not_mac))
>> 1172
>> 1173 putc 'F'
>> 1174
>> 1175 is_not_040_or_060(1f)
>> 1176
>> 1177 moveq #_PAGE_NOCACHE_S,%d3
>> 1178 jbra 2f
>> 1179 1:
>> 1180 moveq #_PAGE_NOCACHE030,%d3
>> 1181 2:
>> 1182 /*
>> 1183 * Mac Note: screen address of logical 0xF000.0000 -> <screen physical>
>> 1184 * we simply map the 4MB that contains the videomem
>> 1185 */
>> 1186
>> 1187 movel #VIDEOMEMMASK,%d0
>> 1188 andl %pc@(L(mac_videobase)),%d0
>> 1189
>> 1190 mmu_map #VIDEOMEMBASE,%d0,#VIDEOMEMSIZE,%d3
>> 1191 /* ROM from 4000 0000 to 4200 0000 (only for mac_reset()) */
>> 1192 mmu_map_eq #0x40000000,#0x02000000,%d3
>> 1193 /* IO devices (incl. serial port) from 5000 0000 to 5300 0000 */
>> 1194 mmu_map_eq #0x50000000,#0x03000000,%d3
>> 1195 /* Nubus slot space (video at 0xF0000000, rom at 0xF0F80000) */
>> 1196 mmu_map_tt #1,#0xf8000000,#0x08000000,%d3
>> 1197
>> 1198 jbra L(mmu_init_done)
>> 1199
>> 1200 L(mmu_init_not_mac):
>> 1201 #endif
>> 1202
>> 1203 #ifdef CONFIG_SUN3X
>> 1204 is_not_sun3x(L(notsun3x))
>> 1205
>> 1206 /* oh, the pain.. We're gonna want the prom code after
>> 1207 * starting the MMU, so we copy the mappings, translating
>> 1208 * from 8k -> 4k pages as we go.
>> 1209 */
>> 1210
>> 1211 /* copy maps from 0xfee00000 to 0xff000000 */
>> 1212 movel #0xfee00000, %d0
>> 1213 moveq #ROOT_INDEX_SHIFT, %d1
>> 1214 lsrl %d1,%d0
>> 1215 mmu_get_root_table_entry %d0
>> 1216
>> 1217 movel #0xfee00000, %d0
>> 1218 moveq #PTR_INDEX_SHIFT, %d1
>> 1219 lsrl %d1,%d0
>> 1220 andl #PTR_TABLE_SIZE-1, %d0
>> 1221 mmu_get_ptr_table_entry %a0,%d0
>> 1222
>> 1223 movel #0xfee00000, %d0
>> 1224 moveq #PAGE_INDEX_SHIFT, %d1
>> 1225 lsrl %d1,%d0
>> 1226 andl #PAGE_TABLE_SIZE-1, %d0
>> 1227 mmu_get_page_table_entry %a0,%d0
>> 1228
>> 1229 /* this is where the prom page table lives */
>> 1230 movel 0xfefe00d4, %a1
>> 1231 movel %a1@, %a1
>> 1232
>> 1233 movel #((0x200000 >> 13)-1), %d1
>> 1234
>> 1235 1:
>> 1236 movel %a1@+, %d3
>> 1237 movel %d3,%a0@+
>> 1238 addl #0x1000,%d3
>> 1239 movel %d3,%a0@+
>> 1240
>> 1241 dbra %d1,1b
>> 1242
>> 1243 /* setup tt1 for I/O */
>> 1244 mmu_map_tt #1,#0x40000000,#0x40000000,#_PAGE_NOCACHE_S
>> 1245 jbra L(mmu_init_done)
>> 1246
>> 1247 L(notsun3x):
>> 1248 #endif
>> 1249
>> 1250 #ifdef CONFIG_VIRT
>> 1251 is_not_virt(L(novirt))
>> 1252 mmu_map_tt #1,#0xFF000000,#0x01000000,#_PAGE_NOCACHE_S
>> 1253 jbra L(mmu_init_done)
>> 1254 L(novirt):
>> 1255 #endif
>> 1256
>> 1257 #ifdef CONFIG_APOLLO
>> 1258 is_not_apollo(L(notapollo))
>> 1259
>> 1260 putc 'P'
>> 1261 mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
>> 1262
>> 1263 L(notapollo):
>> 1264 jbra L(mmu_init_done)
>> 1265 #endif
>> 1266
>> 1267 L(mmu_init_done):
>> 1268
>> 1269 putc 'G'
>> 1270 leds 0x8
>> 1271
>> 1272 /*
>> 1273 * mmu_fixup
>> 1274 *
>> 1275 * On the 040 class machines, all pages that are used for the
>> 1276 * mmu have to be fixed up. According to Motorola, pages holding mmu
>> 1277 * tables should be non-cacheable on a '040 and write-through on a
>> 1278 * '060. But analysis of the reasons for this, and practical
>> 1279 * experience, showed that write-through also works on a '040.
>> 1280 *
>> 1281 * Allocated memory so far goes from kernel_end to memory_start that
>> 1282 * is used for all kind of tables, for that the cache attributes
>> 1283 * are now fixed.
>> 1284 */
>> 1285 L(mmu_fixup):
>> 1286
>> 1287 is_not_040_or_060(L(mmu_fixup_done))
>> 1288
>> 1289 #ifdef MMU_NOCACHE_KERNEL
>> 1290 jbra L(mmu_fixup_done)
>> 1291 #endif
>> 1292
>> 1293 /* first fix the page at the start of the kernel, that
>> 1294 * contains also kernel_pg_dir.
>> 1295 */
>> 1296 movel %pc@(L(phys_kernel_start)),%d0
>> 1297 subl #PAGE_OFFSET,%d0
>> 1298 lea %pc@(_stext),%a0
>> 1299 subl %d0,%a0
>> 1300 mmu_fixup_page_mmu_cache %a0
>> 1301
>> 1302 movel %pc@(L(kernel_end)),%a0
>> 1303 subl %d0,%a0
>> 1304 movel %pc@(L(memory_start)),%a1
>> 1305 subl %d0,%a1
>> 1306 bra 2f
>> 1307 1:
>> 1308 mmu_fixup_page_mmu_cache %a0
>> 1309 addw #PAGESIZE,%a0
>> 1310 2:
>> 1311 cmpl %a0,%a1
>> 1312 jgt 1b
>> 1313
>> 1314 L(mmu_fixup_done):
>> 1315
>> 1316 #ifdef MMU_PRINT
>> 1317 mmu_print
>> 1318 #endif
>> 1319
>> 1320 /*
>> 1321 * mmu_engage
>> 1322 *
>> 1323 * This chunk of code performs the gruesome task of engaging the MMU.
>> 1324 * The reason it's gruesome is because when the MMU becomes engaged it
>> 1325 * maps logical addresses to physical addresses. The Program Counter
>> 1326 * register is then passed through the MMU before the next instruction
>> 1327 * is fetched (the instruction following the engage MMU instruction).
>> 1328 * This may mean one of two things:
>> 1329 * 1. The Program Counter falls within the logical address space of
>> 1330 * the kernel of which there are two sub-possibilities:
>> 1331 * A. The PC maps to the correct instruction (logical PC == physical
>> 1332 * code location), or
>> 1333 * B. The PC does not map through and the processor will read some
>> 1334 * data (or instruction) which is not the logically next instr.
>> 1335 * As you can imagine, A is good and B is bad.
>> 1336 * Alternatively,
>> 1337 * 2. The Program Counter does not map through the MMU. The processor
>> 1338 * will take a Bus Error.
>> 1339 * Clearly, 2 is bad.
>> 1340 * It doesn't take a wiz kid to figure you want 1.A.
>> 1341 * This code creates that possibility.
>> 1342 * There are two possible 1.A. states (we now ignore the other above states):
>> 1343 * A. The kernel is located at physical memory addressed the same as
>> 1344 * the logical memory for the kernel, i.e., 0x01000.
>> 1345 * B. The kernel is located some where else. e.g., 0x0400.0000
>> 1346 *
>> 1347 * Under some conditions the Macintosh can look like A or B.
>> 1348 * [A friend and I once noted that Apple hardware engineers should be
>> 1349 * wacked twice each day: once when they show up at work (as in, Whack!,
>> 1350 * "This is for the screwy hardware we know you're going to design today."),
>> 1351 * and also at the end of the day (as in, Whack! "I don't know what
>> 1352 * you designed today, but I'm sure it wasn't good."). -- rst]
>> 1353 *
>> 1354 * This code works on the following premise:
>> 1355 * If the kernel start (%d5) is within the first 16 Meg of RAM,
>> 1356 * then create a mapping for the kernel at logical 0x8000.0000 to
>> 1357 * the physical location of the pc. And, create a transparent
>> 1358 * translation register for the first 16 Meg. Then, after the MMU
>> 1359 * is engaged, the PC can be moved up into the 0x8000.0000 range
>> 1360 * and then the transparent translation can be turned off and then
>> 1361 * the PC can jump to the correct logical location and it will be
>> 1362 * home (finally). This is essentially the code that the Amiga used
>> 1363 * to use. Now, it's generalized for all processors. Which means
>> 1364 * that a fresh (but temporary) mapping has to be created. The mapping
>> 1365 * is made in page 0 (an as of yet unused location -- except for the
>> 1366 * stack!). This temporary mapping will only require 1 pointer table
>> 1367 * and a single page table (it can map 256K).
>> 1368 *
>> 1369 * OK, alternatively, imagine that the Program Counter is not within
>> 1370 * the first 16 Meg. Then, just use Transparent Translation registers
>> 1371 * to do the right thing.
>> 1372 *
>> 1373 * Last, if _start is already at 0x01000, then there's nothing special
>> 1374 * to do (in other words, in a degenerate case of the first case above,
>> 1375 * do nothing).
>> 1376 *
>> 1377 * Let's do it.
>> 1378 *
>> 1379 *
>> 1380 */
>> 1381
>> 1382 putc 'H'
>> 1383
>> 1384 mmu_engage
>> 1385
>> 1386 /*
>> 1387 * After this point no new memory is allocated and
>> 1388 * the start of available memory is stored in availmem.
>> 1389 * (The bootmem allocator requires now the physical address.)
>> 1390 */
>> 1391
>> 1392 movel L(memory_start),availmem
>> 1393
>> 1394 #ifdef CONFIG_AMIGA
>> 1395 is_not_amiga(1f)
>> 1396 /* fixup the Amiga custom register location before printing */
>> 1397 clrl L(custom)
>> 1398 1:
>> 1399 #endif
>> 1400
>> 1401 #ifdef CONFIG_ATARI
>> 1402 is_not_atari(1f)
>> 1403 /* fixup the Atari iobase register location before printing */
>> 1404 movel #0xff000000,L(iobase)
>> 1405 1:
>> 1406 #endif
>> 1407
>> 1408 #ifdef CONFIG_MAC
>> 1409 is_not_mac(1f)
>> 1410 movel #~VIDEOMEMMASK,%d0
>> 1411 andl L(mac_videobase),%d0
>> 1412 addl #VIDEOMEMBASE,%d0
>> 1413 movel %d0,L(mac_videobase)
>> 1414 #ifdef CONSOLE_DEBUG
>> 1415 movel %pc@(L(phys_kernel_start)),%d0
>> 1416 subl #PAGE_OFFSET,%d0
>> 1417 subl %d0,L(console_font)
>> 1418 subl %d0,L(console_font_data)
>> 1419 #endif
>> 1420 orl #0x50000000,L(mac_sccbase)
>> 1421 1:
>> 1422 #endif
>> 1423
>> 1424 #ifdef CONFIG_HP300
>> 1425 is_not_hp300(2f)
>> 1426 /*
>> 1427 * Fix up the iobase register to point to the new location of the LEDs.
>> 1428 */
>> 1429 movel #0xf0000000,L(iobase)
>> 1430
>> 1431 /*
>> 1432 * Energise the FPU and caches.
>> 1433 */
>> 1434 is_040(1f)
>> 1435 movel #0x60,0xf05f400c
>> 1436 jbra 2f
>> 1437
>> 1438 /*
>> 1439 * 040: slightly different, apparently.
>> 1440 */
>> 1441 1: movew #0,0xf05f400e
>> 1442 movew #0x64,0xf05f400e
>> 1443 2:
>> 1444 #endif
>> 1445
>> 1446 #ifdef CONFIG_SUN3X
>> 1447 is_not_sun3x(1f)
>> 1448
>> 1449 /* enable copro */
>> 1450 oriw #0x4000,0x61000000
>> 1451 1:
>> 1452 #endif
>> 1453
>> 1454 #ifdef CONFIG_APOLLO
>> 1455 is_not_apollo(1f)
>> 1456
>> 1457 /*
>> 1458 * Fix up the iobase before printing
>> 1459 */
>> 1460 movel #0x80000000,L(iobase)
>> 1461 1:
>> 1462 #endif
>> 1463
>> 1464 putc 'I'
>> 1465 leds 0x10
>> 1466
>> 1467 /*
>> 1468 * Enable caches
>> 1469 */
>> 1470
>> 1471 is_not_040_or_060(L(cache_not_680460))
>> 1472
>> 1473 L(cache680460):
>> 1474 .chip 68040
>> 1475 nop
>> 1476 cpusha %bc
>> 1477 nop
>> 1478
>> 1479 is_060(L(cache68060))
>> 1480
>> 1481 movel #CC6_ENABLE_D+CC6_ENABLE_I,%d0
>> 1482 /* MMU stuff works in copyback mode now, so enable the cache */
>> 1483 movec %d0,%cacr
>> 1484 jra L(cache_done)
>> 1485
>> 1486 L(cache68060):
>> 1487 movel #CC6_ENABLE_D+CC6_ENABLE_I+CC6_ENABLE_SB+CC6_PUSH_DPI+CC6_ENABLE_B+CC6_CLRA_B,%d0
>> 1488 /* MMU stuff works in copyback mode now, so enable the cache */
>> 1489 movec %d0,%cacr
>> 1490 /* enable superscalar dispatch in PCR */
>> 1491 moveq #1,%d0
>> 1492 .chip 68060
>> 1493 movec %d0,%pcr
>> 1494
>> 1495 jbra L(cache_done)
>> 1496 L(cache_not_680460):
>> 1497 L(cache68030):
>> 1498 .chip 68030
>> 1499 movel #CC3_ENABLE_DB+CC3_CLR_D+CC3_ENABLE_D+CC3_ENABLE_IB+CC3_CLR_I+CC3_ENABLE_I,%d0
>> 1500 movec %d0,%cacr
>> 1501
>> 1502 jra L(cache_done)
>> 1503 .chip 68k
>> 1504 L(cache_done):
>> 1505
>> 1506 putc 'J'
>> 1507
>> 1508 /*
>> 1509 * Setup initial stack pointer
>> 1510 */
>> 1511 lea init_task,%curptr
>> 1512 lea init_thread_union+THREAD_SIZE,%sp
>> 1513
>> 1514 putc 'K'
>> 1515
>> 1516 subl %a6,%a6 /* clear a6 for gdb */
>> 1517
>> 1518 /*
>> 1519 * The new 64bit printf support requires an early exception initialization.
>> 1520 */
>> 1521 jbsr base_trap_init
>> 1522
>> 1523 /* jump to the kernel start */
>> 1524
>> 1525 putc '\n'
>> 1526 leds 0x55
>> 1527
>> 1528 jbsr start_kernel
>> 1529
>> 1530 /*
>> 1531 * Find a tag record in the bootinfo structure
>> 1532 * The bootinfo structure is located right after the kernel
>> 1533 * Returns: d0: size (-1 if not found)
>> 1534 * a0: data pointer (end-of-records if not found)
>> 1535 */
>> 1536 func_start get_bi_record,%d1
>> 1537
>> 1538 movel ARG1,%d0
>> 1539 lea %pc@(_end),%a0
>> 1540 1: tstw %a0@(BIR_TAG)
>> 1541 jeq 3f
>> 1542 cmpw %a0@(BIR_TAG),%d0
>> 1543 jeq 2f
>> 1544 addw %a0@(BIR_SIZE),%a0
>> 1545 jra 1b
>> 1546 2: moveq #0,%d0
>> 1547 movew %a0@(BIR_SIZE),%d0
>> 1548 lea %a0@(BIR_DATA),%a0
>> 1549 jra 4f
>> 1550 3: moveq #-1,%d0
>> 1551 lea %a0@(BIR_SIZE),%a0
>> 1552 4:
>> 1553 func_return get_bi_record
>> 1554
>> 1555
>> 1556 /*
>> 1557 * MMU Initialization Begins Here
>> 1558 *
>> 1559 * The structure of the MMU tables on the 68k machines
>> 1560 * is thus:
>> 1561 * Root Table
>> 1562 * Logical addresses are translated through
>> 1563 * a hierarchical translation mechanism where the high-order
>> 1564 * seven bits of the logical address (LA) are used as an
>> 1565 * index into the "root table." Each entry in the root
>> 1566 * table has a bit which specifies if it's a valid pointer to a
>> 1567 * pointer table. Each entry defines a 32Meg range of memory.
>> 1568 * If an entry is invalid then that logical range of 32M is
>> 1569 * invalid and references to that range of memory (when the MMU
>> 1570 * is enabled) will fault. If the entry is valid, then it does
>> 1571 * one of two things. On 040/060 class machines, it points to
>> 1572 * a pointer table which then describes more finely the memory
>> 1573 * within that 32M range. On 020/030 class machines, a technique
>> 1574 * called "early terminating descriptors" are used. This technique
>> 1575 * allows an entire 32Meg to be described by a single entry in the
>> 1576 * root table. Thus, this entry in the root table, contains the
>> 1577 * physical address of the memory or I/O at the logical address
>> 1578 * which the entry represents and it also contains the necessary
>> 1579 * cache bits for this region.
>> 1580 *
>> 1581 * Pointer Tables
>> 1582 * Per the Root Table, there will be one or more
>> 1583 * pointer tables. Each pointer table defines a 32M range.
>> 1584 * Not all of the 32M range need be defined. Again, the next
>> 1585 * seven bits of the logical address are used an index into
>> 1586 * the pointer table to point to page tables (if the pointer
>> 1587 * is valid). There will undoubtedly be more than one
>> 1588 * pointer table for the kernel because each pointer table
>> 1589 * defines a range of only 32M. Valid pointer table entries
>> 1590 * point to page tables, or are early terminating entries
>> 1591 * themselves.
>> 1592 *
>> 1593 * Page Tables
>> 1594 * Per the Pointer Tables, each page table entry points
>> 1595 * to the physical page in memory that supports the logical
>> 1596 * address that translates to the particular index.
>> 1597 *
>> 1598 * In short, the Logical Address gets translated as follows:
>> 1599 * bits 31..26 - index into the Root Table
>> 1600 * bits 25..18 - index into the Pointer Table
>> 1601 * bits 17..12 - index into the Page Table
>> 1602 * bits 11..0 - offset into a particular 4K page
>> 1603 *
>> 1604 * The algorithms which follow do one thing: they abstract
>> 1605 * the MMU hardware. For example, there are three kinds of
>> 1606 * cache settings that are relevant. Either, memory is
>> 1607 * being mapped in which case it is either Kernel Code (or
>> 1608 * the RamDisk) or it is MMU data. On the 030, the MMU data
>> 1609 * option also describes the kernel. Or, I/O is being mapped
>> 1610 * in which case it has its own kind of cache bits. There
>> 1611 * are constants which abstract these notions from the code that
>> 1612 * actually makes the call to map some range of memory.
>> 1613 *
>> 1614 *
>> 1615 *
>> 1616 */
>> 1617
>> 1618 #ifdef MMU_PRINT
>> 1619 /*
>> 1620 * mmu_print
>> 1621 *
>> 1622 * This algorithm will print out the current MMU mappings.
>> 1623 *
>> 1624 * Input:
>> 1625 * %a5 points to the root table. Everything else is calculated
>> 1626 * from this.
>> 1627 */
>> 1628
>> 1629 #define mmu_next_valid 0
>> 1630 #define mmu_start_logical 4
>> 1631 #define mmu_next_logical 8
>> 1632 #define mmu_start_physical 12
>> 1633 #define mmu_next_physical 16
>> 1634
>> 1635 #define MMU_PRINT_INVALID -1
>> 1636 #define MMU_PRINT_VALID 1
>> 1637 #define MMU_PRINT_UNINITED 0
>> 1638
>> 1639 #define putZc(z,n) jbne 1f; putc z; jbra 2f; 1: putc n; 2:
>> 1640
>> 1641 func_start mmu_print,%a0-%a6/%d0-%d7
>> 1642
>> 1643 movel %pc@(L(kernel_pgdir_ptr)),%a5
>> 1644 lea %pc@(L(mmu_print_data)),%a0
>> 1645 movel #MMU_PRINT_UNINITED,%a0@(mmu_next_valid)
>> 1646
>> 1647 is_not_040_or_060(mmu_030_print)
>> 1648
>> 1649 mmu_040_print:
>> 1650 puts "\nMMU040\n"
>> 1651 puts "rp:"
>> 1652 putn %a5
>> 1653 putc '\n'
>> 1654 #if 0
>> 1655 /*
>> 1656 * The following #if/#endif block is a tight algorithm for dumping the 040
>> 1657 * MMU Map in gory detail. It really isn't that practical unless the
>> 1658 * MMU Map algorithm appears to go awry and you need to debug it at the
>> 1659 * entry per entry level.
>> 1660 */
>> 1661 movel #ROOT_TABLE_SIZE,%d5
>> 1662 #if 0
>> 1663 movel %a5@+,%d7 | Burn an entry to skip the kernel mappings,
>> 1664 subql #1,%d5 | they (might) work
>> 1665 #endif
>> 1666 1: tstl %d5
>> 1667 jbeq mmu_print_done
>> 1668 subq #1,%d5
>> 1669 movel %a5@+,%d7
>> 1670 btst #1,%d7
>> 1671 jbeq 1b
>> 1672
>> 1673 2: putn %d7
>> 1674 andil #0xFFFFFE00,%d7
>> 1675 movel %d7,%a4
>> 1676 movel #PTR_TABLE_SIZE,%d4
>> 1677 putc ' '
>> 1678 3: tstl %d4
>> 1679 jbeq 11f
>> 1680 subq #1,%d4
>> 1681 movel %a4@+,%d7
>> 1682 btst #1,%d7
>> 1683 jbeq 3b
>> 1684
>> 1685 4: putn %d7
>> 1686 andil #0xFFFFFF00,%d7
>> 1687 movel %d7,%a3
>> 1688 movel #PAGE_TABLE_SIZE,%d3
>> 1689 5: movel #8,%d2
>> 1690 6: tstl %d3
>> 1691 jbeq 31f
>> 1692 subq #1,%d3
>> 1693 movel %a3@+,%d6
>> 1694 btst #0,%d6
>> 1695 jbeq 6b
>> 1696 7: tstl %d2
>> 1697 jbeq 8f
>> 1698 subq #1,%d2
>> 1699 putc ' '
>> 1700 jbra 91f
>> 1701 8: putc '\n'
>> 1702 movel #8+1+8+1+1,%d2
>> 1703 9: putc ' '
>> 1704 dbra %d2,9b
>> 1705 movel #7,%d2
>> 1706 91: putn %d6
>> 1707 jbra 6b
>> 1708
>> 1709 31: putc '\n'
>> 1710 movel #8+1,%d2
>> 1711 32: putc ' '
>> 1712 dbra %d2,32b
>> 1713 jbra 3b
>> 1714
>> 1715 11: putc '\n'
>> 1716 jbra 1b
>> 1717 #endif /* MMU 040 Dumping code that's gory and detailed */
>> 1718
>> 1719 lea %pc@(kernel_pg_dir),%a5
>> 1720 movel %a5,%a0 /* a0 has the address of the root table ptr */
>> 1721 movel #0x00000000,%a4 /* logical address */
>> 1722 moveql #0,%d0
>> 1723 40:
>> 1724 /* Increment the logical address and preserve in d5 */
>> 1725 movel %a4,%d5
>> 1726 addil #PAGESIZE<<13,%d5
>> 1727 movel %a0@+,%d6
>> 1728 btst #1,%d6
>> 1729 jbne 41f
>> 1730 jbsr mmu_print_tuple_invalidate
>> 1731 jbra 48f
>> 1732 41:
>> 1733 movel #0,%d1
>> 1734 andil #0xfffffe00,%d6
>> 1735 movel %d6,%a1
>> 1736 42:
>> 1737 movel %a4,%d5
>> 1738 addil #PAGESIZE<<6,%d5
>> 1739 movel %a1@+,%d6
>> 1740 btst #1,%d6
>> 1741 jbne 43f
>> 1742 jbsr mmu_print_tuple_invalidate
>> 1743 jbra 47f
>> 1744 43:
>> 1745 movel #0,%d2
>> 1746 andil #0xffffff00,%d6
>> 1747 movel %d6,%a2
>> 1748 44:
>> 1749 movel %a4,%d5
>> 1750 addil #PAGESIZE,%d5
>> 1751 movel %a2@+,%d6
>> 1752 btst #0,%d6
>> 1753 jbne 45f
>> 1754 jbsr mmu_print_tuple_invalidate
>> 1755 jbra 46f
>> 1756 45:
>> 1757 moveml %d0-%d1,%sp@-
>> 1758 movel %a4,%d0
>> 1759 movel %d6,%d1
>> 1760 andil #0xfffff4e0,%d1
>> 1761 lea %pc@(mmu_040_print_flags),%a6
>> 1762 jbsr mmu_print_tuple
>> 1763 moveml %sp@+,%d0-%d1
>> 1764 46:
>> 1765 movel %d5,%a4
>> 1766 addq #1,%d2
>> 1767 cmpib #64,%d2
>> 1768 jbne 44b
>> 1769 47:
>> 1770 movel %d5,%a4
>> 1771 addq #1,%d1
>> 1772 cmpib #128,%d1
>> 1773 jbne 42b
>> 1774 48:
>> 1775 movel %d5,%a4 /* move to the next logical address */
>> 1776 addq #1,%d0
>> 1777 cmpib #128,%d0
>> 1778 jbne 40b
>> 1779
>> 1780 .chip 68040
>> 1781 movec %dtt1,%d0
>> 1782 movel %d0,%d1
>> 1783 andiw #0x8000,%d1 /* is it valid ? */
>> 1784 jbeq 1f /* No, bail out */
>> 1785
>> 1786 movel %d0,%d1
>> 1787 andil #0xff000000,%d1 /* Get the address */
>> 1788 putn %d1
>> 1789 puts "=="
>> 1790 putn %d1
>> 1791
>> 1792 movel %d0,%d6
>> 1793 jbsr mmu_040_print_flags_tt
>> 1794 1:
>> 1795 movec %dtt0,%d0
>> 1796 movel %d0,%d1
>> 1797 andiw #0x8000,%d1 /* is it valid ? */
>> 1798 jbeq 1f /* No, bail out */
>> 1799
>> 1800 movel %d0,%d1
>> 1801 andil #0xff000000,%d1 /* Get the address */
>> 1802 putn %d1
>> 1803 puts "=="
>> 1804 putn %d1
>> 1805
>> 1806 movel %d0,%d6
>> 1807 jbsr mmu_040_print_flags_tt
>> 1808 1:
>> 1809 .chip 68k
>> 1810
>> 1811 jbra mmu_print_done
>> 1812
>> 1813 mmu_040_print_flags:
>> 1814 btstl #10,%d6
>> 1815 putZc(' ','G') /* global bit */
>> 1816 btstl #7,%d6
>> 1817 putZc(' ','S') /* supervisor bit */
>> 1818 mmu_040_print_flags_tt:
>> 1819 btstl #6,%d6
>> 1820 jbne 3f
>> 1821 putc 'C'
>> 1822 btstl #5,%d6
>> 1823 putZc('w','c') /* write through or copy-back */
>> 1824 jbra 4f
>> 1825 3:
>> 1826 putc 'N'
>> 1827 btstl #5,%d6
>> 1828 putZc('s',' ') /* serialized non-cacheable, or non-cacheable */
>> 1829 4:
>> 1830 rts
>> 1831
>> 1832 mmu_030_print_flags:
>> 1833 btstl #6,%d6
>> 1834 putZc('C','I') /* write through or copy-back */
>> 1835 rts
>> 1836
>> 1837 mmu_030_print:
>> 1838 puts "\nMMU030\n"
>> 1839 puts "\nrp:"
>> 1840 putn %a5
>> 1841 putc '\n'
>> 1842 movel %a5,%d0
>> 1843 andil #0xfffffff0,%d0
>> 1844 movel %d0,%a0
>> 1845 movel #0x00000000,%a4 /* logical address */
>> 1846 movel #0,%d0
>> 1847 30:
>> 1848 movel %a4,%d5
>> 1849 addil #PAGESIZE<<13,%d5
>> 1850 movel %a0@+,%d6
>> 1851 btst #1,%d6 /* is it a table ptr? */
>> 1852 jbne 31f /* yes */
>> 1853 btst #0,%d6 /* is it early terminating? */
>> 1854 jbeq 1f /* no */
>> 1855 jbsr mmu_030_print_helper
>> 1856 jbra 38f
>> 1857 1:
>> 1858 jbsr mmu_print_tuple_invalidate
>> 1859 jbra 38f
>> 1860 31:
>> 1861 movel #0,%d1
>> 1862 andil #0xfffffff0,%d6
>> 1863 movel %d6,%a1
>> 1864 32:
>> 1865 movel %a4,%d5
>> 1866 addil #PAGESIZE<<6,%d5
>> 1867 movel %a1@+,%d6
>> 1868 btst #1,%d6 /* is it a table ptr? */
>> 1869 jbne 33f /* yes */
>> 1870 btst #0,%d6 /* is it a page descriptor? */
>> 1871 jbeq 1f /* no */
>> 1872 jbsr mmu_030_print_helper
>> 1873 jbra 37f
>> 1874 1:
>> 1875 jbsr mmu_print_tuple_invalidate
>> 1876 jbra 37f
>> 1877 33:
>> 1878 movel #0,%d2
>> 1879 andil #0xfffffff0,%d6
>> 1880 movel %d6,%a2
>> 1881 34:
>> 1882 movel %a4,%d5
>> 1883 addil #PAGESIZE,%d5
>> 1884 movel %a2@+,%d6
>> 1885 btst #0,%d6
>> 1886 jbne 35f
>> 1887 jbsr mmu_print_tuple_invalidate
>> 1888 jbra 36f
>> 1889 35:
>> 1890 jbsr mmu_030_print_helper
>> 1891 36:
>> 1892 movel %d5,%a4
>> 1893 addq #1,%d2
>> 1894 cmpib #64,%d2
>> 1895 jbne 34b
>> 1896 37:
>> 1897 movel %d5,%a4
>> 1898 addq #1,%d1
>> 1899 cmpib #128,%d1
>> 1900 jbne 32b
>> 1901 38:
>> 1902 movel %d5,%a4 /* move to the next logical address */
>> 1903 addq #1,%d0
>> 1904 cmpib #128,%d0
>> 1905 jbne 30b
>> 1906
>> 1907 mmu_print_done:
>> 1908 puts "\n"
>> 1909
>> 1910 func_return mmu_print
>> 1911
>> 1912
>> 1913 mmu_030_print_helper:
>> 1914 moveml %d0-%d1,%sp@-
>> 1915 movel %a4,%d0
>> 1916 movel %d6,%d1
>> 1917 lea %pc@(mmu_030_print_flags),%a6
>> 1918 jbsr mmu_print_tuple
>> 1919 moveml %sp@+,%d0-%d1
>> 1920 rts
>> 1921
>> 1922 mmu_print_tuple_invalidate:
>> 1923 moveml %a0/%d7,%sp@-
>> 1924
>> 1925 lea %pc@(L(mmu_print_data)),%a0
>> 1926 tstl %a0@(mmu_next_valid)
>> 1927 jbmi mmu_print_tuple_invalidate_exit
>> 1928
>> 1929 movel #MMU_PRINT_INVALID,%a0@(mmu_next_valid)
>> 1930
>> 1931 putn %a4
>> 1932
>> 1933 puts "##\n"
>> 1934
>> 1935 mmu_print_tuple_invalidate_exit:
>> 1936 moveml %sp@+,%a0/%d7
>> 1937 rts
>> 1938
>> 1939
>> 1940 mmu_print_tuple:
>> 1941 moveml %d0-%d7/%a0,%sp@-
>> 1942
>> 1943 lea %pc@(L(mmu_print_data)),%a0
>> 1944
>> 1945 tstl %a0@(mmu_next_valid)
>> 1946 jble mmu_print_tuple_print
>> 1947
>> 1948 cmpl %a0@(mmu_next_physical),%d1
>> 1949 jbeq mmu_print_tuple_increment
>> 1950
>> 1951 mmu_print_tuple_print:
>> 1952 putn %d0
>> 1953 puts "->"
>> 1954 putn %d1
>> 1955
>> 1956 movel %d1,%d6
>> 1957 jbsr %a6@
>> 1958
>> 1959 mmu_print_tuple_record:
>> 1960 movel #MMU_PRINT_VALID,%a0@(mmu_next_valid)
>> 1961
>> 1962 movel %d1,%a0@(mmu_next_physical)
>> 1963
>> 1964 mmu_print_tuple_increment:
>> 1965 movel %d5,%d7
>> 1966 subl %a4,%d7
>> 1967 addl %d7,%a0@(mmu_next_physical)
>> 1968
>> 1969 mmu_print_tuple_exit:
>> 1970 moveml %sp@+,%d0-%d7/%a0
>> 1971 rts
>> 1972
>> 1973 mmu_print_machine_cpu_types:
>> 1974 puts "machine: "
>> 1975
>> 1976 is_not_amiga(1f)
>> 1977 puts "amiga"
>> 1978 jbra 9f
>> 1979 1:
>> 1980 is_not_atari(2f)
>> 1981 puts "atari"
>> 1982 jbra 9f
>> 1983 2:
>> 1984 is_not_mac(3f)
>> 1985 puts "macintosh"
>> 1986 jbra 9f
>> 1987 3: puts "unknown"
>> 1988 9: putc '\n'
>> 1989
>> 1990 puts "cputype: 0"
>> 1991 is_not_060(1f)
>> 1992 putc '6'
>> 1993 jbra 9f
>> 1994 1:
>> 1995 is_not_040_or_060(2f)
>> 1996 putc '4'
>> 1997 jbra 9f
>> 1998 2: putc '3'
>> 1999 9: putc '0'
>> 2000 putc '\n'
>> 2001
>> 2002 rts
>> 2003 #endif /* MMU_PRINT */
>> 2004
>> 2005 /*
>> 2006 * mmu_map_tt
>> 2007 *
>> 2008 * This is a specific function which works on all 680x0 machines.
>> 2009 * On 030, 040 & 060 it will attempt to use Transparent Translation
>> 2010 * registers (tt1).
>> 2011 * On 020 it will call the standard mmu_map which will use early
>> 2012 * terminating descriptors.
>> 2013 */
>> 2014 func_start mmu_map_tt,%d0/%d1/%a0,4
>> 2015
>> 2016 dputs "mmu_map_tt:"
>> 2017 dputn ARG1
>> 2018 dputn ARG2
>> 2019 dputn ARG3
>> 2020 dputn ARG4
>> 2021 dputc '\n'
>> 2022
>> 2023 is_020(L(do_map))
>> 2024
>> 2025 /* Extract the highest bit set
>> 2026 */
>> 2027 bfffo ARG3{#0,#32},%d1
>> 2028 cmpw #8,%d1
>> 2029 jcc L(do_map)
>> 2030
>> 2031 /* And get the mask
>> 2032 */
>> 2033 moveq #-1,%d0
>> 2034 lsrl %d1,%d0
>> 2035 lsrl #1,%d0
>> 2036
>> 2037 /* Mask the address
>> 2038 */
>> 2039 movel %d0,%d1
>> 2040 notl %d1
>> 2041 andl ARG2,%d1
>> 2042
>> 2043 /* Generate the upper 16bit of the tt register
>> 2044 */
>> 2045 lsrl #8,%d0
>> 2046 orl %d0,%d1
>> 2047 clrw %d1
>> 2048
>> 2049 is_040_or_060(L(mmu_map_tt_040))
>> 2050
>> 2051 /* set 030 specific bits (read/write access for supervisor mode
>> 2052 * (highest function code set, lower two bits masked))
>> 2053 */
>> 2054 orw #TTR_ENABLE+TTR_RWM+TTR_FCB2+TTR_FCM1+TTR_FCM0,%d1
>> 2055 movel ARG4,%d0
>> 2056 btst #6,%d0
>> 2057 jeq 1f
>> 2058 orw #TTR_CI,%d1
>> 2059
>> 2060 1: lea STACK,%a0
>> 2061 dputn %d1
>> 2062 movel %d1,%a0@
>> 2063 .chip 68030
>> 2064 tstl ARG1
>> 2065 jne 1f
>> 2066 pmove %a0@,%tt0
>> 2067 jra 2f
>> 2068 1: pmove %a0@,%tt1
>> 2069 2: .chip 68k
>> 2070 jra L(mmu_map_tt_done)
>> 2071
>> 2072 /* set 040 specific bits
>> 2073 */
>> 2074 L(mmu_map_tt_040):
>> 2075 orw #TTR_ENABLE+TTR_KERNELMODE,%d1
>> 2076 orl ARG4,%d1
>> 2077 dputn %d1
>> 2078
>> 2079 .chip 68040
>> 2080 tstl ARG1
>> 2081 jne 1f
>> 2082 movec %d1,%itt0
>> 2083 movec %d1,%dtt0
>> 2084 jra 2f
>> 2085 1: movec %d1,%itt1
>> 2086 movec %d1,%dtt1
>> 2087 2: .chip 68k
>> 2088
>> 2089 jra L(mmu_map_tt_done)
>> 2090
>> 2091 L(do_map):
>> 2092 mmu_map_eq ARG2,ARG3,ARG4
>> 2093
>> 2094 L(mmu_map_tt_done):
>> 2095
>> 2096 func_return mmu_map_tt
>> 2097
>> 2098 /*
>> 2099 * mmu_map
>> 2100 *
>> 2101 * This routine will map a range of memory using a pointer
>> 2102 * table and allocate the pages on the fly from the kernel.
>> 2103 * The pointer table does not have to be already linked into
>> 2104 * the root table, this routine will do that if necessary.
>> 2105 *
>> 2106 * NOTE
>> 2107 * This routine will assert failure and use the serial_putc
>> 2108 * routines in the case of a run-time error. For example,
>> 2109 * if the address is already mapped.
>> 2110 *
>> 2111 * NOTE-2
>> 2112 * This routine will use early terminating descriptors
>> 2113 * where possible for the 68020+68851 and 68030 type
>> 2114 * processors.
>> 2115 */
>> 2116 func_start mmu_map,%d0-%d4/%a0-%a4
>> 2117
>> 2118 dputs "\nmmu_map:"
>> 2119 dputn ARG1
>> 2120 dputn ARG2
>> 2121 dputn ARG3
>> 2122 dputn ARG4
>> 2123 dputc '\n'
>> 2124
>> 2125 /* Get logical address and round it down to 256KB
>> 2126 */
>> 2127 movel ARG1,%d0
>> 2128 andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0
>> 2129 movel %d0,%a3
>> 2130
>> 2131 /* Get the end address
>> 2132 */
>> 2133 movel ARG1,%a4
>> 2134 addl ARG3,%a4
>> 2135 subql #1,%a4
>> 2136
>> 2137 /* Get physical address and round it down to 256KB
>> 2138 */
>> 2139 movel ARG2,%d0
>> 2140 andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0
>> 2141 movel %d0,%a2
>> 2142
>> 2143 /* Add page attributes to the physical address
>> 2144 */
>> 2145 movel ARG4,%d0
>> 2146 orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0
>> 2147 addw %d0,%a2
>> 2148
>> 2149 dputn %a2
>> 2150 dputn %a3
>> 2151 dputn %a4
>> 2152
>> 2153 is_not_040_or_060(L(mmu_map_030))
>> 2154
>> 2155 addw #_PAGE_GLOBAL040,%a2
>> 2156 /*
>> 2157 * MMU 040 & 060 Support
>> 2158 *
>> 2159 * The MMU usage for the 040 and 060 is different enough from
>> 2160 * the 030 and 68851 that there is separate code. This comment
>> 2161 * block describes the data structures and algorithms built by
>> 2162 * this code.
>> 2163 *
>> 2164 * The 040 does not support early terminating descriptors, as
>> 2165 * the 030 does. Therefore, a third level of table is needed
>> 2166 * for the 040, and that would be the page table. In Linux,
>> 2167 * page tables are allocated directly from the memory above the
>> 2168 * kernel.
>> 2169 *
>> 2170 */
>> 2171
>> 2172 L(mmu_map_040):
>> 2173 /* Calculate the offset into the root table
>> 2174 */
>> 2175 movel %a3,%d0
>> 2176 moveq #ROOT_INDEX_SHIFT,%d1
>> 2177 lsrl %d1,%d0
>> 2178 mmu_get_root_table_entry %d0
>> 2179
>> 2180 /* Calculate the offset into the pointer table
>> 2181 */
>> 2182 movel %a3,%d0
>> 2183 moveq #PTR_INDEX_SHIFT,%d1
>> 2184 lsrl %d1,%d0
>> 2185 andl #PTR_TABLE_SIZE-1,%d0
>> 2186 mmu_get_ptr_table_entry %a0,%d0
>> 2187
>> 2188 /* Calculate the offset into the page table
>> 2189 */
>> 2190 movel %a3,%d0
>> 2191 moveq #PAGE_INDEX_SHIFT,%d1
>> 2192 lsrl %d1,%d0
>> 2193 andl #PAGE_TABLE_SIZE-1,%d0
>> 2194 mmu_get_page_table_entry %a0,%d0
>> 2195
>> 2196 /* The page table entry must not no be busy
>> 2197 */
>> 2198 tstl %a0@
>> 2199 jne L(mmu_map_error)
>> 2200
>> 2201 /* Do the mapping and advance the pointers
>> 2202 */
>> 2203 movel %a2,%a0@
>> 2204 2:
>> 2205 addw #PAGESIZE,%a2
>> 2206 addw #PAGESIZE,%a3
>> 2207
>> 2208 /* Ready with mapping?
>> 2209 */
>> 2210 lea %a3@(-1),%a0
>> 2211 cmpl %a0,%a4
>> 2212 jhi L(mmu_map_040)
>> 2213 jra L(mmu_map_done)
>> 2214
>> 2215 L(mmu_map_030):
>> 2216 /* Calculate the offset into the root table
>> 2217 */
>> 2218 movel %a3,%d0
>> 2219 moveq #ROOT_INDEX_SHIFT,%d1
>> 2220 lsrl %d1,%d0
>> 2221 mmu_get_root_table_entry %d0
>> 2222
>> 2223 /* Check if logical address 32MB aligned,
>> 2224 * so we can try to map it once
>> 2225 */
>> 2226 movel %a3,%d0
>> 2227 andl #(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1)&(-ROOT_TABLE_SIZE),%d0
>> 2228 jne 1f
>> 2229
>> 2230 /* Is there enough to map for 32MB at once
>> 2231 */
>> 2232 lea %a3@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1),%a1
>> 2233 cmpl %a1,%a4
>> 2234 jcs 1f
>> 2235
>> 2236 addql #1,%a1
>> 2237
>> 2238 /* The root table entry must not no be busy
>> 2239 */
>> 2240 tstl %a0@
>> 2241 jne L(mmu_map_error)
>> 2242
>> 2243 /* Do the mapping and advance the pointers
>> 2244 */
>> 2245 dputs "early term1"
>> 2246 dputn %a2
>> 2247 dputn %a3
>> 2248 dputn %a1
>> 2249 dputc '\n'
>> 2250 movel %a2,%a0@
>> 2251
>> 2252 movel %a1,%a3
>> 2253 lea %a2@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE),%a2
>> 2254 jra L(mmu_mapnext_030)
>> 2255 1:
>> 2256 /* Calculate the offset into the pointer table
>> 2257 */
>> 2258 movel %a3,%d0
>> 2259 moveq #PTR_INDEX_SHIFT,%d1
>> 2260 lsrl %d1,%d0
>> 2261 andl #PTR_TABLE_SIZE-1,%d0
>> 2262 mmu_get_ptr_table_entry %a0,%d0
>> 2263
>> 2264 /* The pointer table entry must not no be busy
>> 2265 */
>> 2266 tstl %a0@
>> 2267 jne L(mmu_map_error)
>> 2268
>> 2269 /* Do the mapping and advance the pointers
>> 2270 */
>> 2271 dputs "early term2"
>> 2272 dputn %a2
>> 2273 dputn %a3
>> 2274 dputc '\n'
>> 2275 movel %a2,%a0@
>> 2276
>> 2277 addl #PAGE_TABLE_SIZE*PAGESIZE,%a2
>> 2278 addl #PAGE_TABLE_SIZE*PAGESIZE,%a3
>> 2279
>> 2280 L(mmu_mapnext_030):
>> 2281 /* Ready with mapping?
>> 2282 */
>> 2283 lea %a3@(-1),%a0
>> 2284 cmpl %a0,%a4
>> 2285 jhi L(mmu_map_030)
>> 2286 jra L(mmu_map_done)
>> 2287
>> 2288 L(mmu_map_error):
>> 2289
>> 2290 dputs "mmu_map error:"
>> 2291 dputn %a2
>> 2292 dputn %a3
>> 2293 dputc '\n'
>> 2294
>> 2295 L(mmu_map_done):
>> 2296
>> 2297 func_return mmu_map
>> 2298
>> 2299 /*
>> 2300 * mmu_fixup
>> 2301 *
>> 2302 * On the 040 class machines, all pages that are used for the
>> 2303 * mmu have to be fixed up.
>> 2304 */
>> 2305
>> 2306 func_start mmu_fixup_page_mmu_cache,%d0/%a0
>> 2307
>> 2308 dputs "mmu_fixup_page_mmu_cache"
>> 2309 dputn ARG1
>> 2310
>> 2311 /* Calculate the offset into the root table
>> 2312 */
>> 2313 movel ARG1,%d0
>> 2314 moveq #ROOT_INDEX_SHIFT,%d1
>> 2315 lsrl %d1,%d0
>> 2316 mmu_get_root_table_entry %d0
>> 2317
>> 2318 /* Calculate the offset into the pointer table
>> 2319 */
>> 2320 movel ARG1,%d0
>> 2321 moveq #PTR_INDEX_SHIFT,%d1
>> 2322 lsrl %d1,%d0
>> 2323 andl #PTR_TABLE_SIZE-1,%d0
>> 2324 mmu_get_ptr_table_entry %a0,%d0
>> 2325
>> 2326 /* Calculate the offset into the page table
>> 2327 */
>> 2328 movel ARG1,%d0
>> 2329 moveq #PAGE_INDEX_SHIFT,%d1
>> 2330 lsrl %d1,%d0
>> 2331 andl #PAGE_TABLE_SIZE-1,%d0
>> 2332 mmu_get_page_table_entry %a0,%d0
>> 2333
>> 2334 movel %a0@,%d0
>> 2335 andil #_CACHEMASK040,%d0
>> 2336 orl %pc@(m68k_pgtable_cachemode),%d0
>> 2337 movel %d0,%a0@
>> 2338
>> 2339 dputc '\n'
>> 2340
>> 2341 func_return mmu_fixup_page_mmu_cache
>> 2342
>> 2343 /*
>> 2344 * mmu_temp_map
>> 2345 *
>> 2346 * create a temporary mapping to enable the mmu,
>> 2347 * this we don't need any transparation translation tricks.
>> 2348 */
>> 2349
>> 2350 func_start mmu_temp_map,%d0/%d1/%a0/%a1
>> 2351
>> 2352 dputs "mmu_temp_map"
>> 2353 dputn ARG1
>> 2354 dputn ARG2
>> 2355 dputc '\n'
>> 2356
>> 2357 lea %pc@(L(temp_mmap_mem)),%a1
>> 2358
>> 2359 /* Calculate the offset in the root table
>> 2360 */
>> 2361 movel ARG2,%d0
>> 2362 moveq #ROOT_INDEX_SHIFT,%d1
>> 2363 lsrl %d1,%d0
>> 2364 mmu_get_root_table_entry %d0
>> 2365
>> 2366 /* Check if the table is temporary allocated, so we have to reuse it
>> 2367 */
>> 2368 movel %a0@,%d0
>> 2369 cmpl %pc@(L(memory_start)),%d0
>> 2370 jcc 1f
>> 2371
>> 2372 /* Temporary allocate a ptr table and insert it into the root table
>> 2373 */
>> 2374 movel %a1@,%d0
>> 2375 addl #PTR_TABLE_SIZE*4,%a1@
>> 2376 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
>> 2377 movel %d0,%a0@
>> 2378 dputs " (new)"
>> 2379 1:
>> 2380 dputn %d0
>> 2381 /* Mask the root table entry for the ptr table
>> 2382 */
>> 2383 andw #-ROOT_TABLE_SIZE,%d0
>> 2384 movel %d0,%a0
>> 2385
>> 2386 /* Calculate the offset into the pointer table
>> 2387 */
>> 2388 movel ARG2,%d0
>> 2389 moveq #PTR_INDEX_SHIFT,%d1
>> 2390 lsrl %d1,%d0
>> 2391 andl #PTR_TABLE_SIZE-1,%d0
>> 2392 lea %a0@(%d0*4),%a0
>> 2393 dputn %a0
>> 2394
>> 2395 /* Check if a temporary page table is already allocated
>> 2396 */
>> 2397 movel %a0@,%d0
>> 2398 jne 1f
>> 2399
>> 2400 /* Temporary allocate a page table and insert it into the ptr table
>> 2401 */
>> 2402 movel %a1@,%d0
>> 2403 /* The 512 should be PAGE_TABLE_SIZE*4, but that violates the
>> 2404 alignment restriction for pointer tables on the '0[46]0. */
>> 2405 addl #512,%a1@
>> 2406 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
>> 2407 movel %d0,%a0@
>> 2408 dputs " (new)"
>> 2409 1:
>> 2410 dputn %d0
>> 2411 /* Mask the ptr table entry for the page table
>> 2412 */
>> 2413 andw #-PTR_TABLE_SIZE,%d0
>> 2414 movel %d0,%a0
>> 2415
>> 2416 /* Calculate the offset into the page table
>> 2417 */
>> 2418 movel ARG2,%d0
>> 2419 moveq #PAGE_INDEX_SHIFT,%d1
>> 2420 lsrl %d1,%d0
>> 2421 andl #PAGE_TABLE_SIZE-1,%d0
>> 2422 lea %a0@(%d0*4),%a0
>> 2423 dputn %a0
>> 2424
>> 2425 /* Insert the address into the page table
>> 2426 */
>> 2427 movel ARG1,%d0
>> 2428 andw #-PAGESIZE,%d0
>> 2429 orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0
>> 2430 movel %d0,%a0@
>> 2431 dputn %d0
>> 2432
>> 2433 dputc '\n'
>> 2434
>> 2435 func_return mmu_temp_map
>> 2436
>> 2437 func_start mmu_engage,%d0-%d2/%a0-%a3
>> 2438
>> 2439 moveq #ROOT_TABLE_SIZE-1,%d0
>> 2440 /* Temporarily use a different root table. */
>> 2441 lea %pc@(L(kernel_pgdir_ptr)),%a0
>> 2442 movel %a0@,%a2
>> 2443 movel %pc@(L(memory_start)),%a1
>> 2444 movel %a1,%a0@
>> 2445 movel %a2,%a0
>> 2446 1:
>> 2447 movel %a0@+,%a1@+
>> 2448 dbra %d0,1b
>> 2449
>> 2450 lea %pc@(L(temp_mmap_mem)),%a0
>> 2451 movel %a1,%a0@
>> 2452
>> 2453 movew #PAGESIZE-1,%d0
>> 2454 1:
>> 2455 clrl %a1@+
>> 2456 dbra %d0,1b
>> 2457
>> 2458 lea %pc@(1b),%a0
>> 2459 movel #1b,%a1
>> 2460 /* Skip temp mappings if phys == virt */
>> 2461 cmpl %a0,%a1
>> 2462 jeq 1f
>> 2463
>> 2464 mmu_temp_map %a0,%a0
>> 2465 mmu_temp_map %a0,%a1
>> 2466
>> 2467 addw #PAGESIZE,%a0
>> 2468 addw #PAGESIZE,%a1
>> 2469 mmu_temp_map %a0,%a0
>> 2470 mmu_temp_map %a0,%a1
>> 2471 1:
>> 2472 movel %pc@(L(memory_start)),%a3
>> 2473 movel %pc@(L(phys_kernel_start)),%d2
>> 2474
>> 2475 is_not_040_or_060(L(mmu_engage_030))
>> 2476
>> 2477 L(mmu_engage_040):
>> 2478 .chip 68040
>> 2479 nop
>> 2480 cinva %bc
>> 2481 nop
>> 2482 pflusha
>> 2483 nop
>> 2484 movec %a3,%srp
>> 2485 movel #TC_ENABLE+TC_PAGE4K,%d0
>> 2486 movec %d0,%tc /* enable the MMU */
>> 2487 jmp 1f:l
>> 2488 1: nop
>> 2489 movec %a2,%srp
>> 2490 nop
>> 2491 cinva %bc
>> 2492 nop
>> 2493 pflusha
>> 2494 .chip 68k
>> 2495 jra L(mmu_engage_cleanup)
>> 2496
>> 2497 L(mmu_engage_030_temp):
>> 2498 .space 12
>> 2499 L(mmu_engage_030):
>> 2500 .chip 68030
>> 2501 lea %pc@(L(mmu_engage_030_temp)),%a0
>> 2502 movel #0x80000002,%a0@
>> 2503 movel %a3,%a0@(4)
>> 2504 movel #0x0808,%d0
>> 2505 movec %d0,%cacr
>> 2506 pmove %a0@,%srp
>> 2507 pflusha
>> 2508 /*
>> 2509 * enable,super root enable,4096 byte pages,7 bit root index,
>> 2510 * 7 bit pointer index, 6 bit page table index.
>> 2511 */
>> 2512 movel #0x82c07760,%a0@(8)
>> 2513 pmove %a0@(8),%tc /* enable the MMU */
>> 2514 jmp 1f:l
>> 2515 1: movel %a2,%a0@(4)
>> 2516 movel #0x0808,%d0
>> 2517 movec %d0,%cacr
>> 2518 pmove %a0@,%srp
>> 2519 pflusha
>> 2520 .chip 68k
>> 2521
>> 2522 L(mmu_engage_cleanup):
>> 2523 subl #PAGE_OFFSET,%d2
>> 2524 subl %d2,%a2
>> 2525 movel %a2,L(kernel_pgdir_ptr)
>> 2526 subl %d2,%fp
>> 2527 subl %d2,%sp
>> 2528 subl %d2,ARG0
>> 2529
>> 2530 func_return mmu_engage
>> 2531
>> 2532 func_start mmu_get_root_table_entry,%d0/%a1
>> 2533
>> 2534 #if 0
>> 2535 dputs "mmu_get_root_table_entry:"
>> 2536 dputn ARG1
>> 2537 dputs " ="
>> 2538 #endif
>> 2539
>> 2540 movel %pc@(L(kernel_pgdir_ptr)),%a0
>> 2541 tstl %a0
>> 2542 jne 2f
>> 2543
>> 2544 dputs "\nmmu_init:"
>> 2545
>> 2546 /* Find the start of free memory, get_bi_record does this for us,
>> 2547 * as the bootinfo structure is located directly behind the kernel
>> 2548 * we simply search for the last entry.
>> 2549 */
>> 2550 get_bi_record BI_LAST
>> 2551 addw #PAGESIZE-1,%a0
>> 2552 movel %a0,%d0
>> 2553 andw #-PAGESIZE,%d0
>> 2554
>> 2555 dputn %d0
>> 2556
>> 2557 lea %pc@(L(memory_start)),%a0
>> 2558 movel %d0,%a0@
>> 2559 lea %pc@(L(kernel_end)),%a0
>> 2560 movel %d0,%a0@
>> 2561
>> 2562 /* we have to return the first page at _stext since the init code
>> 2563 * in mm/init.c simply expects kernel_pg_dir there, the rest of
>> 2564 * page is used for further ptr tables in get_ptr_table.
>> 2565 */
>> 2566 lea %pc@(_stext),%a0
>> 2567 lea %pc@(L(mmu_cached_pointer_tables)),%a1
>> 2568 movel %a0,%a1@
>> 2569 addl #ROOT_TABLE_SIZE*4,%a1@
>> 2570
>> 2571 lea %pc@(L(mmu_num_pointer_tables)),%a1
>> 2572 addql #1,%a1@
>> 2573
>> 2574 /* clear the page
>> 2575 */
>> 2576 movel %a0,%a1
>> 2577 movew #PAGESIZE/4-1,%d0
>> 2578 1:
>> 2579 clrl %a1@+
>> 2580 dbra %d0,1b
>> 2581
>> 2582 lea %pc@(L(kernel_pgdir_ptr)),%a1
>> 2583 movel %a0,%a1@
>> 2584
>> 2585 dputn %a0
>> 2586 dputc '\n'
>> 2587 2:
>> 2588 movel ARG1,%d0
>> 2589 lea %a0@(%d0*4),%a0
>> 2590
>> 2591 #if 0
>> 2592 dputn %a0
>> 2593 dputc '\n'
>> 2594 #endif
>> 2595
>> 2596 func_return mmu_get_root_table_entry
>> 2597
>> 2598
>> 2599
>> 2600 func_start mmu_get_ptr_table_entry,%d0/%a1
>> 2601
>> 2602 #if 0
>> 2603 dputs "mmu_get_ptr_table_entry:"
>> 2604 dputn ARG1
>> 2605 dputn ARG2
>> 2606 dputs " ="
>> 2607 #endif
>> 2608
>> 2609 movel ARG1,%a0
>> 2610 movel %a0@,%d0
>> 2611 jne 2f
>> 2612
>> 2613 /* Keep track of the number of pointer tables we use
>> 2614 */
>> 2615 dputs "\nmmu_get_new_ptr_table:"
>> 2616 lea %pc@(L(mmu_num_pointer_tables)),%a0
>> 2617 movel %a0@,%d0
>> 2618 addql #1,%a0@
>> 2619
>> 2620 /* See if there is a free pointer table in our cache of pointer tables
>> 2621 */
>> 2622 lea %pc@(L(mmu_cached_pointer_tables)),%a1
>> 2623 andw #7,%d0
>> 2624 jne 1f
>> 2625
>> 2626 /* Get a new pointer table page from above the kernel memory
>> 2627 */
>> 2628 get_new_page
>> 2629 movel %a0,%a1@
>> 2630 1:
>> 2631 /* There is an unused pointer table in our cache... use it
>> 2632 */
>> 2633 movel %a1@,%d0
>> 2634 addl #PTR_TABLE_SIZE*4,%a1@
>> 2635
>> 2636 dputn %d0
>> 2637 dputc '\n'
>> 2638
>> 2639 /* Insert the new pointer table into the root table
>> 2640 */
>> 2641 movel ARG1,%a0
>> 2642 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
>> 2643 movel %d0,%a0@
>> 2644 2:
>> 2645 /* Extract the pointer table entry
>> 2646 */
>> 2647 andw #-PTR_TABLE_SIZE,%d0
>> 2648 movel %d0,%a0
>> 2649 movel ARG2,%d0
>> 2650 lea %a0@(%d0*4),%a0
>> 2651
>> 2652 #if 0
>> 2653 dputn %a0
>> 2654 dputc '\n'
>> 2655 #endif
>> 2656
>> 2657 func_return mmu_get_ptr_table_entry
>> 2658
>> 2659
>> 2660 func_start mmu_get_page_table_entry,%d0/%a1
>> 2661
>> 2662 #if 0
>> 2663 dputs "mmu_get_page_table_entry:"
>> 2664 dputn ARG1
>> 2665 dputn ARG2
>> 2666 dputs " ="
>> 2667 #endif
>> 2668
>> 2669 movel ARG1,%a0
>> 2670 movel %a0@,%d0
>> 2671 jne 2f
>> 2672
>> 2673 /* If the page table entry doesn't exist, we allocate a complete new
>> 2674 * page and use it as one continuous big page table which can cover
>> 2675 * 4MB of memory, nearly almost all mappings have that alignment.
>> 2676 */
>> 2677 get_new_page
>> 2678 addw #_PAGE_TABLE+_PAGE_ACCESSED,%a0
>> 2679
>> 2680 /* align pointer table entry for a page of page tables
>> 2681 */
>> 2682 movel ARG1,%d0
>> 2683 andw #-(PAGESIZE/PAGE_TABLE_SIZE),%d0
>> 2684 movel %d0,%a1
>> 2685
>> 2686 /* Insert the page tables into the pointer entries
>> 2687 */
>> 2688 moveq #PAGESIZE/PAGE_TABLE_SIZE/4-1,%d0
>> 2689 1:
>> 2690 movel %a0,%a1@+
>> 2691 lea %a0@(PAGE_TABLE_SIZE*4),%a0
>> 2692 dbra %d0,1b
>> 2693
>> 2694 /* Now we can get the initialized pointer table entry
>> 2695 */
>> 2696 movel ARG1,%a0
>> 2697 movel %a0@,%d0
>> 2698 2:
>> 2699 /* Extract the page table entry
>> 2700 */
>> 2701 andw #-PAGE_TABLE_SIZE,%d0
>> 2702 movel %d0,%a0
>> 2703 movel ARG2,%d0
>> 2704 lea %a0@(%d0*4),%a0
>> 2705
>> 2706 #if 0
>> 2707 dputn %a0
>> 2708 dputc '\n'
>> 2709 #endif
>> 2710
>> 2711 func_return mmu_get_page_table_entry
>> 2712
>> 2713 /*
>> 2714 * get_new_page
>> 2715 *
>> 2716 * Return a new page from the memory start and clear it.
>> 2717 */
>> 2718 func_start get_new_page,%d0/%a1
>> 2719
>> 2720 dputs "\nget_new_page:"
>> 2721
>> 2722 /* allocate the page and adjust memory_start
>> 2723 */
>> 2724 lea %pc@(L(memory_start)),%a0
>> 2725 movel %a0@,%a1
>> 2726 addl #PAGESIZE,%a0@
>> 2727
>> 2728 /* clear the new page
>> 2729 */
>> 2730 movel %a1,%a0
>> 2731 movew #PAGESIZE/4-1,%d0
>> 2732 1:
>> 2733 clrl %a1@+
>> 2734 dbra %d0,1b
>> 2735
>> 2736 dputn %a0
>> 2737 dputc '\n'
>> 2738
>> 2739 func_return get_new_page
>> 2740
>> 2741
>> 2742
>> 2743 /*
>> 2744 * Debug output support
>> 2745 * Atarians have a choice between the parallel port, the serial port
>> 2746 * from the MFP or a serial port of the SCC
>> 2747 */
>> 2748
>> 2749 #ifdef CONFIG_MAC
>> 2750 /* You may define either or both of these. */
>> 2751 #define MAC_USE_SCC_A /* Modem port */
>> 2752 #define MAC_USE_SCC_B /* Printer port */
>> 2753
>> 2754 #if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B)
>> 2755 /* Initialisation table for SCC with 3.6864 MHz PCLK */
>> 2756 L(scc_initable_mac):
>> 2757 .byte 4,0x44 /* x16, 1 stopbit, no parity */
>> 2758 .byte 3,0xc0 /* receiver: 8 bpc */
>> 2759 .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */
>> 2760 .byte 10,0 /* NRZ */
>> 2761 .byte 11,0x50 /* use baud rate generator */
>> 2762 .byte 12,1,13,0 /* 38400 baud */
>> 2763 .byte 14,1 /* Baud rate generator enable */
>> 2764 .byte 3,0xc1 /* enable receiver */
>> 2765 .byte 5,0xea /* enable transmitter */
>> 2766 .byte -1
>> 2767 .even
>> 2768 #endif
>> 2769 #endif /* CONFIG_MAC */
>> 2770
>> 2771 #ifdef CONFIG_ATARI
>> 2772 /* #define USE_PRINTER */
>> 2773 /* #define USE_SCC_B */
>> 2774 /* #define USE_SCC_A */
>> 2775 #define USE_MFP
>> 2776
>> 2777 #if defined(USE_SCC_A) || defined(USE_SCC_B)
>> 2778 /* Initialisation table for SCC with 7.9872 MHz PCLK */
>> 2779 /* PCLK == 8.0539 gives baud == 9680.1 */
>> 2780 L(scc_initable_atari):
>> 2781 .byte 4,0x44 /* x16, 1 stopbit, no parity */
>> 2782 .byte 3,0xc0 /* receiver: 8 bpc */
>> 2783 .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */
>> 2784 .byte 10,0 /* NRZ */
>> 2785 .byte 11,0x50 /* use baud rate generator */
>> 2786 .byte 12,24,13,0 /* 9600 baud */
>> 2787 .byte 14,2,14,3 /* use master clock for BRG, enable */
>> 2788 .byte 3,0xc1 /* enable receiver */
>> 2789 .byte 5,0xea /* enable transmitter */
>> 2790 .byte -1
>> 2791 .even
>> 2792 #endif
>> 2793
>> 2794 #ifdef USE_PRINTER
>> 2795
>> 2796 LPSG_SELECT = 0xff8800
>> 2797 LPSG_READ = 0xff8800
>> 2798 LPSG_WRITE = 0xff8802
>> 2799 LPSG_IO_A = 14
>> 2800 LPSG_IO_B = 15
>> 2801 LPSG_CONTROL = 7
>> 2802 LSTMFP_GPIP = 0xfffa01
>> 2803 LSTMFP_DDR = 0xfffa05
>> 2804 LSTMFP_IERB = 0xfffa09
>> 2805
>> 2806 #elif defined(USE_SCC_B)
>> 2807
>> 2808 LSCC_CTRL = 0xff8c85
>> 2809 LSCC_DATA = 0xff8c87
>> 2810
>> 2811 #elif defined(USE_SCC_A)
>> 2812
>> 2813 LSCC_CTRL = 0xff8c81
>> 2814 LSCC_DATA = 0xff8c83
>> 2815
>> 2816 #elif defined(USE_MFP)
>> 2817
>> 2818 LMFP_UCR = 0xfffa29
>> 2819 LMFP_TDCDR = 0xfffa1d
>> 2820 LMFP_TDDR = 0xfffa25
>> 2821 LMFP_TSR = 0xfffa2d
>> 2822 LMFP_UDR = 0xfffa2f
>> 2823
>> 2824 #endif
>> 2825 #endif /* CONFIG_ATARI */
>> 2826
>> 2827 /*
>> 2828 * Serial port output support.
>> 2829 */
>> 2830
>> 2831 /*
>> 2832 * Initialize serial port hardware
>> 2833 */
>> 2834 func_start serial_init,%d0/%d1/%a0/%a1
>> 2835 /*
>> 2836 * Some of the register usage that follows
>> 2837 * CONFIG_AMIGA
>> 2838 * a0 = pointer to boot info record
>> 2839 * d0 = boot info offset
>> 2840 * CONFIG_ATARI
>> 2841 * a0 = address of SCC
>> 2842 * a1 = Liobase address/address of scc_initable_atari
>> 2843 * d0 = init data for serial port
>> 2844 * CONFIG_MAC
>> 2845 * a0 = address of SCC
>> 2846 * a1 = address of scc_initable_mac
>> 2847 * d0 = init data for serial port
>> 2848 */
>> 2849
>> 2850 #ifdef CONFIG_AMIGA
>> 2851 #define SERIAL_DTR 7
>> 2852 #define SERIAL_CNTRL CIABBASE+C_PRA
>> 2853
>> 2854 is_not_amiga(1f)
>> 2855 lea %pc@(L(custom)),%a0
>> 2856 movel #-ZTWOBASE,%a0@
>> 2857 bclr #SERIAL_DTR,SERIAL_CNTRL-ZTWOBASE
>> 2858 get_bi_record BI_AMIGA_SERPER
>> 2859 movew %a0@,CUSTOMBASE+C_SERPER-ZTWOBASE
>> 2860 | movew #61,CUSTOMBASE+C_SERPER-ZTWOBASE
>> 2861 1:
>> 2862 #endif
>> 2863
>> 2864 #ifdef CONFIG_ATARI
>> 2865 is_not_atari(4f)
>> 2866 movel %pc@(L(iobase)),%a1
>> 2867 #if defined(USE_PRINTER)
>> 2868 bclr #0,%a1@(LSTMFP_IERB)
>> 2869 bclr #0,%a1@(LSTMFP_DDR)
>> 2870 moveb #LPSG_CONTROL,%a1@(LPSG_SELECT)
>> 2871 moveb #0xff,%a1@(LPSG_WRITE)
>> 2872 moveb #LPSG_IO_B,%a1@(LPSG_SELECT)
>> 2873 clrb %a1@(LPSG_WRITE)
>> 2874 moveb #LPSG_IO_A,%a1@(LPSG_SELECT)
>> 2875 moveb %a1@(LPSG_READ),%d0
>> 2876 bset #5,%d0
>> 2877 moveb %d0,%a1@(LPSG_WRITE)
>> 2878 #elif defined(USE_SCC_A) || defined(USE_SCC_B)
>> 2879 lea %a1@(LSCC_CTRL),%a0
>> 2880 /* Reset SCC register pointer */
>> 2881 moveb %a0@,%d0
>> 2882 /* Reset SCC device: write register pointer then register value */
>> 2883 moveb #9,%a0@
>> 2884 moveb #0xc0,%a0@
>> 2885 /* Wait for 5 PCLK cycles, which is about 63 CPU cycles */
>> 2886 /* 5 / 7.9872 MHz = approx. 0.63 us = 63 / 100 MHz */
>> 2887 movel #32,%d0
>> 2888 2:
>> 2889 subq #1,%d0
>> 2890 jne 2b
>> 2891 /* Initialize channel */
>> 2892 lea %pc@(L(scc_initable_atari)),%a1
>> 2893 2: moveb %a1@+,%d0
>> 2894 jmi 3f
>> 2895 moveb %d0,%a0@
>> 2896 moveb %a1@+,%a0@
>> 2897 jra 2b
>> 2898 3: clrb %a0@
>> 2899 #elif defined(USE_MFP)
>> 2900 bclr #1,%a1@(LMFP_TSR)
>> 2901 moveb #0x88,%a1@(LMFP_UCR)
>> 2902 andb #0x70,%a1@(LMFP_TDCDR)
>> 2903 moveb #2,%a1@(LMFP_TDDR)
>> 2904 orb #1,%a1@(LMFP_TDCDR)
>> 2905 bset #1,%a1@(LMFP_TSR)
>> 2906 #endif
>> 2907 jra L(serial_init_done)
>> 2908 4:
>> 2909 #endif
>> 2910
>> 2911 #ifdef CONFIG_MAC
>> 2912 is_not_mac(L(serial_init_not_mac))
>> 2913 #if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B)
>> 2914 #define mac_scc_cha_b_ctrl_offset 0x0
>> 2915 #define mac_scc_cha_a_ctrl_offset 0x2
>> 2916 #define mac_scc_cha_b_data_offset 0x4
>> 2917 #define mac_scc_cha_a_data_offset 0x6
>> 2918 movel %pc@(L(mac_sccbase)),%a0
>> 2919 /* Reset SCC register pointer */
>> 2920 moveb %a0@(mac_scc_cha_a_ctrl_offset),%d0
>> 2921 /* Reset SCC device: write register pointer then register value */
>> 2922 moveb #9,%a0@(mac_scc_cha_a_ctrl_offset)
>> 2923 moveb #0xc0,%a0@(mac_scc_cha_a_ctrl_offset)
>> 2924 /* Wait for 5 PCLK cycles, which is about 68 CPU cycles */
>> 2925 /* 5 / 3.6864 MHz = approx. 1.36 us = 68 / 50 MHz */
>> 2926 movel #35,%d0
>> 2927 5:
>> 2928 subq #1,%d0
>> 2929 jne 5b
>> 2930 #endif
>> 2931 #ifdef MAC_USE_SCC_A
>> 2932 /* Initialize channel A */
>> 2933 lea %pc@(L(scc_initable_mac)),%a1
>> 2934 5: moveb %a1@+,%d0
>> 2935 jmi 6f
>> 2936 moveb %d0,%a0@(mac_scc_cha_a_ctrl_offset)
>> 2937 moveb %a1@+,%a0@(mac_scc_cha_a_ctrl_offset)
>> 2938 jra 5b
>> 2939 6:
>> 2940 #endif /* MAC_USE_SCC_A */
>> 2941 #ifdef MAC_USE_SCC_B
>> 2942 /* Initialize channel B */
>> 2943 lea %pc@(L(scc_initable_mac)),%a1
>> 2944 7: moveb %a1@+,%d0
>> 2945 jmi 8f
>> 2946 moveb %d0,%a0@(mac_scc_cha_b_ctrl_offset)
>> 2947 moveb %a1@+,%a0@(mac_scc_cha_b_ctrl_offset)
>> 2948 jra 7b
>> 2949 8:
>> 2950 #endif /* MAC_USE_SCC_B */
>> 2951 jra L(serial_init_done)
>> 2952 L(serial_init_not_mac):
>> 2953 #endif /* CONFIG_MAC */
>> 2954
>> 2955 #ifdef CONFIG_Q40
>> 2956 is_not_q40(2f)
>> 2957 /* debug output goes into SRAM, so we don't do it unless requested
>> 2958 - check for '%LX$' signature in SRAM */
>> 2959 lea %pc@(q40_mem_cptr),%a1
>> 2960 move.l #0xff020010,%a1@ /* must be inited - also used by debug=mem */
>> 2961 move.l #0xff020000,%a1
>> 2962 cmp.b #'%',%a1@
>> 2963 bne 2f /*nodbg*/
>> 2964 addq.w #4,%a1
>> 2965 cmp.b #'L',%a1@
>> 2966 bne 2f /*nodbg*/
>> 2967 addq.w #4,%a1
>> 2968 cmp.b #'X',%a1@
>> 2969 bne 2f /*nodbg*/
>> 2970 addq.w #4,%a1
>> 2971 cmp.b #'$',%a1@
>> 2972 bne 2f /*nodbg*/
>> 2973 /* signature OK */
>> 2974 lea %pc@(L(q40_do_debug)),%a1
>> 2975 tas %a1@
>> 2976 /*nodbg: q40_do_debug is 0 by default*/
>> 2977 2:
>> 2978 #endif
>> 2979
>> 2980 #ifdef CONFIG_MVME16x
>> 2981 is_not_mvme16x(L(serial_init_not_mvme16x))
>> 2982 moveb #0x10,M167_PCSCCMICR
>> 2983 moveb #0x10,M167_PCSCCTICR
>> 2984 moveb #0x10,M167_PCSCCRICR
>> 2985 jra L(serial_init_done)
>> 2986 L(serial_init_not_mvme16x):
>> 2987 #endif
>> 2988
>> 2989 #ifdef CONFIG_APOLLO
>> 2990 /* We count on the PROM initializing SIO1 */
>> 2991 #endif
>> 2992
>> 2993 #ifdef CONFIG_HP300
>> 2994 /* We count on the boot loader initialising the UART */
>> 2995 #endif
>> 2996
>> 2997 L(serial_init_done):
>> 2998 func_return serial_init
>> 2999
>> 3000 /*
>> 3001 * Output character on serial port.
>> 3002 */
>> 3003 func_start serial_putc,%d0/%d1/%a0/%a1
>> 3004
>> 3005 movel ARG1,%d0
>> 3006 cmpib #'\n',%d0
>> 3007 jbne 1f
>> 3008
>> 3009 /* A little safe recursion is good for the soul */
>> 3010 serial_putc #'\r'
>> 3011 1:
>> 3012
>> 3013 #ifdef CONFIG_AMIGA
>> 3014 is_not_amiga(2f)
>> 3015 andw #0x00ff,%d0
>> 3016 oriw #0x0100,%d0
>> 3017 movel %pc@(L(custom)),%a0
>> 3018 movew %d0,%a0@(CUSTOMBASE+C_SERDAT)
>> 3019 1: movew %a0@(CUSTOMBASE+C_SERDATR),%d0
>> 3020 andw #0x2000,%d0
>> 3021 jeq 1b
>> 3022 jra L(serial_putc_done)
>> 3023 2:
>> 3024 #endif
>> 3025
>> 3026 #ifdef CONFIG_MAC
>> 3027 is_not_mac(5f)
>> 3028 #if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B)
>> 3029 movel %pc@(L(mac_sccbase)),%a1
>> 3030 #endif
>> 3031 #ifdef MAC_USE_SCC_A
>> 3032 3: btst #2,%a1@(mac_scc_cha_a_ctrl_offset)
>> 3033 jeq 3b
>> 3034 moveb %d0,%a1@(mac_scc_cha_a_data_offset)
>> 3035 #endif /* MAC_USE_SCC_A */
>> 3036 #ifdef MAC_USE_SCC_B
>> 3037 4: btst #2,%a1@(mac_scc_cha_b_ctrl_offset)
>> 3038 jeq 4b
>> 3039 moveb %d0,%a1@(mac_scc_cha_b_data_offset)
>> 3040 #endif /* MAC_USE_SCC_B */
>> 3041 jra L(serial_putc_done)
>> 3042 5:
>> 3043 #endif /* CONFIG_MAC */
>> 3044
>> 3045 #ifdef CONFIG_ATARI
>> 3046 is_not_atari(4f)
>> 3047 movel %pc@(L(iobase)),%a1
>> 3048 #if defined(USE_PRINTER)
>> 3049 3: btst #0,%a1@(LSTMFP_GPIP)
>> 3050 jne 3b
>> 3051 moveb #LPSG_IO_B,%a1@(LPSG_SELECT)
>> 3052 moveb %d0,%a1@(LPSG_WRITE)
>> 3053 moveb #LPSG_IO_A,%a1@(LPSG_SELECT)
>> 3054 moveb %a1@(LPSG_READ),%d0
>> 3055 bclr #5,%d0
>> 3056 moveb %d0,%a1@(LPSG_WRITE)
372 nop 3057 nop
373 rted r17, 0 /* enable MMU <<
374 nop 3058 nop
>> 3059 bset #5,%d0
>> 3060 moveb %d0,%a1@(LPSG_WRITE)
>> 3061 #elif defined(USE_SCC_A) || defined(USE_SCC_B)
>> 3062 3: btst #2,%a1@(LSCC_CTRL)
>> 3063 jeq 3b
>> 3064 moveb %d0,%a1@(LSCC_DATA)
>> 3065 #elif defined(USE_MFP)
>> 3066 3: btst #7,%a1@(LMFP_TSR)
>> 3067 jeq 3b
>> 3068 moveb %d0,%a1@(LMFP_UDR)
>> 3069 #endif
>> 3070 jra L(serial_putc_done)
>> 3071 4:
>> 3072 #endif /* CONFIG_ATARI */
>> 3073
>> 3074 #ifdef CONFIG_MVME147
>> 3075 is_not_mvme147(2f)
>> 3076 1: btst #2,M147_SCC_CTRL_A
>> 3077 jeq 1b
>> 3078 moveb %d0,M147_SCC_DATA_A
>> 3079 jbra L(serial_putc_done)
>> 3080 2:
>> 3081 #endif
>> 3082
>> 3083 #ifdef CONFIG_MVME16x
>> 3084 is_not_mvme16x(2f)
>> 3085 /*
>> 3086 * If the loader gave us a board type then we can use that to
>> 3087 * select an appropriate output routine; otherwise we just use
>> 3088 * the Bug code. If we have to use the Bug that means the Bug
>> 3089 * workspace has to be valid, which means the Bug has to use
>> 3090 * the SRAM, which is non-standard.
>> 3091 */
>> 3092 moveml %d0-%d7/%a2-%a6,%sp@-
>> 3093 movel vme_brdtype,%d1
>> 3094 jeq 1f | No tag - use the Bug
>> 3095 cmpi #VME_TYPE_MVME162,%d1
>> 3096 jeq 6f
>> 3097 cmpi #VME_TYPE_MVME172,%d1
>> 3098 jne 5f
>> 3099 /* 162/172; it's an SCC */
>> 3100 6: btst #2,M162_SCC_CTRL_A
>> 3101 nop
>> 3102 nop
>> 3103 nop
>> 3104 jeq 6b
>> 3105 moveb #8,M162_SCC_CTRL_A
>> 3106 nop
>> 3107 nop
>> 3108 nop
>> 3109 moveb %d0,M162_SCC_CTRL_A
>> 3110 jra 3f
>> 3111 5:
>> 3112 /* 166/167/177; it's a CD2401 */
>> 3113 moveb #0,M167_CYCAR
>> 3114 moveb M167_CYIER,%d2
>> 3115 moveb #0x02,M167_CYIER
>> 3116 7:
>> 3117 btst #5,M167_PCSCCTICR
>> 3118 jeq 7b
>> 3119 moveb M167_PCTPIACKR,%d1
>> 3120 moveb M167_CYLICR,%d1
>> 3121 jeq 8f
>> 3122 moveb #0x08,M167_CYTEOIR
>> 3123 jra 7b
>> 3124 8:
>> 3125 moveb %d0,M167_CYTDR
>> 3126 moveb #0,M167_CYTEOIR
>> 3127 moveb %d2,M167_CYIER
>> 3128 jra 3f
>> 3129 1:
>> 3130 moveb %d0,%sp@-
>> 3131 trap #15
>> 3132 .word 0x0020 /* TRAP 0x020 */
>> 3133 3:
>> 3134 moveml %sp@+,%d0-%d7/%a2-%a6
>> 3135 jbra L(serial_putc_done)
>> 3136 2:
>> 3137 #endif /* CONFIG_MVME16x */
>> 3138
>> 3139 #ifdef CONFIG_BVME6000
>> 3140 is_not_bvme6000(2f)
>> 3141 /*
>> 3142 * The BVME6000 machine has a serial port ...
>> 3143 */
>> 3144 1: btst #2,BVME_SCC_CTRL_A
>> 3145 jeq 1b
>> 3146 moveb %d0,BVME_SCC_DATA_A
>> 3147 jbra L(serial_putc_done)
>> 3148 2:
>> 3149 #endif
>> 3150
>> 3151 #ifdef CONFIG_SUN3X
>> 3152 is_not_sun3x(2f)
>> 3153 movel %d0,-(%sp)
>> 3154 movel 0xFEFE0018,%a1
>> 3155 jbsr (%a1)
>> 3156 addq #4,%sp
>> 3157 jbra L(serial_putc_done)
>> 3158 2:
>> 3159 #endif
>> 3160
>> 3161 #ifdef CONFIG_Q40
>> 3162 is_not_q40(2f)
>> 3163 tst.l %pc@(L(q40_do_debug)) /* only debug if requested */
>> 3164 beq 2f
>> 3165 lea %pc@(q40_mem_cptr),%a1
>> 3166 move.l %a1@,%a0
>> 3167 move.b %d0,%a0@
>> 3168 addq.l #4,%a0
>> 3169 move.l %a0,%a1@
>> 3170 jbra L(serial_putc_done)
>> 3171 2:
>> 3172 #endif
>> 3173
>> 3174 #ifdef CONFIG_APOLLO
>> 3175 is_not_apollo(2f)
>> 3176 movl %pc@(L(iobase)),%a1
>> 3177 moveb %d0,%a1@(LTHRB0)
>> 3178 1: moveb %a1@(LSRB0),%d0
>> 3179 andb #0x4,%d0
>> 3180 beq 1b
>> 3181 jbra L(serial_putc_done)
>> 3182 2:
>> 3183 #endif
>> 3184
>> 3185 #ifdef CONFIG_HP300
>> 3186 is_not_hp300(3f)
>> 3187 movl %pc@(L(iobase)),%a1
>> 3188 addl %pc@(L(uartbase)),%a1
>> 3189 movel %pc@(L(uart_scode)),%d1 /* Check the scode */
>> 3190 jmi 3f /* Unset? Exit */
>> 3191 cmpi #256,%d1 /* APCI scode? */
>> 3192 jeq 2f
>> 3193 1: moveb %a1@(DCALSR),%d1 /* Output to DCA */
>> 3194 andb #0x20,%d1
>> 3195 beq 1b
>> 3196 moveb %d0,%a1@(DCADATA)
>> 3197 jbra L(serial_putc_done)
>> 3198 2: moveb %a1@(APCILSR),%d1 /* Output to APCI */
>> 3199 andb #0x20,%d1
>> 3200 beq 2b
>> 3201 moveb %d0,%a1@(APCIDATA)
>> 3202 jbra L(serial_putc_done)
>> 3203 3:
>> 3204 #endif
>> 3205
>> 3206 #ifdef CONFIG_VIRT
>> 3207 is_not_virt(1f)
>> 3208
>> 3209 movel L(virt_gf_tty_base),%a1
>> 3210 movel %d0,%a1@(GF_PUT_CHAR)
>> 3211 1:
>> 3212 #endif
>> 3213
>> 3214 L(serial_putc_done):
>> 3215 func_return serial_putc
>> 3216
>> 3217 /*
>> 3218 * Output a string.
>> 3219 */
>> 3220 func_start puts,%d0/%a0
>> 3221
>> 3222 movel ARG1,%a0
>> 3223 jra 2f
>> 3224 1:
>> 3225 #ifdef CONSOLE_DEBUG
>> 3226 console_putc %d0
>> 3227 #endif
>> 3228 #ifdef SERIAL_DEBUG
>> 3229 serial_putc %d0
>> 3230 #endif
>> 3231 2: moveb %a0@+,%d0
>> 3232 jne 1b
>> 3233
>> 3234 func_return puts
>> 3235
>> 3236 /*
>> 3237 * Output number in hex notation.
>> 3238 */
>> 3239
>> 3240 func_start putn,%d0-%d2
>> 3241
>> 3242 putc ' '
>> 3243
>> 3244 movel ARG1,%d0
>> 3245 moveq #7,%d1
>> 3246 1: roll #4,%d0
>> 3247 move %d0,%d2
>> 3248 andb #0x0f,%d2
>> 3249 addb #'0',%d2
>> 3250 cmpb #'9',%d2
>> 3251 jls 2f
>> 3252 addb #'A'-('9'+1),%d2
>> 3253 2:
>> 3254 #ifdef CONSOLE_DEBUG
>> 3255 console_putc %d2
>> 3256 #endif
>> 3257 #ifdef SERIAL_DEBUG
>> 3258 serial_putc %d2
>> 3259 #endif
>> 3260 dbra %d1,1b
>> 3261
>> 3262 func_return putn
>> 3263
>> 3264 #ifdef CONFIG_EARLY_PRINTK
>> 3265 /*
>> 3266 * This routine takes its parameters on the stack. It then
>> 3267 * turns around and calls the internal routines. This routine
>> 3268 * is used by the boot console.
>> 3269 *
>> 3270 * The calling parameters are:
>> 3271 * void debug_cons_nputs(const char *str, unsigned length)
>> 3272 *
>> 3273 * This routine does NOT understand variable arguments only
>> 3274 * simple strings!
>> 3275 */
>> 3276 ENTRY(debug_cons_nputs)
>> 3277 moveml %d0/%d1/%a0,%sp@-
>> 3278 movew %sr,%sp@-
>> 3279 ori #0x0700,%sr
>> 3280 movel %sp@(18),%a0 /* fetch parameter */
>> 3281 movel %sp@(22),%d1 /* fetch parameter */
>> 3282 jra 2f
>> 3283 1:
>> 3284 #ifdef CONSOLE_DEBUG
>> 3285 console_putc %d0
>> 3286 #endif
>> 3287 #ifdef SERIAL_DEBUG
>> 3288 serial_putc %d0
>> 3289 #endif
>> 3290 subq #1,%d1
>> 3291 2: jeq 3f
>> 3292 moveb %a0@+,%d0
>> 3293 jne 1b
>> 3294 3:
>> 3295 movew %sp@+,%sr
>> 3296 moveml %sp@+,%d0/%d1/%a0
>> 3297 rts
>> 3298 #endif /* CONFIG_EARLY_PRINTK */
>> 3299
>> 3300 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
>> 3301 func_start set_leds,%d0/%a0
>> 3302 movel ARG1,%d0
>> 3303 #ifdef CONFIG_HP300
>> 3304 is_not_hp300(1f)
>> 3305 movel %pc@(L(iobase)),%a0
>> 3306 moveb %d0,%a0@(0x1ffff)
>> 3307 jra 2f
>> 3308 #endif
>> 3309 1:
>> 3310 #ifdef CONFIG_APOLLO
>> 3311 movel %pc@(L(iobase)),%a0
>> 3312 lsll #8,%d0
>> 3313 eorw #0xff00,%d0
>> 3314 moveb %d0,%a0@(LCPUCTRL)
>> 3315 #endif
>> 3316 2:
>> 3317 func_return set_leds
>> 3318 #endif
>> 3319
>> 3320 #ifdef CONSOLE_DEBUG
>> 3321 /*
>> 3322 * For continuity, see the data alignment
>> 3323 * to which this structure is tied.
>> 3324 */
>> 3325 #define Lconsole_struct_cur_column 0
>> 3326 #define Lconsole_struct_cur_row 4
>> 3327 #define Lconsole_struct_num_columns 8
>> 3328 #define Lconsole_struct_num_rows 12
>> 3329 #define Lconsole_struct_left_edge 16
>> 3330
>> 3331 func_start console_init,%a0-%a4/%d0-%d7
>> 3332 /*
>> 3333 * Some of the register usage that follows
>> 3334 * a0 = pointer to boot_info
>> 3335 * a1 = pointer to screen
>> 3336 * a2 = pointer to console_globals
>> 3337 * d3 = pixel width of screen
>> 3338 * d4 = pixel height of screen
>> 3339 * (d3,d4) ~= (x,y) of a point just below
>> 3340 * and to the right of the screen
>> 3341 * NOT on the screen!
>> 3342 * d5 = number of bytes per scan line
>> 3343 * d6 = number of bytes on the entire screen
>> 3344 */
>> 3345
>> 3346 lea %pc@(L(console_globals)),%a2
>> 3347 movel %pc@(L(mac_videobase)),%a1
>> 3348 movel %pc@(L(mac_rowbytes)),%d5
>> 3349 movel %pc@(L(mac_dimensions)),%d3 /* -> low byte */
>> 3350 movel %d3,%d4
>> 3351 swap %d4 /* -> high byte */
>> 3352 andl #0xffff,%d3 /* d3 = screen width in pixels */
>> 3353 andl #0xffff,%d4 /* d4 = screen height in pixels */
>> 3354
>> 3355 movel %d5,%d6
>> 3356 | subl #20,%d6
>> 3357 mulul %d4,%d6 /* scan line bytes x num scan lines */
>> 3358 divul #8,%d6 /* we'll clear 8 bytes at a time */
>> 3359 moveq #-1,%d0 /* Mac_black */
>> 3360 subq #1,%d6
>> 3361
>> 3362 L(console_clear_loop):
>> 3363 movel %d0,%a1@+
>> 3364 movel %d0,%a1@+
>> 3365 dbra %d6,L(console_clear_loop)
>> 3366
>> 3367 /* Calculate font size */
>> 3368
>> 3369 #if defined(FONT_8x8) && defined(CONFIG_FONT_8x8)
>> 3370 lea %pc@(font_vga_8x8),%a0
>> 3371 #elif defined(FONT_8x16) && defined(CONFIG_FONT_8x16)
>> 3372 lea %pc@(font_vga_8x16),%a0
>> 3373 #elif defined(FONT_6x11) && defined(CONFIG_FONT_6x11)
>> 3374 lea %pc@(font_vga_6x11),%a0
>> 3375 #elif defined(CONFIG_FONT_8x8) /* default */
>> 3376 lea %pc@(font_vga_8x8),%a0
>> 3377 #else /* no compiled-in font */
>> 3378 lea 0,%a0
>> 3379 #endif
>> 3380
>> 3381 /*
>> 3382 * At this point we make a shift in register usage
>> 3383 * a1 = address of console_font pointer
>> 3384 */
>> 3385 lea %pc@(L(console_font)),%a1
>> 3386 movel %a0,%a1@ /* store pointer to struct fbcon_font_desc in console_font */
>> 3387 tstl %a0
>> 3388 jeq 1f
>> 3389 lea %pc@(L(console_font_data)),%a4
>> 3390 movel %a0@(FONT_DESC_DATA),%d0
>> 3391 subl #L(console_font),%a1
>> 3392 addl %a1,%d0
>> 3393 movel %d0,%a4@
>> 3394
>> 3395 /*
>> 3396 * Calculate global maxs
>> 3397 * Note - we can use either an
>> 3398 * 8 x 16 or 8 x 8 character font
>> 3399 * 6 x 11 also supported
>> 3400 */
>> 3401 /* ASSERT: a0 = contents of Lconsole_font */
>> 3402 movel %d3,%d0 /* screen width in pixels */
>> 3403 divul %a0@(FONT_DESC_WIDTH),%d0 /* d0 = max num chars per row */
>> 3404
>> 3405 movel %d4,%d1 /* screen height in pixels */
>> 3406 divul %a0@(FONT_DESC_HEIGHT),%d1 /* d1 = max num rows */
>> 3407
>> 3408 movel %d0,%a2@(Lconsole_struct_num_columns)
>> 3409 movel %d1,%a2@(Lconsole_struct_num_rows)
>> 3410
>> 3411 /*
>> 3412 * Clear the current row and column
>> 3413 */
>> 3414 clrl %a2@(Lconsole_struct_cur_column)
>> 3415 clrl %a2@(Lconsole_struct_cur_row)
>> 3416 clrl %a2@(Lconsole_struct_left_edge)
>> 3417
>> 3418 /*
>> 3419 * Initialization is complete
>> 3420 */
>> 3421 1:
>> 3422 func_return console_init
>> 3423
>> 3424 #ifdef CONFIG_LOGO
>> 3425 func_start console_put_penguin,%a0-%a1/%d0-%d7
>> 3426 /*
>> 3427 * Get 'that_penguin' onto the screen in the upper right corner
>> 3428 * penguin is 64 x 74 pixels, align against right edge of screen
>> 3429 */
>> 3430 lea %pc@(L(mac_dimensions)),%a0
>> 3431 movel %a0@,%d0
>> 3432 andil #0xffff,%d0
>> 3433 subil #64,%d0 /* snug up against the right edge */
>> 3434 clrl %d1 /* start at the top */
>> 3435 movel #73,%d7
>> 3436 lea %pc@(L(that_penguin)),%a1
>> 3437 L(console_penguin_row):
>> 3438 movel #31,%d6
>> 3439 L(console_penguin_pixel_pair):
>> 3440 moveb %a1@,%d2
>> 3441 lsrb #4,%d2
>> 3442 console_plot_pixel %d0,%d1,%d2
>> 3443 addq #1,%d0
>> 3444 moveb %a1@+,%d2
>> 3445 console_plot_pixel %d0,%d1,%d2
>> 3446 addq #1,%d0
>> 3447 dbra %d6,L(console_penguin_pixel_pair)
>> 3448
>> 3449 subil #64,%d0
>> 3450 addq #1,%d1
>> 3451 dbra %d7,L(console_penguin_row)
>> 3452
>> 3453 func_return console_put_penguin
>> 3454
>> 3455 /* include penguin bitmap */
>> 3456 L(that_penguin):
>> 3457 #include "../mac/mac_penguin.S"
>> 3458 #endif
>> 3459
>> 3460 /*
>> 3461 * Calculate source and destination addresses
>> 3462 * output a1 = dest
>> 3463 * a2 = source
>> 3464 */
>> 3465
>> 3466 func_start console_scroll,%a0-%a4/%d0-%d7
>> 3467 lea %pc@(L(mac_videobase)),%a0
>> 3468 movel %a0@,%a1
>> 3469 movel %a1,%a2
>> 3470 lea %pc@(L(mac_rowbytes)),%a0
>> 3471 movel %a0@,%d5
>> 3472 movel %pc@(L(console_font)),%a0
>> 3473 tstl %a0
>> 3474 jeq 1f
>> 3475 mulul %a0@(FONT_DESC_HEIGHT),%d5 /* account for # scan lines per character */
>> 3476 addal %d5,%a2
>> 3477
>> 3478 /*
>> 3479 * Get dimensions
>> 3480 */
>> 3481 lea %pc@(L(mac_dimensions)),%a0
>> 3482 movel %a0@,%d3
>> 3483 movel %d3,%d4
>> 3484 swap %d4
>> 3485 andl #0xffff,%d3 /* d3 = screen width in pixels */
>> 3486 andl #0xffff,%d4 /* d4 = screen height in pixels */
>> 3487
>> 3488 /*
>> 3489 * Calculate number of bytes to move
>> 3490 */
>> 3491 lea %pc@(L(mac_rowbytes)),%a0
>> 3492 movel %a0@,%d6
>> 3493 movel %pc@(L(console_font)),%a0
>> 3494 subl %a0@(FONT_DESC_HEIGHT),%d4 /* we're not scrolling the top row! */
>> 3495 mulul %d4,%d6 /* scan line bytes x num scan lines */
>> 3496 divul #32,%d6 /* we'll move 8 longs at a time */
>> 3497 subq #1,%d6
>> 3498
>> 3499 L(console_scroll_loop):
>> 3500 movel %a2@+,%a1@+
>> 3501 movel %a2@+,%a1@+
>> 3502 movel %a2@+,%a1@+
>> 3503 movel %a2@+,%a1@+
>> 3504 movel %a2@+,%a1@+
>> 3505 movel %a2@+,%a1@+
>> 3506 movel %a2@+,%a1@+
>> 3507 movel %a2@+,%a1@+
>> 3508 dbra %d6,L(console_scroll_loop)
>> 3509
>> 3510 lea %pc@(L(mac_rowbytes)),%a0
>> 3511 movel %a0@,%d6
>> 3512 movel %pc@(L(console_font)),%a0
>> 3513 mulul %a0@(FONT_DESC_HEIGHT),%d6 /* scan line bytes x font height */
>> 3514 divul #32,%d6 /* we'll move 8 words at a time */
>> 3515 subq #1,%d6
>> 3516
>> 3517 moveq #-1,%d0
>> 3518 L(console_scroll_clear_loop):
>> 3519 movel %d0,%a1@+
>> 3520 movel %d0,%a1@+
>> 3521 movel %d0,%a1@+
>> 3522 movel %d0,%a1@+
>> 3523 movel %d0,%a1@+
>> 3524 movel %d0,%a1@+
>> 3525 movel %d0,%a1@+
>> 3526 movel %d0,%a1@+
>> 3527 dbra %d6,L(console_scroll_clear_loop)
>> 3528
>> 3529 1:
>> 3530 func_return console_scroll
>> 3531
>> 3532
>> 3533 func_start console_putc,%a0/%a1/%d0-%d7
>> 3534
>> 3535 is_not_mac(L(console_exit))
>> 3536 tstl %pc@(L(console_font))
>> 3537 jeq L(console_exit)
>> 3538
>> 3539 /* Output character in d7 on console.
>> 3540 */
>> 3541 movel ARG1,%d7
>> 3542 cmpib #'\n',%d7
>> 3543 jbne 1f
>> 3544
>> 3545 /* A little safe recursion is good for the soul */
>> 3546 console_putc #'\r'
>> 3547 1:
>> 3548 lea %pc@(L(console_globals)),%a0
>> 3549
>> 3550 cmpib #10,%d7
>> 3551 jne L(console_not_lf)
>> 3552 movel %a0@(Lconsole_struct_cur_row),%d0
>> 3553 addil #1,%d0
>> 3554 movel %d0,%a0@(Lconsole_struct_cur_row)
>> 3555 movel %a0@(Lconsole_struct_num_rows),%d1
>> 3556 cmpl %d1,%d0
>> 3557 jcs 1f
>> 3558 subil #1,%d0
>> 3559 movel %d0,%a0@(Lconsole_struct_cur_row)
>> 3560 console_scroll
>> 3561 1:
>> 3562 jra L(console_exit)
>> 3563
>> 3564 L(console_not_lf):
>> 3565 cmpib #13,%d7
>> 3566 jne L(console_not_cr)
>> 3567 clrl %a0@(Lconsole_struct_cur_column)
>> 3568 jra L(console_exit)
>> 3569
>> 3570 L(console_not_cr):
>> 3571 cmpib #1,%d7
>> 3572 jne L(console_not_home)
>> 3573 clrl %a0@(Lconsole_struct_cur_row)
>> 3574 clrl %a0@(Lconsole_struct_cur_column)
>> 3575 jra L(console_exit)
>> 3576
>> 3577 /*
>> 3578 * At this point we know that the %d7 character is going to be
>> 3579 * rendered on the screen. Register usage is -
>> 3580 * a0 = pointer to console globals
>> 3581 * a1 = font data
>> 3582 * d0 = cursor column
>> 3583 * d1 = cursor row to draw the character
>> 3584 * d7 = character number
>> 3585 */
>> 3586 L(console_not_home):
>> 3587 movel %a0@(Lconsole_struct_cur_column),%d0
>> 3588 addql #1,%a0@(Lconsole_struct_cur_column)
>> 3589 movel %a0@(Lconsole_struct_num_columns),%d1
>> 3590 cmpl %d1,%d0
>> 3591 jcs 1f
>> 3592 console_putc #'\n' /* recursion is OK! */
>> 3593 1:
>> 3594 movel %a0@(Lconsole_struct_cur_row),%d1
>> 3595
>> 3596 /*
>> 3597 * At this point we make a shift in register usage
>> 3598 * a0 = address of pointer to font data (fbcon_font_desc)
>> 3599 */
>> 3600 movel %pc@(L(console_font)),%a0
>> 3601 movel %pc@(L(console_font_data)),%a1 /* Load fbcon_font_desc.data into a1 */
>> 3602 andl #0x000000ff,%d7
>> 3603 /* ASSERT: a0 = contents of Lconsole_font */
>> 3604 mulul %a0@(FONT_DESC_HEIGHT),%d7 /* d7 = index into font data */
>> 3605 addl %d7,%a1 /* a1 = points to char image */
>> 3606
>> 3607 /*
>> 3608 * At this point we make a shift in register usage
>> 3609 * d0 = pixel coordinate, x
>> 3610 * d1 = pixel coordinate, y
>> 3611 * d2 = (bit 0) 1/0 for white/black (!) pixel on screen
>> 3612 * d3 = font scan line data (8 pixels)
>> 3613 * d6 = count down for the font's pixel width (8)
>> 3614 * d7 = count down for the font's pixel count in height
>> 3615 */
>> 3616 /* ASSERT: a0 = contents of Lconsole_font */
>> 3617 mulul %a0@(FONT_DESC_WIDTH),%d0
>> 3618 mulul %a0@(FONT_DESC_HEIGHT),%d1
>> 3619 movel %a0@(FONT_DESC_HEIGHT),%d7 /* Load fbcon_font_desc.height into d7 */
>> 3620 subq #1,%d7
>> 3621 L(console_read_char_scanline):
>> 3622 moveb %a1@+,%d3
>> 3623
>> 3624 /* ASSERT: a0 = contents of Lconsole_font */
>> 3625 movel %a0@(FONT_DESC_WIDTH),%d6 /* Load fbcon_font_desc.width into d6 */
>> 3626 subql #1,%d6
>> 3627
>> 3628 L(console_do_font_scanline):
>> 3629 lslb #1,%d3
>> 3630 scsb %d2 /* convert 1 bit into a byte */
>> 3631 console_plot_pixel %d0,%d1,%d2
>> 3632 addq #1,%d0
>> 3633 dbra %d6,L(console_do_font_scanline)
>> 3634
>> 3635 /* ASSERT: a0 = contents of Lconsole_font */
>> 3636 subl %a0@(FONT_DESC_WIDTH),%d0
>> 3637 addq #1,%d1
>> 3638 dbra %d7,L(console_read_char_scanline)
>> 3639
>> 3640 L(console_exit):
>> 3641 func_return console_putc
>> 3642
>> 3643 /*
>> 3644 * Input:
>> 3645 * d0 = x coordinate
>> 3646 * d1 = y coordinate
>> 3647 * d2 = (bit 0) 1/0 for white/black (!)
>> 3648 * All registers are preserved
>> 3649 */
>> 3650 func_start console_plot_pixel,%a0-%a1/%d0-%d4
>> 3651
>> 3652 movel %pc@(L(mac_videobase)),%a1
>> 3653 movel %pc@(L(mac_videodepth)),%d3
>> 3654 movel ARG1,%d0
>> 3655 movel ARG2,%d1
>> 3656 mulul %pc@(L(mac_rowbytes)),%d1
>> 3657 movel ARG3,%d2
>> 3658
>> 3659 /*
>> 3660 * Register usage:
>> 3661 * d0 = x coord becomes byte offset into frame buffer
>> 3662 * d1 = y coord
>> 3663 * d2 = black or white (0/1)
>> 3664 * d3 = video depth
>> 3665 * d4 = temp of x (d0) for many bit depths
>> 3666 */
>> 3667 L(test_1bit):
>> 3668 cmpb #1,%d3
>> 3669 jbne L(test_2bit)
>> 3670 movel %d0,%d4 /* we need the low order 3 bits! */
>> 3671 divul #8,%d0
>> 3672 addal %d0,%a1
>> 3673 addal %d1,%a1
>> 3674 andb #7,%d4
>> 3675 eorb #7,%d4 /* reverse the x-coordinate w/ screen-bit # */
>> 3676 andb #1,%d2
>> 3677 jbne L(white_1)
>> 3678 bsetb %d4,%a1@
>> 3679 jbra L(console_plot_pixel_exit)
>> 3680 L(white_1):
>> 3681 bclrb %d4,%a1@
>> 3682 jbra L(console_plot_pixel_exit)
>> 3683
>> 3684 L(test_2bit):
>> 3685 cmpb #2,%d3
>> 3686 jbne L(test_4bit)
>> 3687 movel %d0,%d4 /* we need the low order 2 bits! */
>> 3688 divul #4,%d0
>> 3689 addal %d0,%a1
>> 3690 addal %d1,%a1
>> 3691 andb #3,%d4
>> 3692 eorb #3,%d4 /* reverse the x-coordinate w/ screen-bit # */
>> 3693 lsll #1,%d4 /* ! */
>> 3694 andb #1,%d2
>> 3695 jbne L(white_2)
>> 3696 bsetb %d4,%a1@
>> 3697 addq #1,%d4
>> 3698 bsetb %d4,%a1@
>> 3699 jbra L(console_plot_pixel_exit)
>> 3700 L(white_2):
>> 3701 bclrb %d4,%a1@
>> 3702 addq #1,%d4
>> 3703 bclrb %d4,%a1@
>> 3704 jbra L(console_plot_pixel_exit)
>> 3705
>> 3706 L(test_4bit):
>> 3707 cmpb #4,%d3
>> 3708 jbne L(test_8bit)
>> 3709 movel %d0,%d4 /* we need the low order bit! */
>> 3710 divul #2,%d0
>> 3711 addal %d0,%a1
>> 3712 addal %d1,%a1
>> 3713 andb #1,%d4
>> 3714 eorb #1,%d4
>> 3715 lsll #2,%d4 /* ! */
>> 3716 andb #1,%d2
>> 3717 jbne L(white_4)
>> 3718 bsetb %d4,%a1@
>> 3719 addq #1,%d4
>> 3720 bsetb %d4,%a1@
>> 3721 addq #1,%d4
>> 3722 bsetb %d4,%a1@
>> 3723 addq #1,%d4
>> 3724 bsetb %d4,%a1@
>> 3725 jbra L(console_plot_pixel_exit)
>> 3726 L(white_4):
>> 3727 bclrb %d4,%a1@
>> 3728 addq #1,%d4
>> 3729 bclrb %d4,%a1@
>> 3730 addq #1,%d4
>> 3731 bclrb %d4,%a1@
>> 3732 addq #1,%d4
>> 3733 bclrb %d4,%a1@
>> 3734 jbra L(console_plot_pixel_exit)
>> 3735
>> 3736 L(test_8bit):
>> 3737 cmpb #8,%d3
>> 3738 jbne L(test_16bit)
>> 3739 addal %d0,%a1
>> 3740 addal %d1,%a1
>> 3741 andb #1,%d2
>> 3742 jbne L(white_8)
>> 3743 moveb #0xff,%a1@
>> 3744 jbra L(console_plot_pixel_exit)
>> 3745 L(white_8):
>> 3746 clrb %a1@
>> 3747 jbra L(console_plot_pixel_exit)
>> 3748
>> 3749 L(test_16bit):
>> 3750 cmpb #16,%d3
>> 3751 jbne L(console_plot_pixel_exit)
>> 3752 addal %d0,%a1
>> 3753 addal %d0,%a1
>> 3754 addal %d1,%a1
>> 3755 andb #1,%d2
>> 3756 jbne L(white_16)
>> 3757 clrw %a1@
>> 3758 jbra L(console_plot_pixel_exit)
>> 3759 L(white_16):
>> 3760 movew #0x0fff,%a1@
>> 3761 jbra L(console_plot_pixel_exit)
>> 3762
>> 3763 L(console_plot_pixel_exit):
>> 3764 func_return console_plot_pixel
>> 3765 #endif /* CONSOLE_DEBUG */
>> 3766
>> 3767
>> 3768 __INITDATA
>> 3769 .align 4
>> 3770
>> 3771 m68k_init_mapped_size:
>> 3772 .long 0
>> 3773
>> 3774 #if defined(CONFIG_ATARI) || defined(CONFIG_AMIGA) || \
>> 3775 defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
>> 3776 L(custom):
>> 3777 L(iobase):
>> 3778 .long 0
>> 3779 #endif
>> 3780
>> 3781 #ifdef CONSOLE_DEBUG
>> 3782 L(console_globals):
>> 3783 .long 0 /* cursor column */
>> 3784 .long 0 /* cursor row */
>> 3785 .long 0 /* max num columns */
>> 3786 .long 0 /* max num rows */
>> 3787 .long 0 /* left edge */
>> 3788 L(console_font):
>> 3789 .long 0 /* pointer to console font (struct font_desc) */
>> 3790 L(console_font_data):
>> 3791 .long 0 /* pointer to console font data */
>> 3792 #endif /* CONSOLE_DEBUG */
>> 3793
>> 3794 #if defined(MMU_PRINT)
>> 3795 L(mmu_print_data):
>> 3796 .long 0 /* valid flag */
>> 3797 .long 0 /* start logical */
>> 3798 .long 0 /* next logical */
>> 3799 .long 0 /* start physical */
>> 3800 .long 0 /* next physical */
>> 3801 #endif /* MMU_PRINT */
>> 3802
>> 3803 L(cputype):
>> 3804 .long 0
>> 3805 L(mmu_cached_pointer_tables):
>> 3806 .long 0
>> 3807 L(mmu_num_pointer_tables):
>> 3808 .long 0
>> 3809 L(phys_kernel_start):
>> 3810 .long 0
>> 3811 L(kernel_end):
>> 3812 .long 0
>> 3813 L(memory_start):
>> 3814 .long 0
>> 3815 L(kernel_pgdir_ptr):
>> 3816 .long 0
>> 3817 L(temp_mmap_mem):
>> 3818 .long 0
>> 3819
>> 3820 #if defined (CONFIG_MVME147)
>> 3821 M147_SCC_CTRL_A = 0xfffe3002
>> 3822 M147_SCC_DATA_A = 0xfffe3003
>> 3823 #endif
>> 3824
>> 3825 #if defined (CONFIG_MVME16x)
>> 3826 M162_SCC_CTRL_A = 0xfff45005
>> 3827 M167_CYCAR = 0xfff450ee
>> 3828 M167_CYIER = 0xfff45011
>> 3829 M167_CYLICR = 0xfff45026
>> 3830 M167_CYTEOIR = 0xfff45085
>> 3831 M167_CYTDR = 0xfff450f8
>> 3832 M167_PCSCCMICR = 0xfff4201d
>> 3833 M167_PCSCCTICR = 0xfff4201e
>> 3834 M167_PCSCCRICR = 0xfff4201f
>> 3835 M167_PCTPIACKR = 0xfff42025
>> 3836 #endif
>> 3837
>> 3838 #if defined (CONFIG_BVME6000)
>> 3839 BVME_SCC_CTRL_A = 0xffb0000b
>> 3840 BVME_SCC_DATA_A = 0xffb0000f
>> 3841 #endif
>> 3842
>> 3843 #if defined(CONFIG_MAC)
>> 3844 L(mac_videobase):
>> 3845 .long 0
>> 3846 L(mac_videodepth):
>> 3847 .long 0
>> 3848 L(mac_dimensions):
>> 3849 .long 0
>> 3850 L(mac_rowbytes):
>> 3851 .long 0
>> 3852 L(mac_sccbase):
>> 3853 .long 0
>> 3854 #endif /* CONFIG_MAC */
>> 3855
>> 3856 #if defined (CONFIG_APOLLO)
>> 3857 LSRB0 = 0x10412
>> 3858 LTHRB0 = 0x10416
>> 3859 LCPUCTRL = 0x10100
>> 3860 #endif
>> 3861
>> 3862 #if defined(CONFIG_HP300)
>> 3863 DCADATA = 0x11
>> 3864 DCALSR = 0x1b
>> 3865 APCIDATA = 0x00
>> 3866 APCILSR = 0x14
>> 3867 L(uartbase):
>> 3868 .long 0
>> 3869 L(uart_scode):
>> 3870 .long -1
>> 3871 #endif
>> 3872
>> 3873 __FINIT
>> 3874 .data
>> 3875 .align 4
>> 3876
>> 3877 availmem:
>> 3878 .long 0
>> 3879 m68k_pgtable_cachemode:
>> 3880 .long 0
>> 3881 m68k_supervisor_cachemode:
>> 3882 .long 0
>> 3883 #if defined(CONFIG_MVME16x)
>> 3884 mvme_bdid:
>> 3885 .long 0,0,0,0,0,0,0,0
>> 3886 #endif
>> 3887 #if defined(CONFIG_Q40)
>> 3888 q40_mem_cptr:
>> 3889 .long 0
>> 3890 L(q40_do_debug):
>> 3891 .long 0
>> 3892 #endif
>> 3893
>> 3894 #if defined(CONFIG_VIRT)
>> 3895 GF_PUT_CHAR = 0x00
>> 3896 L(virt_gf_tty_base):
>> 3897 .long 0
>> 3898 #endif /* CONFIG_VIRT */
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