>> 1 /* SPDX-License-Identifier: GPL-2.0 */
>> 2 #include <asm/asm-offsets.h>
>> 3 #include <asm/thread_info.h>
>> 4
>> 5 #define PAGE_SIZE _PAGE_SIZE
>> 6
1 /* 7 /*
2 * Copyright (C) 2008-2009 Michal Simek <monstr !! 8 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
3 * Copyright (C) 2008-2009 PetaLogix !! 9 * ensure that it has .bss alignment (64K).
4 * Copyright (C) 2006 Atmark Techno, Inc. <<
5 * <<
6 * This file is subject to the terms and condi <<
7 * License. See the file "COPYING" in the main <<
8 * for more details. <<
9 */ 10 */
>> 11 #define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
10 12
11 OUTPUT_ARCH(microblaze) !! 13 /* Cavium Octeon should not have a separate PT_NOTE Program Header. */
12 ENTRY(microblaze_start) !! 14 #ifndef CONFIG_CAVIUM_OCTEON_SOC
>> 15 #define EMITS_PT_NOTE
>> 16 #endif
13 17
14 #define RO_EXCEPTION_TABLE_ALIGN 16 !! 18 #define RUNTIME_DISCARD_EXIT
15 19
16 #include <asm/cache.h> <<
17 #include <asm/page.h> <<
18 #include <asm-generic/vmlinux.lds.h> 20 #include <asm-generic/vmlinux.lds.h>
19 #include <asm/thread_info.h> <<
20 21
21 #ifdef __MICROBLAZEEL__ !! 22 #undef mips
22 jiffies = jiffies_64; !! 23 #define mips mips
>> 24 OUTPUT_ARCH(mips)
>> 25 ENTRY(kernel_entry)
>> 26 PHDRS {
>> 27 text PT_LOAD FLAGS(7); /* RWX */
>> 28 #ifndef CONFIG_CAVIUM_OCTEON_SOC
>> 29 note PT_NOTE FLAGS(4); /* R__ */
>> 30 #endif /* CAVIUM_OCTEON_SOC */
>> 31 }
>> 32
>> 33 #ifdef CONFIG_32BIT
>> 34 #ifdef CONFIG_CPU_LITTLE_ENDIAN
>> 35 jiffies = jiffies_64;
>> 36 #else
>> 37 jiffies = jiffies_64 + 4;
>> 38 #endif
23 #else 39 #else
24 jiffies = jiffies_64 + 4; !! 40 jiffies = jiffies_64;
25 #endif 41 #endif
26 42
27 SECTIONS { !! 43 SECTIONS
28 . = CONFIG_KERNEL_START; !! 44 {
29 microblaze_start = CONFIG_KERNEL_BASE_ !! 45 #ifdef CONFIG_BOOT_ELF64
30 .text : AT(ADDR(.text) - LOAD_OFFSET) !! 46 /* Read-only sections, merged into text segment: */
31 _text = . ; !! 47 /* . = 0xc000000000000000; */
32 _stext = . ; !! 48
33 HEAD_TEXT !! 49 /* This is the value for an Origin kernel, taken from an IRIX kernel. */
>> 50 /* . = 0xc00000000001c000; */
>> 51
>> 52 /* Set the vaddr for the text segment to a value
>> 53 * >= 0xa800 0000 0001 9000 if no symmon is going to configured
>> 54 * >= 0xa800 0000 0030 0000 otherwise
>> 55 */
>> 56
>> 57 /* . = 0xa800000000300000; */
>> 58 . = 0xffffffff80300000;
>> 59 #endif
>> 60 . = LINKER_LOAD_ADDRESS;
>> 61 /* read-only */
>> 62 _text = .; /* Text and read-only data */
>> 63 .text : {
34 TEXT_TEXT 64 TEXT_TEXT
35 *(.fixup) <<
36 EXIT_TEXT <<
37 EXIT_CALL <<
38 SCHED_TEXT 65 SCHED_TEXT
39 LOCK_TEXT 66 LOCK_TEXT
40 KPROBES_TEXT 67 KPROBES_TEXT
41 IRQENTRY_TEXT 68 IRQENTRY_TEXT
42 SOFTIRQENTRY_TEXT 69 SOFTIRQENTRY_TEXT
43 . = ALIGN (4) ; !! 70 *(.fixup)
44 _etext = . ; !! 71 *(.gnu.warning)
45 } !! 72 . = ALIGN(16);
46 !! 73 *(.got) /* Global offset table */
47 . = ALIGN (8) ; !! 74 } :text = 0
48 __fdt_blob : AT(ADDR(__fdt_blob) - LOA !! 75 _etext = .; /* End of text section */
49 _fdt_start = . ; !! 76
50 *(__fdt_blob) ; !! 77 EXCEPTION_TABLE(16)
51 . = _fdt_start + 0x10000; !! 78
52 _fdt_end = . ; !! 79 /* Exception table for data bus errors */
>> 80 __dbe_table : {
>> 81 __start___dbe_table = .;
>> 82 KEEP(*(__dbe_table))
>> 83 __stop___dbe_table = .;
53 } 84 }
54 85
55 . = ALIGN(16); !! 86 _sdata = .; /* Start of data section */
56 RO_DATA(4096) 87 RO_DATA(4096)
57 88
58 /* !! 89 /* writeable */
59 * sdata2 section can go anywhere, but !! 90 .data : { /* Data */
60 * and SDA2_BASE must point to the mid !! 91 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
61 */ !! 92
62 .sdata2 : AT(ADDR(.sdata2) - LOAD_OFFS !! 93 INIT_TASK_DATA(THREAD_SIZE)
63 _ssrw = .; !! 94 NOSAVE_DATA
64 . = ALIGN(PAGE_SIZE); /* page !! 95 PAGE_ALIGNED_DATA(PAGE_SIZE)
65 *(.sdata2) !! 96 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
66 . = ALIGN(8); !! 97 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
67 _essrw = .; !! 98 DATA_DATA
68 _ssrw_size = _essrw - _ssrw; !! 99 CONSTRUCTORS
69 _KERNEL_SDA2_BASE_ = _ssrw + (_ssrw_si !! 100 }
70 } !! 101 BUG_TABLE
71 !! 102 _gp = . + 0x8000;
72 _sdata = . ; !! 103 .lit8 : {
73 RW_DATA(32, PAGE_SIZE, THREAD_SIZE) !! 104 *(.lit8)
74 _edata = . ; !! 105 }
75 !! 106 .lit4 : {
76 /* Under the microblaze ABI, .sdata an !! 107 *(.lit4)
77 . = ALIGN(8); !! 108 }
78 .sdata : AT(ADDR(.sdata) - LOAD_OFFSET !! 109 /* We want the small data sections together, so single-instruction offsets
79 _ssro = .; !! 110 can access them all, and initialized data all before uninitialized, so
>> 111 we can shorten the on-disk segment size. */
>> 112 .sdata : {
80 *(.sdata) 113 *(.sdata)
81 } 114 }
>> 115 _edata = .; /* End of data section */
82 116
83 .sbss : AT(ADDR(.sbss) - LOAD_OFFSET) !! 117 /* will be freed after init */
84 _ssbss = .; !! 118 . = ALIGN(PAGE_SIZE); /* Init code and data */
85 *(.sbss) <<
86 _esbss = .; <<
87 _essro = .; <<
88 _ssro_size = _essro - _ssro ; <<
89 _KERNEL_SDA_BASE_ = _ssro + (_ <<
90 } <<
91 <<
92 PERCPU_SECTION(L1_CACHE_BYTES) <<
93 <<
94 . = ALIGN(PAGE_SIZE); <<
95 __init_begin = .; 119 __init_begin = .;
96 <<
97 INIT_TEXT_SECTION(PAGE_SIZE) 120 INIT_TEXT_SECTION(PAGE_SIZE)
98 !! 121 INIT_DATA_SECTION(16)
99 .init.data : AT(ADDR(.init.data) - LOA <<
100 INIT_DATA <<
101 } <<
102 122
103 . = ALIGN(4); 123 . = ALIGN(4);
104 .init.ivt : AT(ADDR(.init.ivt) - LOAD_ !! 124 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
105 __ivt_start = .; !! 125 __mips_machines_start = .;
106 *(.init.ivt) !! 126 KEEP(*(.mips.machines.init))
107 __ivt_end = .; !! 127 __mips_machines_end = .;
108 } 128 }
109 129
110 .init.setup : AT(ADDR(.init.setup) - L !! 130 /* .exit.text is discarded at runtime, not link time, to deal with
111 INIT_SETUP(0) !! 131 * references from .rodata
>> 132 */
>> 133 .exit.text : {
>> 134 EXIT_TEXT
>> 135 }
>> 136 .exit.data : {
>> 137 EXIT_DATA
112 } 138 }
>> 139 #ifdef CONFIG_SMP
>> 140 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
>> 141 #endif
113 142
114 .initcall.init : AT(ADDR(.initcall.ini !! 143 .rel.dyn : ALIGN(8) {
115 INIT_CALLS !! 144 *(.rel)
>> 145 *(.rel*)
116 } 146 }
117 147
118 .con_initcall.init : AT(ADDR(.con_init !! 148 #ifdef CONFIG_MIPS_ELF_APPENDED_DTB
119 CON_INITCALL !! 149 STRUCT_ALIGN();
>> 150 .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
>> 151 *(.appended_dtb)
>> 152 KEEP(*(.appended_dtb))
120 } 153 }
>> 154 #endif
121 155
122 __init_end_before_initramfs = .; !! 156 #ifdef CONFIG_RELOCATABLE
>> 157 . = ALIGN(4);
123 158
124 .init.ramfs : AT(ADDR(.init.ramfs) - L !! 159 .data.reloc : {
125 INIT_RAM_FS !! 160 _relocation_start = .;
>> 161 /*
>> 162 * Space for relocation table
>> 163 * This needs to be filled so that the
>> 164 * relocs tool can overwrite the content.
>> 165 * An invalid value is left at the start of the
>> 166 * section to abort relocation if the table
>> 167 * has not been filled in.
>> 168 */
>> 169 LONG(0xFFFFFFFF);
>> 170 FILL(0);
>> 171 . += CONFIG_RELOCATION_TABLE_SIZE - 4;
>> 172 _relocation_end = .;
126 } 173 }
>> 174 #endif
127 175
>> 176 #ifdef CONFIG_MIPS_RAW_APPENDED_DTB
>> 177 .fill : {
>> 178 FILL(0);
>> 179 BYTE(0);
>> 180 STRUCT_ALIGN();
>> 181 }
>> 182 __appended_dtb = .;
>> 183 /* leave space for appended DTB */
>> 184 . += 0x100000;
>> 185 #endif
>> 186 /*
>> 187 * Align to 64K in attempt to eliminate holes before the
>> 188 * .bss..swapper_pg_dir section at the start of .bss. This
>> 189 * also satisfies PAGE_SIZE alignment as the largest page size
>> 190 * allowed is 64K.
>> 191 */
>> 192 . = ALIGN(0x10000);
128 __init_end = .; 193 __init_end = .;
>> 194 /* freed after init ends here */
129 195
130 .bss ALIGN (PAGE_SIZE) : AT(ADDR(.bss) !! 196 /*
131 /* page aligned when MMU used !! 197 * Force .bss to 64K alignment so that .bss..swapper_pg_dir
132 __bss_start = . ; !! 198 * gets that alignment. .sbss should be empty, so there will be
133 *(.bss*) !! 199 * no holes after __init_end. */
134 *(COMMON) !! 200 BSS_SECTION(0, 0x10000, 8)
135 . = ALIGN (4) ; !! 201
136 __bss_stop = . ; !! 202 _end = . ;
>> 203
>> 204 /* These mark the ABI of the kernel for debuggers. */
>> 205 .mdebug.abi32 : {
>> 206 KEEP(*(.mdebug.abi32))
>> 207 }
>> 208 .mdebug.abi64 : {
>> 209 KEEP(*(.mdebug.abi64))
>> 210 }
>> 211
>> 212 /* This is the MIPS specific mdebug section. */
>> 213 .mdebug : {
>> 214 *(.mdebug)
137 } 215 }
138 . = ALIGN(PAGE_SIZE); <<
139 _end = .; <<
140 216
>> 217 STABS_DEBUG
>> 218 DWARF_DEBUG
>> 219 ELF_DETAILS
>> 220
>> 221 /* These must appear regardless of . */
>> 222 .gptab.sdata : {
>> 223 *(.gptab.data)
>> 224 *(.gptab.sdata)
>> 225 }
>> 226 .gptab.sbss : {
>> 227 *(.gptab.bss)
>> 228 *(.gptab.sbss)
>> 229 }
>> 230
>> 231 /* Sections to be discarded */
141 DISCARDS 232 DISCARDS
>> 233 /DISCARD/ : {
>> 234 /* ABI crap starts here */
>> 235 *(.MIPS.abiflags)
>> 236 *(.MIPS.options)
>> 237 *(.gnu.attributes)
>> 238 *(.options)
>> 239 *(.pdr)
>> 240 *(.reginfo)
>> 241 }
142 } 242 }
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