1 # SPDX-License-Identifier: GPL-2.0 <<
2 config MIPS 1 config MIPS
3 bool 2 bool
4 default y 3 default y
5 select ARCH_32BIT_OFF_T if !64BIT !! 4
6 select ARCH_BINFMT_ELF_STATE if MIPS_F !! 5 config MIPS64
7 select ARCH_HAS_CPU_CACHE_ALIASING !! 6 bool "64-bit kernel"
8 select ARCH_HAS_CPU_FINALIZE_INIT !! 7 help
9 select ARCH_HAS_CURRENT_STACK_POINTER !! 8 Select this option if you want to build a 64-bit kernel. You should
10 select ARCH_HAS_DEBUG_VIRTUAL if !64BI !! 9 only select this option if you have hardware that actually has a
11 select ARCH_HAS_DMA_OPS if MACH_JAZZ !! 10 32-bit processor and if your application will actually benefit from
12 select ARCH_HAS_FORTIFY_SOURCE !! 11 64-bit processing, otherwise say N. You must say Y for kernels for
13 select ARCH_HAS_KCOV !! 12 SGI IP27 (Origin 200 and 2000). If in doubt say N.
14 select ARCH_HAS_NON_OVERLAPPING_ADDRES !! 13
15 select ARCH_HAS_PTE_SPECIAL if !(32BIT !! 14 config 64BIT
16 select ARCH_HAS_STRNCPY_FROM_USER !! 15 def_bool MIPS64
17 select ARCH_HAS_STRNLEN_USER !! 16
18 select ARCH_HAS_TICK_BROADCAST if GENE !! 17 config MIPS32
19 select ARCH_HAS_UBSAN !! 18 bool
20 select ARCH_HAS_GCOV_PROFILE_ALL !! 19 depends on MIPS64 = 'n'
21 select ARCH_KEEP_MEMBLOCK !! 20 default y
22 select ARCH_USE_BUILTIN_BSWAP !! 21
23 select ARCH_USE_CMPXCHG_LOCKREF if 64B !! 22 mainmenu "Linux/MIPS Kernel Configuration"
24 select ARCH_USE_MEMTEST !! 23
25 select ARCH_USE_QUEUED_RWLOCKS !! 24 source "init/Kconfig"
26 select ARCH_USE_QUEUED_SPINLOCKS <<
27 select ARCH_SUPPORTS_HUGETLBFS if CPU_ <<
28 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_ <<
29 select ARCH_WANT_IPC_PARSE_VERSION <<
30 select ARCH_WANT_LD_ORPHAN_WARN <<
31 select BUILDTIME_TABLE_SORT <<
32 select CLONE_BACKWARDS <<
33 select CPU_NO_EFFICIENT_FFS if (TARGET <<
34 select CPU_PM if CPU_IDLE || SUSPEND <<
35 select GENERIC_ATOMIC64 if !64BIT <<
36 select GENERIC_CMOS_UPDATE <<
37 select GENERIC_CPU_AUTOPROBE <<
38 select GENERIC_GETTIMEOFDAY <<
39 select GENERIC_IOMAP <<
40 select GENERIC_IRQ_PROBE <<
41 select GENERIC_IRQ_SHOW <<
42 select GENERIC_ISA_DMA if EISA <<
43 select GENERIC_LIB_ASHLDI3 <<
44 select GENERIC_LIB_ASHRDI3 <<
45 select GENERIC_LIB_CMPDI2 <<
46 select GENERIC_LIB_LSHRDI3 <<
47 select GENERIC_LIB_UCMPDI2 <<
48 select GENERIC_SCHED_CLOCK if !CAVIUM_ <<
49 select GENERIC_SMP_IDLE_THREAD <<
50 select GENERIC_IDLE_POLL_SETUP <<
51 select GENERIC_TIME_VSYSCALL <<
52 select GUP_GET_PXX_LOW_HIGH if CPU_MIP <<
53 select HAS_IOPORT if !NO_IOPORT_MAP || <<
54 select HAVE_ARCH_COMPILER_H <<
55 select HAVE_ARCH_JUMP_LABEL <<
56 select HAVE_ARCH_KGDB if MIPS_FP_SUPPO <<
57 select HAVE_ARCH_MMAP_RND_BITS if MMU <<
58 select HAVE_ARCH_MMAP_RND_COMPAT_BITS <<
59 select HAVE_ARCH_SECCOMP_FILTER <<
60 select HAVE_ARCH_TRACEHOOK <<
61 select HAVE_ARCH_TRANSPARENT_HUGEPAGE <<
62 select HAVE_ASM_MODVERSIONS <<
63 select HAVE_CONTEXT_TRACKING_USER <<
64 select HAVE_TIF_NOHZ <<
65 select HAVE_C_RECORDMCOUNT <<
66 select HAVE_DEBUG_KMEMLEAK <<
67 select HAVE_DEBUG_STACKOVERFLOW <<
68 select HAVE_DMA_CONTIGUOUS <<
69 select HAVE_DYNAMIC_FTRACE <<
70 select HAVE_EBPF_JIT if !CPU_MICROMIPS <<
71 select HAVE_EXIT_THREAD <<
72 select HAVE_GUP_FAST <<
73 select HAVE_FTRACE_MCOUNT_RECORD <<
74 select HAVE_FUNCTION_GRAPH_TRACER <<
75 select HAVE_FUNCTION_TRACER <<
76 select HAVE_GCC_PLUGINS <<
77 select HAVE_GENERIC_VDSO <<
78 select HAVE_IOREMAP_PROT <<
79 select HAVE_IRQ_EXIT_ON_IRQ_STACK <<
80 select HAVE_IRQ_TIME_ACCOUNTING <<
81 select HAVE_KPROBES <<
82 select HAVE_KRETPROBES <<
83 select HAVE_LD_DEAD_CODE_DATA_ELIMINAT <<
84 select HAVE_MOD_ARCH_SPECIFIC <<
85 select HAVE_NMI <<
86 select HAVE_PAGE_SIZE_4KB if !CPU_LOON <<
87 select HAVE_PAGE_SIZE_16KB if !CPU_R30 <<
88 select HAVE_PAGE_SIZE_64KB if !CPU_R30 <<
89 select HAVE_PERF_EVENTS <<
90 select HAVE_PERF_REGS <<
91 select HAVE_PERF_USER_STACK_DUMP <<
92 select HAVE_REGS_AND_STACK_ACCESS_API <<
93 select HAVE_RSEQ <<
94 select HAVE_SPARSE_SYSCALL_NR <<
95 select HAVE_STACKPROTECTOR <<
96 select HAVE_SYSCALL_TRACEPOINTS <<
97 select HAVE_VIRT_CPU_ACCOUNTING_GEN if <<
98 select IRQ_FORCED_THREADING <<
99 select ISA if EISA <<
100 select LOCK_MM_AND_FIND_VMA <<
101 select MODULES_USE_ELF_REL if MODULES <<
102 select MODULES_USE_ELF_RELA if MODULES <<
103 select PERF_USE_VMALLOC <<
104 select PCI_MSI_ARCH_FALLBACKS if PCI_M <<
105 select RTC_LIB <<
106 select SYSCTL_EXCEPTION_TRACE <<
107 select TRACE_IRQFLAGS_SUPPORT <<
108 select ARCH_HAS_ELFCORE_COMPAT <<
109 select HAVE_ARCH_KCSAN if 64BIT <<
110 <<
111 config MIPS_FIXUP_BIGPHYS_ADDR <<
112 bool <<
113 <<
114 config MIPS_GENERIC <<
115 bool <<
116 <<
117 config MACH_GENERIC_CORE <<
118 bool <<
119 <<
120 config MACH_INGENIC <<
121 bool <<
122 select SYS_SUPPORTS_32BIT_KERNEL <<
123 select SYS_SUPPORTS_LITTLE_ENDIAN <<
124 select SYS_SUPPORTS_ZBOOT <<
125 select DMA_NONCOHERENT <<
126 select IRQ_MIPS_CPU <<
127 select PINCTRL <<
128 select GPIOLIB <<
129 select COMMON_CLK <<
130 select GENERIC_IRQ_CHIP <<
131 select BUILTIN_DTB if MIPS_NO_APPENDED <<
132 select USE_OF <<
133 select CPU_SUPPORTS_CPUFREQ <<
134 select MIPS_EXTERNAL_TIMER <<
135 25
136 menu "Machine selection" 26 menu "Machine selection"
137 27
138 choice !! 28 config ACER_PICA_61
139 prompt "System type" !! 29 bool "Support for Acer PICA 1 chipset (EXPERIMENTAL)"
140 default MIPS_GENERIC_KERNEL !! 30 depends on EXPERIMENTAL
>> 31 help
>> 32 This is a machine with a R4400 133/150 MHz CPU. To compile a Linux
>> 33 kernel that runs on these, say Y here. For details about Linux on
>> 34 the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
>> 35 <http://oss.sgi.com/mips/>.
>> 36
>> 37 config BAGET_MIPS
>> 38 bool "Support for BAGET MIPS series (EXPERIMENTAL)"
>> 39 depends on MIPS32 && EXPERIMENTAL
>> 40 help
>> 41 This enables support for the Baget, a Russian embedded system. For
>> 42 more details about the Baget see the Linux/MIPS FAQ on
>> 43 <http://oss.sgi.com/mips/>.
141 44
142 config MIPS_GENERIC_KERNEL !! 45 config CASIO_E55
143 bool "Generic board-agnostic MIPS kern !! 46 bool "Support for CASIO CASSIOPEIA E-10/15/55/65"
144 select MIPS_GENERIC <<
145 select BOOT_RAW <<
146 select BUILTIN_DTB <<
147 select CEVT_R4K <<
148 select CLKSRC_MIPS_GIC <<
149 select COMMON_CLK <<
150 select CPU_MIPSR2_IRQ_EI <<
151 select CPU_MIPSR2_IRQ_VI <<
152 select CSRC_R4K <<
153 select DMA_NONCOHERENT <<
154 select HAVE_PCI <<
155 select IRQ_MIPS_CPU <<
156 select MACH_GENERIC_CORE <<
157 select MIPS_AUTO_PFN_OFFSET <<
158 select MIPS_CPU_SCACHE <<
159 select MIPS_GIC <<
160 select MIPS_L1_CACHE_SHIFT_7 <<
161 select NO_EXCEPT_FILL <<
162 select PCI_DRIVERS_GENERIC <<
163 select SMP_UP if SMP <<
164 select SWAP_IO_SPACE <<
165 select SYS_HAS_CPU_MIPS32_R1 <<
166 select SYS_HAS_CPU_MIPS32_R2 <<
167 select SYS_HAS_CPU_MIPS32_R5 <<
168 select SYS_HAS_CPU_MIPS32_R6 <<
169 select SYS_HAS_CPU_MIPS64_R1 <<
170 select SYS_HAS_CPU_MIPS64_R2 <<
171 select SYS_HAS_CPU_MIPS64_R5 <<
172 select SYS_HAS_CPU_MIPS64_R6 <<
173 select SYS_SUPPORTS_32BIT_KERNEL <<
174 select SYS_SUPPORTS_64BIT_KERNEL <<
175 select SYS_SUPPORTS_BIG_ENDIAN <<
176 select SYS_SUPPORTS_HIGHMEM <<
177 select SYS_SUPPORTS_LITTLE_ENDIAN <<
178 select SYS_SUPPORTS_MICROMIPS <<
179 select SYS_SUPPORTS_MIPS16 <<
180 select SYS_SUPPORTS_MIPS_CPS <<
181 select SYS_SUPPORTS_MULTITHREADING <<
182 select SYS_SUPPORTS_RELOCATABLE <<
183 select SYS_SUPPORTS_SMARTMIPS <<
184 select SYS_SUPPORTS_ZBOOT <<
185 select UHI_BOOT <<
186 select USB_EHCI_BIG_ENDIAN_DESC if CPU <<
187 select USB_EHCI_BIG_ENDIAN_MMIO if CPU <<
188 select USB_OHCI_BIG_ENDIAN_DESC if CPU <<
189 select USB_OHCI_BIG_ENDIAN_MMIO if CPU <<
190 select USB_UHCI_BIG_ENDIAN_DESC if CPU <<
191 select USB_UHCI_BIG_ENDIAN_MMIO if CPU <<
192 select USE_OF <<
193 help <<
194 Select this to build a kernel which <<
195 generally using a flattened device t <<
196 using the boot protocol defined in t <<
197 Interface) specification. <<
198 <<
199 config MIPS_ALCHEMY <<
200 bool "Alchemy processor based machines <<
201 select PHYS_ADDR_T_64BIT <<
202 select CEVT_R4K <<
203 select CSRC_R4K <<
204 select IRQ_MIPS_CPU <<
205 select DMA_NONCOHERENT # Au10 <<
206 select MIPS_FIXUP_BIGPHYS_ADDR if PCI <<
207 select SYS_HAS_CPU_MIPS32_R1 <<
208 select SYS_SUPPORTS_32BIT_KERNEL <<
209 select SYS_SUPPORTS_APM_EMULATION <<
210 select GPIOLIB <<
211 select SYS_SUPPORTS_ZBOOT <<
212 select COMMON_CLK <<
213 <<
214 config ATH25 <<
215 bool "Atheros AR231x/AR531x SoC suppor <<
216 select CEVT_R4K <<
217 select CSRC_R4K <<
218 select DMA_NONCOHERENT <<
219 select IRQ_MIPS_CPU <<
220 select IRQ_DOMAIN <<
221 select SYS_HAS_CPU_MIPS32_R1 <<
222 select SYS_SUPPORTS_BIG_ENDIAN <<
223 select SYS_SUPPORTS_32BIT_KERNEL <<
224 select SYS_HAS_EARLY_PRINTK <<
225 help <<
226 Support for Atheros AR231x and Ather <<
227 <<
228 config ATH79 <<
229 bool "Atheros AR71XX/AR724X/AR913X bas <<
230 select ARCH_HAS_RESET_CONTROLLER <<
231 select BOOT_RAW <<
232 select CEVT_R4K <<
233 select CSRC_R4K <<
234 select DMA_NONCOHERENT <<
235 select GPIOLIB <<
236 select PINCTRL <<
237 select COMMON_CLK <<
238 select IRQ_MIPS_CPU <<
239 select SYS_HAS_CPU_MIPS32_R2 <<
240 select SYS_HAS_EARLY_PRINTK <<
241 select SYS_SUPPORTS_32BIT_KERNEL <<
242 select SYS_SUPPORTS_BIG_ENDIAN <<
243 select SYS_SUPPORTS_MIPS16 <<
244 select SYS_SUPPORTS_ZBOOT_UART_PROM <<
245 select USE_OF <<
246 select USB_EHCI_ROOT_HUB_TT if USB_EHC <<
247 help <<
248 Support for the Atheros AR71XX/AR724 <<
249 <<
250 config BMIPS_GENERIC <<
251 bool "Broadcom Generic BMIPS kernel" <<
252 select ARCH_HAS_RESET_CONTROLLER <<
253 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL <<
254 select BOOT_RAW <<
255 select NO_EXCEPT_FILL <<
256 select USE_OF <<
257 select CEVT_R4K <<
258 select CSRC_R4K <<
259 select SYNC_R4K <<
260 select COMMON_CLK <<
261 select BCM6345_L1_IRQ <<
262 select BCM7038_L1_IRQ <<
263 select BCM7120_L2_IRQ <<
264 select BRCMSTB_L2_IRQ <<
265 select IRQ_MIPS_CPU <<
266 select DMA_NONCOHERENT <<
267 select SYS_SUPPORTS_32BIT_KERNEL <<
268 select SYS_SUPPORTS_LITTLE_ENDIAN <<
269 select SYS_SUPPORTS_BIG_ENDIAN <<
270 select SYS_SUPPORTS_HIGHMEM <<
271 select SYS_HAS_CPU_BMIPS32_3300 <<
272 select SYS_HAS_CPU_BMIPS4350 <<
273 select SYS_HAS_CPU_BMIPS4380 <<
274 select SYS_HAS_CPU_BMIPS5000 <<
275 select SWAP_IO_SPACE <<
276 select USB_EHCI_BIG_ENDIAN_DESC if CPU <<
277 select USB_EHCI_BIG_ENDIAN_MMIO if CPU <<
278 select USB_OHCI_BIG_ENDIAN_DESC if CPU <<
279 select USB_OHCI_BIG_ENDIAN_MMIO if CPU <<
280 select HARDIRQS_SW_RESEND <<
281 select HAVE_PCI <<
282 select PCI_DRIVERS_GENERIC <<
283 select FW_CFE <<
284 help <<
285 Build a generic DT-based kernel imag <<
286 BCM33xx cable modem chips, BCM63xx D <<
287 box chips. Note that CONFIG_CPU_BIG <<
288 must be set appropriately for your b <<
289 <<
290 config BCM47XX <<
291 bool "Broadcom BCM47XX based boards" <<
292 select BOOT_RAW <<
293 select CEVT_R4K <<
294 select CSRC_R4K <<
295 select DMA_NONCOHERENT <<
296 select HAVE_PCI <<
297 select IRQ_MIPS_CPU <<
298 select SYS_HAS_CPU_MIPS32_R1 <<
299 select NO_EXCEPT_FILL <<
300 select SYS_SUPPORTS_32BIT_KERNEL <<
301 select SYS_SUPPORTS_LITTLE_ENDIAN <<
302 select SYS_SUPPORTS_MIPS16 <<
303 select SYS_SUPPORTS_ZBOOT <<
304 select SYS_HAS_EARLY_PRINTK <<
305 select USE_GENERIC_EARLY_PRINTK_8250 <<
306 select GPIOLIB <<
307 select LEDS_GPIO_REGISTER <<
308 select BCM47XX_NVRAM <<
309 select BCM47XX_SPROM <<
310 select BCM47XX_SSB if !BCM47XX_BCMA <<
311 help <<
312 Support for BCM47XX based boards <<
313 <<
314 config BCM63XX <<
315 bool "Broadcom BCM63XX based boards" <<
316 select BOOT_RAW <<
317 select CEVT_R4K <<
318 select CSRC_R4K <<
319 select SYNC_R4K <<
320 select DMA_NONCOHERENT <<
321 select IRQ_MIPS_CPU <<
322 select SYS_SUPPORTS_32BIT_KERNEL <<
323 select SYS_SUPPORTS_BIG_ENDIAN <<
324 select SYS_HAS_EARLY_PRINTK <<
325 select SYS_HAS_CPU_BMIPS32_3300 <<
326 select SYS_HAS_CPU_BMIPS4350 <<
327 select SYS_HAS_CPU_BMIPS4380 <<
328 select SWAP_IO_SPACE <<
329 select GPIOLIB <<
330 select MIPS_L1_CACHE_SHIFT_4 <<
331 select HAVE_LEGACY_CLK <<
332 help <<
333 Support for BCM63XX based boards <<
334 47
335 config MIPS_COBALT 48 config MIPS_COBALT
336 bool "Cobalt Server" !! 49 bool "Support for Cobalt Server (EXPERIMENTAL)"
337 select CEVT_R4K !! 50 depends on EXPERIMENTAL
338 select CSRC_R4K !! 51
339 select CEVT_GT641XX !! 52 config DECSTATION
340 select DMA_NONCOHERENT !! 53 bool "Support for DECstations"
341 select FORCE_PCI !! 54 depends on MIPS32 || EXPERIMENTAL
342 select I8253 !! 55 ---help---
343 select I8259 <<
344 select IRQ_MIPS_CPU <<
345 select IRQ_GT641XX <<
346 select PCI_GT64XXX_PCI0 <<
347 select SYS_HAS_CPU_NEVADA <<
348 select SYS_HAS_EARLY_PRINTK <<
349 select SYS_SUPPORTS_32BIT_KERNEL <<
350 select SYS_SUPPORTS_64BIT_KERNEL <<
351 select SYS_SUPPORTS_LITTLE_ENDIAN <<
352 select USE_GENERIC_EARLY_PRINTK_8250 <<
353 <<
354 config MACH_DECSTATION <<
355 bool "DECstations" <<
356 select BOOT_ELF32 <<
357 select CEVT_DS1287 <<
358 select CEVT_R4K if CPU_R4X00 <<
359 select CSRC_IOASIC <<
360 select CSRC_R4K if CPU_R4X00 <<
361 select CPU_DADDI_WORKAROUNDS if 64BIT <<
362 select CPU_R4000_WORKAROUNDS if 64BIT <<
363 select CPU_R4400_WORKAROUNDS if 64BIT <<
364 select DMA_NONCOHERENT <<
365 select NO_IOPORT_MAP <<
366 select IRQ_MIPS_CPU <<
367 select SYS_HAS_CPU_R3000 <<
368 select SYS_HAS_CPU_R4X00 <<
369 select SYS_SUPPORTS_32BIT_KERNEL <<
370 select SYS_SUPPORTS_64BIT_KERNEL <<
371 select SYS_SUPPORTS_LITTLE_ENDIAN <<
372 select SYS_SUPPORTS_128HZ <<
373 select SYS_SUPPORTS_256HZ <<
374 select SYS_SUPPORTS_1024HZ <<
375 select MIPS_L1_CACHE_SHIFT_4 <<
376 help <<
377 This enables support for DEC's MIPS 56 This enables support for DEC's MIPS based workstations. For details
378 see the Linux/MIPS FAQ on <http://ww !! 57 see the Linux/MIPS FAQ on <http://oss.sgi.com/mips/> and the
379 DECstation porting pages on <http:// 58 DECstation porting pages on <http://decstation.unix-ag.org/>.
380 59
381 If you have one of the following DEC 60 If you have one of the following DECstation Models you definitely
382 want to choose R4xx0 for the CPU Typ 61 want to choose R4xx0 for the CPU Type:
383 62
384 DECstation 5000/50 !! 63 DECstation 5000/50
385 DECstation 5000/150 !! 64 DECstation 5000/150
386 DECstation 5000/260 !! 65 DECstation 5000/260
387 DECsystem 5900/260 !! 66 DECsystem 5900/260
388 67
389 otherwise choose R3000. 68 otherwise choose R3000.
390 69
391 config MACH_JAZZ !! 70 config MIPS_EV64120
392 bool "Jazz family of machines" !! 71 bool "Support for Galileo EV64120 Evaluation board (EXPERIMENTAL)"
393 select ARC_MEMORY !! 72 depends on EXPERIMENTAL
394 select ARC_PROMLIB !! 73 help
395 select ARCH_MIGHT_HAVE_PC_PARPORT !! 74 This is an evaluation board based on the Galileo GT-64120
396 select ARCH_MIGHT_HAVE_PC_SERIO !! 75 single-chip system controller that contains a MIPS R5000 compatible
397 select FW_ARC !! 76 core running at 75/100MHz. Their website is located at
398 select FW_ARC32 !! 77 <http://www.galileot.com/>. Say Y here if you wish to build a
399 select ARCH_MAY_HAVE_PC_FDC !! 78 kernel for this platform.
400 select CEVT_R4K !! 79
401 select CSRC_R4K !! 80 config EVB_PCI1
402 select DEFAULT_SGI_PARTITION if CPU_BI !! 81 bool "Enable Second PCI (PCI1)"
403 select GENERIC_ISA_DMA !! 82 depends on MIPS_EV64120
404 select HAVE_PCSPKR_PLATFORM !! 83
405 select IRQ_MIPS_CPU !! 84 if MOMENCO_OCELOT_G || MOMENCO_OCELOT
406 select I8253 !! 85
407 select I8259 !! 86 config SYSCLK_100
408 select ISA !! 87 bool
409 select SYS_HAS_CPU_R4X00 !! 88 default y
410 select SYS_SUPPORTS_32BIT_KERNEL !! 89
411 select SYS_SUPPORTS_64BIT_KERNEL !! 90 endif
412 select SYS_SUPPORTS_100HZ !! 91 if MIPS_EV64120
413 select SYS_SUPPORTS_LITTLE_ENDIAN !! 92
414 help !! 93 choice
415 This a family of machines based on t !! 94 prompt "Galileo Chip Clock"
416 used by several vendors to build RIS !! 95 default SYSCLK_83
417 Members include the Acer PICA, MIPS !! 96
418 Olivetti M700-10 workstations. !! 97 config SYSCLK_75
419 !! 98 bool "75"
420 config MACH_INGENIC_SOC !! 99
421 bool "Ingenic SoC based machines" !! 100 config SYSCLK_83
422 select MIPS_GENERIC !! 101 bool "83.3"
423 select MACH_INGENIC !! 102
424 select MACH_GENERIC_CORE !! 103 config SYSCLK_100
425 select SYS_SUPPORTS_ZBOOT_UART16550 !! 104 bool "100" if MIPS_EV64120
426 select CPU_SUPPORTS_CPUFREQ !! 105
427 select MIPS_EXTERNAL_TIMER !! 106 endchoice
428 !! 107
429 config LANTIQ !! 108 endif
430 bool "Lantiq based platforms" !! 109
431 select DMA_NONCOHERENT !! 110 config MIPS_EV96100
432 select IRQ_MIPS_CPU !! 111 bool "Support for Galileo EV96100 Evaluation board (EXPERIMENTAL)"
433 select CEVT_R4K !! 112 depends on EXPERIMENTAL
434 select CSRC_R4K !! 113 help
435 select NO_EXCEPT_FILL !! 114 This is an evaluation board based on the Galielo GT-96100 LAN/WAN
436 select SYS_HAS_CPU_MIPS32_R1 !! 115 communications controllers containing a MIPS R5000 compatible core
437 select SYS_HAS_CPU_MIPS32_R2 !! 116 running at 83MHz. Their website is <http://www.galileot.com/>. Say Y
438 select SYS_SUPPORTS_BIG_ENDIAN !! 117 here if you wish to build a kernel for this platform.
439 select SYS_SUPPORTS_32BIT_KERNEL !! 118
440 select SYS_SUPPORTS_MIPS16 !! 119 config MIPS_IVR
441 select SYS_SUPPORTS_MULTITHREADING !! 120 bool "Support for Globespan IVR board"
442 select SYS_SUPPORTS_VPE_LOADER !! 121 help
443 select SYS_HAS_EARLY_PRINTK !! 122 This is an evaluation board built by Globespan to showcase thir
444 select GPIOLIB !! 123 iVR (Internet Video Recorder) design. It utilizes a QED RM5231
445 select SWAP_IO_SPACE !! 124 R5000 MIPS core. More information can be found out their website
446 select BOOT_RAW !! 125 located at <http://www.globespan.net/products/product4.html>P. Say Y
447 select HAVE_LEGACY_CLK !! 126 here if you wish to build a kernel for this platform.
448 select USE_OF !! 127
449 select PINCTRL !! 128 config LASAT
450 select PINCTRL_LANTIQ !! 129 bool "Support for LASAT Networks platforms"
451 select ARCH_HAS_RESET_CONTROLLER !! 130
452 select RESET_CONTROLLER !! 131 config PICVUE
453 !! 132 tristate "PICVUE LCD display driver"
454 config MACH_LOONGSON32 !! 133 depends on LASAT
455 bool "Loongson 32-bit family of machin !! 134
456 select SYS_SUPPORTS_ZBOOT !! 135 config PICVUE_PROC
457 help !! 136 tristate "PICVUE LCD display driver /proc interface"
458 This enables support for the Loongso !! 137 depends on PICVUE
459 !! 138
460 Loongson-1 is a family of 32-bit MIP !! 139 config DS1603
461 the Institute of Computing Technolog !! 140 bool "DS1603 RTC driver"
462 Sciences (CAS). !! 141 depends on LASAT
463 !! 142
464 config MACH_LOONGSON2EF !! 143 config LASAT_SYSCTL
465 bool "Loongson-2E/F family of machines !! 144 bool "LASAT sysctl interface"
466 select SYS_SUPPORTS_ZBOOT !! 145 depends on LASAT
467 help !! 146
468 This enables the support of early Lo !! 147 config HP_LASERJET
469 !! 148 bool "Support for Hewlett Packard LaserJet board"
470 config MACH_LOONGSON64 !! 149
471 bool "Loongson 64-bit family of machin !! 150 config IBM_WORKPAD
472 select ARCH_DMA_DEFAULT_COHERENT !! 151 bool "Support for IBM WorkPad z50"
473 select ARCH_SPARSEMEM_ENABLE !! 152
474 select ARCH_MIGHT_HAVE_PC_PARPORT !! 153 config MIPS_ITE8172
475 select ARCH_MIGHT_HAVE_PC_SERIO !! 154 bool "Support for ITE 8172G board"
476 select GENERIC_ISA_DMA_SUPPORT_BROKEN !! 155 help
477 select BOOT_ELF32 !! 156 Ths is an evaluation board made by ITE <http://www.ite.com.tw/>
478 select BOARD_SCACHE !! 157 with ATX form factor that utilizes a MIPS R5000 to work with its
479 select CSRC_R4K !! 158 ITE8172G companion internet appliance chip. The MIPS core can be
480 select CEVT_R4K !! 159 either a NEC Vr5432 or QED RM5231. Say Y here if you wish to build
481 select SYNC_R4K !! 160 a kernel for this platform.
482 select FORCE_PCI !! 161
483 select ISA !! 162 config IT8172_REVC
484 select I8259 !! 163 bool "Support for older IT8172 (Rev C)"
485 select IRQ_MIPS_CPU !! 164 depends on MIPS_ITE8172
486 select NO_EXCEPT_FILL !! 165 help
487 select NR_CPUS_DEFAULT_64 !! 166 Say Y here to support the older, Revision C version of the Integrated
488 select USE_GENERIC_EARLY_PRINTK_8250 !! 167 Technology Express, Inc. ITE8172 SBC. Vendor page at
489 select PCI_DRIVERS_GENERIC !! 168 <http://www.ite.com.tw/ia/brief_it8172bsp.htm>; picture of the
490 select SYS_HAS_CPU_LOONGSON64 !! 169 board at <http://www.mvista.com/allies/semiconductor/ite.html>.
491 select SYS_HAS_EARLY_PRINTK !! 170
492 select SYS_SUPPORTS_SMP !! 171 config MIPS_ATLAS
493 select SYS_SUPPORTS_HOTPLUG_CPU !! 172 bool "Support for MIPS Atlas board"
494 select SYS_SUPPORTS_NUMA !! 173 help
495 select SYS_SUPPORTS_64BIT_KERNEL !! 174 This enables support for the QED R5231-based MIPS Atlas evaluation
496 select SYS_SUPPORTS_HIGHMEM !! 175 board.
497 select SYS_SUPPORTS_LITTLE_ENDIAN !! 176
498 select SYS_SUPPORTS_ZBOOT !! 177 config MIPS_MAGNUM_4000
499 select SYS_SUPPORTS_RELOCATABLE !! 178 bool "Support for MIPS Magnum 4000"
500 select ZONE_DMA32 !! 179 help
501 select COMMON_CLK !! 180 This is a machine with a R4000 100 MHz CPU. To compile a Linux
502 select USE_OF !! 181 kernel that runs on these, say Y here. For details about Linux on
503 select BUILTIN_DTB !! 182 the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
504 select PCI_HOST_GENERIC !! 183 <http://oss.sgi.com/mips/>.
505 help <<
506 This enables the support of Loongson <<
507 <<
508 Loongson-2 and Loongson-3 are 64-bit <<
509 GS264/GS464/GS464E/GS464V microarchi <<
510 and Loongson-2F which will be remove <<
511 of Computing Technology (ICT), Chine <<
512 184
513 config MIPS_MALTA 185 config MIPS_MALTA
514 bool "MIPS Malta board" !! 186 bool "Support for MIPS Malta board"
515 select ARCH_MAY_HAVE_PC_FDC <<
516 select ARCH_MIGHT_HAVE_PC_PARPORT <<
517 select ARCH_MIGHT_HAVE_PC_SERIO <<
518 select BOOT_ELF32 <<
519 select BOOT_RAW <<
520 select BUILTIN_DTB <<
521 select CEVT_R4K <<
522 select CLKSRC_MIPS_GIC <<
523 select COMMON_CLK <<
524 select CSRC_R4K <<
525 select DMA_NONCOHERENT <<
526 select GENERIC_ISA_DMA <<
527 select HAVE_PCSPKR_PLATFORM <<
528 select HAVE_PCI <<
529 select I8253 <<
530 select I8259 <<
531 select IRQ_MIPS_CPU <<
532 select MIPS_BONITO64 <<
533 select MIPS_CPU_SCACHE <<
534 select MIPS_GIC <<
535 select MIPS_L1_CACHE_SHIFT_6 <<
536 select MIPS_MSC <<
537 select PCI_GT64XXX_PCI0 <<
538 select SMP_UP if SMP <<
539 select SWAP_IO_SPACE <<
540 select SYS_HAS_CPU_MIPS32_R1 <<
541 select SYS_HAS_CPU_MIPS32_R2 <<
542 select SYS_HAS_CPU_MIPS32_R3_5 <<
543 select SYS_HAS_CPU_MIPS32_R5 <<
544 select SYS_HAS_CPU_MIPS32_R6 <<
545 select SYS_HAS_CPU_MIPS64_R1 <<
546 select SYS_HAS_CPU_MIPS64_R2 <<
547 select SYS_HAS_CPU_MIPS64_R6 <<
548 select SYS_HAS_CPU_NEVADA <<
549 select SYS_HAS_CPU_RM7000 <<
550 select SYS_SUPPORTS_32BIT_KERNEL <<
551 select SYS_SUPPORTS_64BIT_KERNEL <<
552 select SYS_SUPPORTS_BIG_ENDIAN <<
553 select SYS_SUPPORTS_HIGHMEM <<
554 select SYS_SUPPORTS_LITTLE_ENDIAN <<
555 select SYS_SUPPORTS_MICROMIPS <<
556 select SYS_SUPPORTS_MIPS16 <<
557 select SYS_SUPPORTS_MIPS_CPS <<
558 select SYS_SUPPORTS_MULTITHREADING <<
559 select SYS_SUPPORTS_RELOCATABLE <<
560 select SYS_SUPPORTS_SMARTMIPS <<
561 select SYS_SUPPORTS_VPE_LOADER <<
562 select SYS_SUPPORTS_ZBOOT <<
563 select USE_OF <<
564 select WAR_ICACHE_REFILLS <<
565 select ZONE_DMA32 if 64BIT <<
566 help 187 help
567 This enables support for the MIPS Te !! 188 This enables support for the VR5000-based MIPS Malta evaluation
568 board. 189 board.
569 190
570 config MACH_PIC32 !! 191 config MIPS_SEAD
571 bool "Microchip PIC32 Family" !! 192 bool "Support for MIPS SEAD board (EXPERIMENTAL)"
>> 193 depends on EXPERIMENTAL
>> 194
>> 195 config MOMENCO_OCELOT
>> 196 bool "Support for Momentum Ocelot board"
572 help 197 help
573 This enables support for the Microch !! 198 The Ocelot is a MIPS-based Single Board Computer (SBC) made by
>> 199 Momentum Computer <http://www.momenco.com/>.
574 200
575 Microchip PIC32 is a family of gener !! 201 config MOMENCO_OCELOT_G
576 microcontrollers. !! 202 bool "Support for Momentum Ocelot-G board"
>> 203 help
>> 204 The Ocelot is a MIPS-based Single Board Computer (SBC) made by
>> 205 Momentum Computer <http://www.momenco.com/>.
577 206
578 config EYEQ !! 207 config MOMENCO_OCELOT_C
579 bool "Mobileye EyeQ SoC" !! 208 bool "Support for Momentum Ocelot-C board"
580 select MACH_GENERIC_CORE !! 209 help
581 select ARM_AMBA !! 210 The Ocelot is a MIPS-based Single Board Computer (SBC) made by
582 select PHYSICAL_START_BOOL !! 211 Momentum Computer <http://www.momenco.com/>.
583 select ARCH_SPARSEMEM_DEFAULT if 64BIT !! 212
584 select BOOT_RAW !! 213 config DDB5074
585 select BUILTIN_DTB !! 214 bool "Support for NEC DDB Vrc-5074 (EXPERIMENTAL)"
586 select CEVT_R4K !! 215 depends on EXPERIMENTAL
587 select CLKSRC_MIPS_GIC !! 216 help
588 select COMMON_CLK !! 217 This enables support for the VR5000-based NEC DDB Vrc-5074
589 select CPU_MIPSR2_IRQ_EI !! 218 evaluation board.
590 select CPU_MIPSR2_IRQ_VI !! 219
591 select CSRC_R4K !! 220 config DDB5476
592 select DMA_NONCOHERENT !! 221 bool "Support for NEC DDB Vrc-5476"
593 select HAVE_PCI !! 222 help
594 select IRQ_MIPS_CPU !! 223 This enables support for the R5432-based NEC DDB Vrc-5476
595 select MIPS_AUTO_PFN_OFFSET !! 224 evaluation board.
596 select MIPS_CPU_SCACHE !! 225
597 select MIPS_GIC !! 226 Features : kernel debugging, serial terminal, NFS root fs, on-board
598 select MIPS_L1_CACHE_SHIFT_7 !! 227 ether port USB, AC97, PCI, PCI VGA card & framebuffer console,
599 select PCI_DRIVERS_GENERIC !! 228 IDE controller, PS2 keyboard, PS2 mouse, etc.
600 select SMP_UP if SMP !! 229
601 select SWAP_IO_SPACE !! 230 config DDB5477
602 select SYS_HAS_CPU_MIPS64_R6 !! 231 bool "Support for NEC DDB Vrc-5477"
603 select SYS_SUPPORTS_64BIT_KERNEL !! 232 help
604 select SYS_SUPPORTS_HIGHMEM !! 233 This enables support for the R5432-based NEC DDB Vrc-5477,
605 select SYS_SUPPORTS_LITTLE_ENDIAN !! 234 or Rockhopper/SolutionGear boards with R5432/R5500 CPUs.
606 select SYS_SUPPORTS_MIPS_CPS !! 235
607 select SYS_SUPPORTS_RELOCATABLE !! 236 Features : kernel debugging, serial terminal, NFS root fs, on-board
608 select SYS_SUPPORTS_ZBOOT !! 237 ether port USB, AC97, PCI, etc.
609 select UHI_BOOT !! 238
610 select USB_EHCI_BIG_ENDIAN_DESC if CPU !! 239 config DDB5477_BUS_FREQUENCY
611 select USB_EHCI_BIG_ENDIAN_MMIO if CPU !! 240 int "bus frequency (in kHZ, 0 for auto-detect)"
612 select USB_OHCI_BIG_ENDIAN_DESC if CPU !! 241 depends on DDB5477
613 select USB_OHCI_BIG_ENDIAN_MMIO if CPU !! 242 default 0
614 select USB_UHCI_BIG_ENDIAN_DESC if CPU !! 243
615 select USB_UHCI_BIG_ENDIAN_MMIO if CPU !! 244 config NEC_OSPREY
616 select USE_OF !! 245 bool "Support for NEC Osprey board"
617 help !! 246
618 Select this to build a kernel suppor !! 247 config NEC_EAGLE
619 !! 248 bool "Support for NEC Eagle/Hawk board"
620 bool !! 249
621 !! 250 config OLIVETTI_M700
622 config MACH_NINTENDO64 !! 251 bool "Support for Olivetti M700-10"
623 bool "Nintendo 64 console" !! 252 help
624 select CEVT_R4K !! 253 This is a machine with a R4000 100 MHz CPU. To compile a Linux
625 select CSRC_R4K !! 254 kernel that runs on these, say Y here. For details about Linux on
626 select SYS_HAS_CPU_R4300 !! 255 the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
627 select SYS_SUPPORTS_BIG_ENDIAN !! 256 <http://oss.sgi.com/mips/>.
628 select SYS_SUPPORTS_ZBOOT <<
629 select SYS_SUPPORTS_32BIT_KERNEL <<
630 select SYS_SUPPORTS_64BIT_KERNEL <<
631 select DMA_NONCOHERENT <<
632 select IRQ_MIPS_CPU <<
633 <<
634 config RALINK <<
635 bool "Ralink based machines" <<
636 select CEVT_R4K <<
637 select COMMON_CLK <<
638 select CSRC_R4K <<
639 select BOOT_RAW <<
640 select DMA_NONCOHERENT <<
641 select IRQ_MIPS_CPU <<
642 select USE_OF <<
643 select SYS_HAS_CPU_MIPS32_R2 <<
644 select SYS_SUPPORTS_32BIT_KERNEL <<
645 select SYS_SUPPORTS_LITTLE_ENDIAN <<
646 select SYS_SUPPORTS_MIPS16 <<
647 select SYS_SUPPORTS_ZBOOT <<
648 select SYS_HAS_EARLY_PRINTK <<
649 select ARCH_HAS_RESET_CONTROLLER <<
650 select RESET_CONTROLLER <<
651 <<
652 config MACH_REALTEK_RTL <<
653 bool "Realtek RTL838x/RTL839x based ma <<
654 select MIPS_GENERIC <<
655 select MACH_GENERIC_CORE <<
656 select DMA_NONCOHERENT <<
657 select IRQ_MIPS_CPU <<
658 select CSRC_R4K <<
659 select CEVT_R4K <<
660 select SYS_HAS_CPU_MIPS32_R1 <<
661 select SYS_HAS_CPU_MIPS32_R2 <<
662 select SYS_SUPPORTS_BIG_ENDIAN <<
663 select SYS_SUPPORTS_32BIT_KERNEL <<
664 select SYS_SUPPORTS_MIPS16 <<
665 select SYS_SUPPORTS_MULTITHREADING <<
666 select SYS_SUPPORTS_VPE_LOADER <<
667 select BOOT_RAW <<
668 select PINCTRL <<
669 select USE_OF <<
670 select REALTEK_OTTO_TIMER <<
671 257
672 config SGI_IP22 258 config SGI_IP22
673 bool "SGI IP22 (Indy/Indigo2)" !! 259 bool "Support for SGI IP22 (Indy/Indigo2)"
674 select ARC_MEMORY <<
675 select ARC_PROMLIB <<
676 select FW_ARC <<
677 select FW_ARC32 <<
678 select ARCH_MIGHT_HAVE_PC_SERIO <<
679 select BOOT_ELF32 <<
680 select CEVT_R4K <<
681 select CSRC_R4K <<
682 select DEFAULT_SGI_PARTITION <<
683 select DMA_NONCOHERENT <<
684 select HAVE_EISA <<
685 select I8253 <<
686 select I8259 <<
687 select IP22_CPU_SCACHE <<
688 select IRQ_MIPS_CPU <<
689 select GENERIC_ISA_DMA_SUPPORT_BROKEN <<
690 select SGI_HAS_I8042 <<
691 select SGI_HAS_INDYDOG <<
692 select SGI_HAS_HAL2 <<
693 select SGI_HAS_SEEQ <<
694 select SGI_HAS_WD93 <<
695 select SGI_HAS_ZILOG <<
696 select SWAP_IO_SPACE <<
697 select SYS_HAS_CPU_R4X00 <<
698 select SYS_HAS_CPU_R5000 <<
699 select SYS_HAS_EARLY_PRINTK <<
700 select SYS_SUPPORTS_32BIT_KERNEL <<
701 select SYS_SUPPORTS_64BIT_KERNEL <<
702 select SYS_SUPPORTS_BIG_ENDIAN <<
703 select WAR_R4600_V1_INDEX_ICACHEOP <<
704 select WAR_R4600_V1_HIT_CACHEOP <<
705 select WAR_R4600_V2_HIT_CACHEOP <<
706 select MIPS_L1_CACHE_SHIFT_7 <<
707 help 260 help
708 This are the SGI Indy, Challenge S a 261 This are the SGI Indy, Challenge S and Indigo2, as well as certain
709 OEM variants like the Tandem CMN B00 262 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
710 that runs on these, say Y here. 263 that runs on these, say Y here.
711 264
712 config SGI_IP27 265 config SGI_IP27
713 bool "SGI IP27 (Origin200/2000)" !! 266 bool "Support for SGI IP27 (Origin200/2000)"
714 select ARCH_HAS_PHYS_TO_DMA !! 267 depends on MIPS64
715 select ARCH_SPARSEMEM_ENABLE <<
716 select FW_ARC <<
717 select FW_ARC64 <<
718 select ARC_CMDLINE_ONLY <<
719 select BOOT_ELF64 <<
720 select DEFAULT_SGI_PARTITION <<
721 select FORCE_PCI <<
722 select SYS_HAS_EARLY_PRINTK <<
723 select HAVE_PCI <<
724 select IRQ_MIPS_CPU <<
725 select IRQ_DOMAIN_HIERARCHY <<
726 select NR_CPUS_DEFAULT_64 <<
727 select PCI_DRIVERS_GENERIC <<
728 select PCI_XTALK_BRIDGE <<
729 select SYS_HAS_CPU_R10000 <<
730 select SYS_SUPPORTS_64BIT_KERNEL <<
731 select SYS_SUPPORTS_BIG_ENDIAN <<
732 select SYS_SUPPORTS_NUMA <<
733 select SYS_SUPPORTS_SMP <<
734 select WAR_R10000_LLSC <<
735 select MIPS_L1_CACHE_SHIFT_7 <<
736 select NUMA <<
737 help 268 help
738 This are the SGI Origin 200, Origin 269 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
739 workstations. To compile a Linux ke 270 workstations. To compile a Linux kernel that runs on these, say Y
740 here. 271 here.
741 272
742 config SGI_IP28 !! 273 #config SGI_SN0_XXL
743 bool "SGI IP28 (Indigo2 R10k)" !! 274 # bool "IP27 XXL"
744 select ARC_MEMORY !! 275 # depends on SGI_IP27
745 select ARC_PROMLIB !! 276 # This options adds support for userspace processes upto 16TB size.
746 select FW_ARC !! 277 # Normally the limit is just .5TB.
747 select FW_ARC64 !! 278
748 select ARCH_MIGHT_HAVE_PC_SERIO !! 279 config SGI_SN0_N_MODE
749 select BOOT_ELF64 !! 280 bool "IP27 N-Mode"
750 select CEVT_R4K !! 281 depends on SGI_IP27
751 select CSRC_R4K !! 282 help
752 select DEFAULT_SGI_PARTITION !! 283 The nodes of Origin 200, Origin 2000 and Onyx 2 systems can be
753 select DMA_NONCOHERENT !! 284 configured in either N-Modes which allows for more nodes or M-Mode
754 select GENERIC_ISA_DMA_SUPPORT_BROKEN !! 285 which allows for more memory. Your system is most probably
755 select IRQ_MIPS_CPU !! 286 running in M-Mode, so you should say N here.
756 select HAVE_EISA !! 287
757 select I8253 !! 288 config DISCONTIGMEM
758 select I8259 !! 289 bool "Discontiguous Memory Support"
759 select SGI_HAS_I8042 !! 290 depends on SGI_IP27
760 select SGI_HAS_INDYDOG !! 291 help
761 select SGI_HAS_HAL2 !! 292 Say Y to upport efficient handling of discontiguous physical memory,
762 select SGI_HAS_SEEQ !! 293 for architectures which are either NUMA (Non-Uniform Memory Access)
763 select SGI_HAS_WD93 !! 294 or have huge holes in the physical address space for other reasons.
764 select SGI_HAS_ZILOG !! 295 See <file:Documentation/vm/numa> for more.
765 select SWAP_IO_SPACE !! 296
766 select SYS_HAS_CPU_R10000 !! 297 config NUMA
767 select SYS_HAS_EARLY_PRINTK !! 298 bool "NUMA Support"
768 select SYS_SUPPORTS_64BIT_KERNEL !! 299 depends on SGI_IP27
769 select SYS_SUPPORTS_BIG_ENDIAN <<
770 select WAR_R10000_LLSC <<
771 select MIPS_L1_CACHE_SHIFT_7 <<
772 help <<
773 This is the SGI Indigo2 with R10000 <<
774 kernel that runs on these, say Y her <<
775 <<
776 config SGI_IP30 <<
777 bool "SGI IP30 (Octane/Octane2)" <<
778 select ARCH_HAS_PHYS_TO_DMA <<
779 select FW_ARC <<
780 select FW_ARC64 <<
781 select BOOT_ELF64 <<
782 select CEVT_R4K <<
783 select CSRC_R4K <<
784 select FORCE_PCI <<
785 select SYNC_R4K if SMP <<
786 select ZONE_DMA32 <<
787 select HAVE_PCI <<
788 select IRQ_MIPS_CPU <<
789 select IRQ_DOMAIN_HIERARCHY <<
790 select PCI_DRIVERS_GENERIC <<
791 select PCI_XTALK_BRIDGE <<
792 select SYS_HAS_EARLY_PRINTK <<
793 select SYS_HAS_CPU_R10000 <<
794 select SYS_SUPPORTS_64BIT_KERNEL <<
795 select SYS_SUPPORTS_BIG_ENDIAN <<
796 select SYS_SUPPORTS_SMP <<
797 select WAR_R10000_LLSC <<
798 select MIPS_L1_CACHE_SHIFT_7 <<
799 select ARC_MEMORY <<
800 help 300 help
801 These are the SGI Octane and Octane2 !! 301 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
802 compile a Linux kernel that runs on !! 302 Access). This option is for configuring high-end multiprocessor
>> 303 server machines. If in doubt, say N.
>> 304
>> 305 config MAPPED_KERNEL
>> 306 bool "Mapped kernel support"
>> 307 depends on SGI_IP27
>> 308 help
>> 309 Change the way a Linux kernel is loaded unto memory on a MIPS64
>> 310 machine. This is required in order to support text replication and
>> 311 NUMA. If you need to undersatand it, read the source code.
>> 312
>> 313 config REPLICATE_KTEXT
>> 314 bool "Kernel text replication support"
>> 315 depends on SGI_IP27
>> 316 help
>> 317 Say Y here to enable replicating the kernel text across multiple
>> 318 nodes in a NUMA cluster. This trades memory for speed.
>> 319
>> 320 config REPLICATE_EXHANDLERS
>> 321 bool "Exception handler replication support"
>> 322 depends on SGI_IP27
>> 323 help
>> 324 Say Y here to enable replicating the kernel exception handlers
>> 325 across multiple nodes in a NUMA cluster. This trades memory for
>> 326 speed.
803 327
804 config SGI_IP32 328 config SGI_IP32
805 bool "SGI IP32 (O2)" !! 329 bool "Support for SGI IP32 (O2) (EXPERIMENTAL)"
806 select ARC_MEMORY !! 330 depends on EXPERIMENTAL
807 select ARC_PROMLIB <<
808 select ARCH_HAS_PHYS_TO_DMA <<
809 select FW_ARC <<
810 select FW_ARC32 <<
811 select BOOT_ELF32 <<
812 select CEVT_R4K <<
813 select CSRC_R4K <<
814 select DMA_NONCOHERENT <<
815 select HAVE_PCI <<
816 select IRQ_MIPS_CPU <<
817 select R5000_CPU_SCACHE <<
818 select RM7000_CPU_SCACHE <<
819 select SYS_HAS_CPU_R5000 <<
820 select SYS_HAS_CPU_R10000 if BROKEN <<
821 select SYS_HAS_CPU_RM7000 <<
822 select SYS_HAS_CPU_NEVADA <<
823 select SYS_SUPPORTS_64BIT_KERNEL <<
824 select SYS_SUPPORTS_BIG_ENDIAN <<
825 select WAR_ICACHE_REFILLS <<
826 help 331 help
827 If you want this kernel to run on SG 332 If you want this kernel to run on SGI O2 workstation, say Y here.
828 333
829 config SIBYTE_CRHONE !! 334 config SOC_AU1X00
830 bool "Sibyte BCM91125C-CRhone" !! 335 depends on MIPS32
831 select BOOT_ELF32 !! 336 bool "Support for AMD/Alchemy Au1X00 SOCs"
832 select SIBYTE_BCM1125 <<
833 select SWAP_IO_SPACE <<
834 select SYS_HAS_CPU_SB1 <<
835 select SYS_SUPPORTS_BIG_ENDIAN <<
836 select SYS_SUPPORTS_HIGHMEM <<
837 select SYS_SUPPORTS_LITTLE_ENDIAN <<
838 <<
839 config SIBYTE_RHONE <<
840 bool "Sibyte BCM91125E-Rhone" <<
841 select BOOT_ELF32 <<
842 select SIBYTE_SB1250 <<
843 select SWAP_IO_SPACE <<
844 select SYS_HAS_CPU_SB1 <<
845 select SYS_SUPPORTS_BIG_ENDIAN <<
846 select SYS_SUPPORTS_LITTLE_ENDIAN <<
847 <<
848 config SIBYTE_SWARM <<
849 bool "Sibyte BCM91250A-SWARM" <<
850 select BOOT_ELF32 <<
851 select HAVE_PATA_PLATFORM <<
852 select SIBYTE_SB1250 <<
853 select SWAP_IO_SPACE <<
854 select SYS_HAS_CPU_SB1 <<
855 select SYS_SUPPORTS_BIG_ENDIAN <<
856 select SYS_SUPPORTS_HIGHMEM <<
857 select SYS_SUPPORTS_LITTLE_ENDIAN <<
858 select ZONE_DMA32 if 64BIT <<
859 select SWIOTLB if ARCH_DMA_ADDR_T_64BI <<
860 <<
861 config SIBYTE_LITTLESUR <<
862 bool "Sibyte BCM91250C2-LittleSur" <<
863 select BOOT_ELF32 <<
864 select HAVE_PATA_PLATFORM <<
865 select SIBYTE_SB1250 <<
866 select SWAP_IO_SPACE <<
867 select SYS_HAS_CPU_SB1 <<
868 select SYS_SUPPORTS_BIG_ENDIAN <<
869 select SYS_SUPPORTS_HIGHMEM <<
870 select SYS_SUPPORTS_LITTLE_ENDIAN <<
871 select ZONE_DMA32 if 64BIT <<
872 <<
873 config SIBYTE_SENTOSA <<
874 bool "Sibyte BCM91250E-Sentosa" <<
875 select BOOT_ELF32 <<
876 select SIBYTE_SB1250 <<
877 select SWAP_IO_SPACE <<
878 select SYS_HAS_CPU_SB1 <<
879 select SYS_SUPPORTS_BIG_ENDIAN <<
880 select SYS_SUPPORTS_LITTLE_ENDIAN <<
881 select SWIOTLB if ARCH_DMA_ADDR_T_64BI <<
882 <<
883 config SIBYTE_BIGSUR <<
884 bool "Sibyte BCM91480B-BigSur" <<
885 select BOOT_ELF32 <<
886 select NR_CPUS_DEFAULT_4 <<
887 select SIBYTE_BCM1x80 <<
888 select SWAP_IO_SPACE <<
889 select SYS_HAS_CPU_SB1 <<
890 select SYS_SUPPORTS_BIG_ENDIAN <<
891 select SYS_SUPPORTS_HIGHMEM <<
892 select SYS_SUPPORTS_LITTLE_ENDIAN <<
893 select ZONE_DMA32 if 64BIT <<
894 select SWIOTLB if ARCH_DMA_ADDR_T_64BI <<
895 <<
896 config SNI_RM <<
897 bool "SNI RM200/300/400" <<
898 select ARC_MEMORY <<
899 select ARC_PROMLIB <<
900 select FW_ARC if CPU_LITTLE_ENDIAN <<
901 select FW_ARC32 if CPU_LITTLE_ENDIAN <<
902 select FW_SNIPROM if CPU_BIG_ENDIAN <<
903 select ARCH_MAY_HAVE_PC_FDC <<
904 select ARCH_MIGHT_HAVE_PC_PARPORT <<
905 select ARCH_MIGHT_HAVE_PC_SERIO <<
906 select BOOT_ELF32 <<
907 select CEVT_R4K <<
908 select CSRC_R4K <<
909 select DEFAULT_SGI_PARTITION if CPU_BI <<
910 select DMA_NONCOHERENT <<
911 select GENERIC_ISA_DMA <<
912 select HAVE_EISA <<
913 select HAVE_PCSPKR_PLATFORM <<
914 select HAVE_PCI <<
915 select IRQ_MIPS_CPU <<
916 select I8253 <<
917 select I8259 <<
918 select ISA <<
919 select MIPS_L1_CACHE_SHIFT_6 <<
920 select SWAP_IO_SPACE if CPU_BIG_ENDIAN <<
921 select SYS_HAS_CPU_R4X00 <<
922 select SYS_HAS_CPU_R5000 <<
923 select SYS_HAS_CPU_R10000 <<
924 select R5000_CPU_SCACHE <<
925 select SYS_HAS_EARLY_PRINTK <<
926 select SYS_SUPPORTS_32BIT_KERNEL <<
927 select SYS_SUPPORTS_64BIT_KERNEL <<
928 select SYS_SUPPORTS_BIG_ENDIAN <<
929 select SYS_SUPPORTS_HIGHMEM <<
930 select SYS_SUPPORTS_LITTLE_ENDIAN <<
931 select WAR_R4600_V2_HIT_CACHEOP <<
932 help <<
933 The SNI RM200/300/400 are MIPS-based <<
934 Siemens Nixdorf Informationssysteme <<
935 Technology and now in turn merged wi <<
936 support this machine type. <<
937 337
938 config MACH_TX49XX !! 338 choice
939 bool "Toshiba TX49 series based machin !! 339 prompt "Au1X00 SOC Type"
940 select WAR_TX49XX_ICACHE_INDEX_INV !! 340 depends on SOC_AU1X00
941 !! 341 help
942 config MIKROTIK_RB532 !! 342 Say Y here to enable support for one of three AMD/Alchemy
943 bool "Mikrotik RB532 boards" !! 343 SOCs. For additional documentation see www.amd.com.
944 select CEVT_R4K !! 344
945 select CSRC_R4K !! 345 config SOC_AU1000
946 select DMA_NONCOHERENT !! 346 bool "SOC_AU1000"
947 select HAVE_PCI !! 347 config SOC_AU1100
948 select IRQ_MIPS_CPU !! 348 bool "SOC_AU1100"
949 select SYS_HAS_CPU_MIPS32_R1 !! 349 config SOC_AU1500
950 select SYS_SUPPORTS_32BIT_KERNEL !! 350 bool "SOC_AU1500"
951 select SYS_SUPPORTS_LITTLE_ENDIAN <<
952 select SWAP_IO_SPACE <<
953 select BOOT_RAW <<
954 select GPIOLIB <<
955 select MIPS_L1_CACHE_SHIFT_4 <<
956 help <<
957 Support the Mikrotik(tm) RouterBoard <<
958 based on the IDT RC32434 SoC. <<
959 <<
960 config CAVIUM_OCTEON_SOC <<
961 bool "Cavium Networks Octeon SoC based <<
962 select CEVT_R4K <<
963 select ARCH_HAS_PHYS_TO_DMA <<
964 select HAVE_RAPIDIO <<
965 select PHYS_ADDR_T_64BIT <<
966 select SYS_SUPPORTS_64BIT_KERNEL <<
967 select SYS_SUPPORTS_BIG_ENDIAN <<
968 select EDAC_SUPPORT <<
969 select EDAC_ATOMIC_SCRUB <<
970 select SYS_SUPPORTS_LITTLE_ENDIAN <<
971 select SYS_SUPPORTS_HOTPLUG_CPU if CPU <<
972 select SYS_HAS_EARLY_PRINTK <<
973 select SYS_HAS_CPU_CAVIUM_OCTEON <<
974 select HAVE_PCI <<
975 select HAVE_PLAT_DELAY <<
976 select HAVE_PLAT_FW_INIT_CMDLINE <<
977 select HAVE_PLAT_MEMCPY <<
978 select ZONE_DMA32 <<
979 select GPIOLIB <<
980 select USE_OF <<
981 select ARCH_SPARSEMEM_ENABLE <<
982 select SYS_SUPPORTS_SMP <<
983 select NR_CPUS_DEFAULT_64 <<
984 select MIPS_NR_CPU_NR_MAP_1024 <<
985 select BUILTIN_DTB <<
986 select MTD <<
987 select MTD_COMPLEX_MAPPINGS <<
988 select SWIOTLB <<
989 select SYS_SUPPORTS_RELOCATABLE <<
990 help <<
991 This option supports all of the Octe <<
992 Networks. It builds a kernel that dy <<
993 CPU type and supports all known boar <<
994 Some of the supported boards are: <<
995 EBT3000 <<
996 EBH3000 <<
997 EBH3100 <<
998 Thunder <<
999 Kodama <<
1000 Hikari <<
1001 Say Y here for most Octeon referenc <<
1002 351
1003 endchoice 352 endchoice
1004 353
1005 config FIT_IMAGE_FDT_EPM5 !! 354 choice
1006 bool "Include FDT for Mobileye EyeQ5 !! 355 prompt "AMD/Alchemy Pb1x and Db1x board support"
1007 depends on MACH_EYEQ5 !! 356 depends on SOC_AU1X00
1008 default n !! 357 help
1009 help !! 358 These are evaluation boards built by AMD/Alchemy to
1010 Enable this to include the FDT for !! 359 showcase their Au1X00 Internet Edge Processors. The SOC design
1011 from Mobileye in the FIT kernel ima !! 360 is based on the MIPS32 architecture running at 266/400/500MHz
1012 This requires u-boot on the platfor !! 361 with many integrated peripherals. Further information can be
1013 !! 362 found at their website, <http://www.amd.com/>. Say Y here if you
1014 source "arch/mips/alchemy/Kconfig" !! 363 wish to build a kernel for this platform.
1015 source "arch/mips/ath25/Kconfig" !! 364
1016 source "arch/mips/ath79/Kconfig" !! 365 config MIPS_PB1000
1017 source "arch/mips/bcm47xx/Kconfig" !! 366 bool "PB1000 board"
1018 source "arch/mips/bcm63xx/Kconfig" !! 367 depends on SOC_AU1000
1019 source "arch/mips/bmips/Kconfig" !! 368
1020 source "arch/mips/generic/Kconfig" !! 369 config MIPS_PB1100
1021 source "arch/mips/ingenic/Kconfig" !! 370 bool "PB1100 board"
1022 source "arch/mips/jazz/Kconfig" !! 371 depends on SOC_AU1100
1023 source "arch/mips/lantiq/Kconfig" !! 372
1024 source "arch/mips/mobileye/Kconfig" !! 373 config MIPS_PB1500
1025 source "arch/mips/pic32/Kconfig" !! 374 bool "PB1500 board"
1026 source "arch/mips/ralink/Kconfig" !! 375 depends on SOC_AU1500
1027 source "arch/mips/sgi-ip27/Kconfig" !! 376
1028 source "arch/mips/sibyte/Kconfig" !! 377 config MIPS_DB1000
1029 source "arch/mips/txx9/Kconfig" !! 378 bool "DB1000 board"
1030 source "arch/mips/cavium-octeon/Kconfig" !! 379 depends on SOC_AU1000
1031 source "arch/mips/loongson2ef/Kconfig" !! 380
1032 source "arch/mips/loongson32/Kconfig" !! 381 config MIPS_DB1100
1033 source "arch/mips/loongson64/Kconfig" !! 382 bool "DB1100 board"
1034 !! 383 depends on SOC_AU1100
1035 endmenu !! 384
>> 385 config MIPS_DB1500
>> 386 bool "DB1500 board"
>> 387 depends on SOC_AU1500
1036 388
1037 config GENERIC_HWEIGHT !! 389 endchoice
1038 bool <<
1039 default y <<
1040 <<
1041 config GENERIC_CALIBRATE_DELAY <<
1042 bool <<
1043 default y <<
1044 390
1045 config SCHED_OMIT_FRAME_POINTER !! 391 config SIBYTE_SB1xxx_SOC
1046 bool !! 392 bool "Support for Broadcom BCM1xxx SOCs (EXPERIMENTAL)"
1047 default y !! 393 depends on EXPERIMENTAL
1048 394
1049 # !! 395 choice
1050 # Select some configuration options automatic !! 396 prompt "BCM1xxx SOC Type"
1051 # !! 397 depends on SIBYTE_SB1xxx_SOC
1052 config FW_ARC !! 398 default SIBYTE_SB1250
1053 bool <<
1054 399
1055 config ARCH_MAY_HAVE_PC_FDC !! 400 config SIBYTE_SB1250
1056 bool !! 401 bool "BCM1250"
1057 402
1058 config BOOT_RAW !! 403 endchoice
1059 bool <<
1060 404
1061 config CEVT_BCM1480 !! 405 config SIMULATION
1062 bool !! 406 bool "Running under simulation"
>> 407 depends on SIBYTE_SB1xxx_SOC
1063 408
1064 config CEVT_DS1287 !! 409 config SIBYTE_CFE
1065 bool !! 410 bool "Booting from CFE"
>> 411 depends on SIBYTE_SB1xxx_SOC
1066 412
1067 config CEVT_GT641XX !! 413 config SIBYTE_CFE_CONSOLE
1068 bool !! 414 bool "Use firmware console"
>> 415 depends on SIBYTE_CFE
1069 416
1070 config CEVT_R4K !! 417 config SIBYTE_STANDALONE
1071 bool 418 bool
>> 419 depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE
>> 420 default y
1072 421
1073 config CEVT_SB1250 !! 422 config SIBYTE_STANDALONE_RAM_SIZE
1074 bool !! 423 int "Memory size (in megabytes)"
>> 424 depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE
>> 425 default "32"
>> 426
>> 427 config SIBYTE_BUS_WATCHER
>> 428 bool "Support for Bus Watcher statistics"
>> 429 depends on SIBYTE_SB1xxx_SOC
>> 430
>> 431 config SIBYTE_SB1250_PROF
>> 432 bool "Support for SB1/SOC profiling - SB1/SCD perf counters"
>> 433 depends on SIBYTE_SB1xxx_SOC
>> 434
>> 435 config SIBYTE_TBPROF
>> 436 bool "Support for ZBbus profiling"
>> 437 depends on SIBYTE_SB1xxx_SOC
1075 438
1076 config CEVT_TXX9 !! 439 config SIBYTE_SWARM
1077 bool !! 440 bool "Support for SWARM board"
>> 441 depends on SIBYTE_SB1250
1078 442
1079 config CSRC_BCM1480 !! 443 config SIBYTE_BOARD
1080 bool 444 bool
>> 445 depends on SIBYTE_SWARM
>> 446 default y
1081 447
1082 config CSRC_IOASIC !! 448 config SNI_RM200_PCI
1083 bool !! 449 bool "Support for SNI RM200 PCI"
>> 450 help
>> 451 The SNI RM200 PCI was a MIPS-based platform manufactured by Siemens
>> 452 Nixdorf Informationssysteme (SNI), parent company of Pyramid
>> 453 Technology and now in turn merged with Fujitsu. Say Y here to
>> 454 support this machine type.
1084 455
1085 config CSRC_R4K !! 456 config TANBAC_TB0226
1086 select CLOCKSOURCE_WATCHDOG if CPU_FR !! 457 bool "Support for TANBAC TB0226 (Mbase)"
1087 select HAVE_UNSTABLE_SCHED_CLOCK if S !! 458 help
1088 bool !! 459 The TANBAC TB0226 (Mbase) is a MIPS-based platform manufactured by TANBAC.
>> 460 Please refer to <http://www.tanbac.co.jp/> about Mbase.
1089 461
1090 config CSRC_SB1250 !! 462 config TANBAC_TB0229
1091 bool !! 463 bool "Support for TANBAC TB0229 (VR4131DIMM)"
>> 464 help
>> 465 The TANBAC TB0229 (VR4131DIMM) is a MIPS-based platform manufactured by TANBAC.
>> 466 Please refer to <http://www.tanbac.co.jp/> about VR4131DIMM.
1092 467
1093 config MIPS_CLOCK_VSYSCALL !! 468 config TOSHIBA_JMR3927
1094 def_bool CSRC_R4K || CLKSRC_MIPS_GIC !! 469 bool "Support for Toshiba JMR-TX3927 board"
>> 470 depends on MIPS32
1095 471
1096 config GPIO_TXX9 !! 472 config TOSHIBA_RBTX4927
1097 select GPIOLIB !! 473 bool "Support for Toshiba TBTX49[23]7 board"
1098 bool !! 474 depends on MIPS32
1099 475
1100 config FW_CFE !! 476 config VICTOR_MPC30X
1101 bool !! 477 bool "Support for Victor MP-C303/304"
1102 478
1103 config ARCH_SUPPORTS_UPROBES !! 479 config ZAO_CAPCELLA
1104 def_bool y !! 480 bool "Support for ZAO Networks Capcella"
1105 481
1106 config DMA_NONCOHERENT !! 482 config RWSEM_GENERIC_SPINLOCK
1107 bool 483 bool
1108 # !! 484 default y
1109 # MIPS allows mixing "slightly differ <<
1110 # Attribute bits. It is believed tha <<
1111 # KSEG1 and the implementation specif <<
1112 # by pgprot_writcombine can be mixed, <<
1113 # significant advantages. <<
1114 # <<
1115 select ARCH_HAS_SETUP_DMA_OPS <<
1116 select ARCH_HAS_DMA_WRITE_COMBINE <<
1117 select ARCH_HAS_DMA_PREP_COHERENT <<
1118 select ARCH_HAS_SYNC_DMA_FOR_CPU <<
1119 select ARCH_HAS_SYNC_DMA_FOR_DEVICE <<
1120 select ARCH_HAS_DMA_SET_UNCACHED <<
1121 select DMA_NONCOHERENT_MMAP <<
1122 select NEED_DMA_MAP_STATE <<
1123 485
1124 config SYS_HAS_EARLY_PRINTK !! 486 config RWSEM_XCHGADD_ALGORITHM
1125 bool 487 bool
1126 488
1127 config SYS_SUPPORTS_HOTPLUG_CPU !! 489 #
>> 490 # Select some configuration options automatically based on user selections.
>> 491 #
>> 492 config ARC
1128 bool 493 bool
>> 494 depends on SNI_RM200_PCI || SGI_IP32 || SGI_IP27 || SGI_IP22 || MIPS_MAGNUM_4000 || OLIVETTI_M700 || ACER_PICA_61
>> 495 default y
1129 496
1130 config MIPS_BONITO64 !! 497 config GENERIC_ISA_DMA
1131 bool 498 bool
>> 499 depends on SNI_RM200_PCI || MIPS_MAGNUM_4000 || OLIVETTI_M700 || ACER_PICA_61
>> 500 default y
1132 501
1133 config MIPS_MSC !! 502 config CONFIG_GT64120
1134 bool 503 bool
>> 504 depends on MIPS_EV64120 || MOMENCO_OCELOT
>> 505 default y
1135 506
1136 config SYNC_R4K !! 507 config I8259
1137 bool 508 bool
>> 509 depends on SNI_RM200_PCI || DDB5477 || DDB5476 || DDB5074 || MIPS_MALTA || MIPS_MAGNUM_4000 || OLIVETTI_M700 || MIPS_COBALT || ACER_PICA_61
>> 510 default y
1138 511
1139 config NO_IOPORT_MAP !! 512 config MIPS_JAZZ
1140 def_bool n <<
1141 <<
1142 config GENERIC_CSUM <<
1143 def_bool CPU_NO_LOAD_STORE_LR <<
1144 <<
1145 config GENERIC_ISA_DMA <<
1146 bool 513 bool
1147 select ZONE_DMA if GENERIC_ISA_DMA_SU !! 514 depends on MIPS_MAGNUM_4000 || OLIVETTI_M700 || ACER_PICA_61
1148 select ISA_DMA_API !! 515 default y
1149 516
1150 config GENERIC_ISA_DMA_SUPPORT_BROKEN !! 517 config NONCOHERENT_IO
1151 bool 518 bool
1152 select GENERIC_ISA_DMA !! 519 depends on ZAO_CAPCELLA || VICTOR_MPC30X || TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 || SNI_RM200_PCI || SGI_IP32 || SGI_IP22 || NEC_EAGLE || NEC_OSPREY || DDB5477 || DDB5476 || DDB5074 || MOMENCO_OCELOT || MOMENCO_OCELOT_C || MOMENCO_OCELOT_G || MIPS_SEAD || MIPS_MALTA || MIPS_MAGNUM_4000 || OLIVETTI_M700 || MIPS_ATLAS || LASAT || MIPS_ITE8172 || IBM_WORKPAD || HP_LASERJET || MIPS_IVR || MIPS_EV96100 || MIPS_EV64120 || DECSTATION || MIPS_COBALT || MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000 || CASIO_E55 || ACER_PICA_61 || TANBAC_TB0226 || TANBAC_TB0229
>> 520 default y if ZAO_CAPCELLA || VICTOR_MPC30X || TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 || SNI_RM200_PCI || SGI_IP32 || SGI_IP22 || NEC_EAGLE || NEC_OSPREY || DDB5477 || DDB5476 || DDB5074 || MOMENCO_OCELOT_G || MOMENCO_OCELOT || MIPS_SEAD || MIPS_MALTA || MIPS_MAGNUM_4000 || OLIVETTI_M700 || MIPS_ATLAS || LASAT || MIPS_ITE8172 || IBM_WORKPAD || HP_LASERJET || MIPS_IVR || MIPS_EV96100 || MIPS_EV64120 || DECSTATION || MIPS_COBALT || MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000 || CASIO_E55 || ACER_PICA_61 || TANBAC_TB0226 || TANBAC_TB0229
>> 521 default n if (SIBYTE_SB1250 || SGI_IP27)
1153 522
1154 config HAVE_PLAT_DELAY !! 523 config CPU_LITTLE_ENDIAN
1155 bool !! 524 bool "Generate little endian code"
>> 525 default y if ACER_PICA_61 || CASIO_E55 || DDB5074 || DDB5476 || DDB5477 || DECSTATION || HP_LASERJET || IBM_WORKPAD || LASAT || MIPS_COBALT || MIPS_ITE8172 || MIPS_IVR || MIPS_PB1000 || MIPS_PB1100 || MIPS_PB1500 || NEC_OSPREY || NEC_EAGLE || OLIVETTI_M700 || SNI_RM200_PCI || VICTOR_MPC30X || ZAO_CAPCELLA
>> 526 default n if BAGET_MIPS || MIPS_EV64120 || MIPS_EV96100 || MOMENCO_OCELOT || MOMENCO_OCELOT_G || SGI_IP22 || SGI_IP27 || SGI_IP32 || TOSHIBA_JMR3927
>> 527 help
>> 528 Some MIPS machines can be configured for either little or big endian
>> 529 byte order. These modes require different kernels. Say Y if your
>> 530 machine is little endian, N if it's a big endian machine.
1156 531
1157 config HAVE_PLAT_FW_INIT_CMDLINE !! 532 config IRQ_CPU
1158 bool 533 bool
>> 534 depends on ZAO_CAPCELLA || VICTOR_MPC30X || SGI_IP22 || NEC_EAGLE || NEC_OSPREY || DDB5477 || DDB5476 || DDB5074 || IBM_WORKPAD || HP_LASERJET || DECSTATION || CASIO_E55 || TANBAC_TB0226 || TANBAC_TB0229
>> 535 default y
1159 536
1160 config HAVE_PLAT_MEMCPY !! 537 config VR41XX_TIME_C
1161 bool 538 bool
>> 539 depends on ZAO_CAPCELLA || VICTOR_MPC30X || NEC_EAGLE || IBM_WORKPAD || CASIO_E55 || TANBAC_TB0226 || TANBAC_TB0229
>> 540 default y
1162 541
1163 config ISA_DMA_API !! 542 config DUMMY_KEYB
1164 bool 543 bool
>> 544 depends on ZAO_CAPCELLA || VICTOR_MPC30X || SIBYTE_SB1250 || NEC_EAGLE || NEC_OSPREY || DDB5477 || IBM_WORKPAD || CASIO_E55 || TANBAC_TB0226 || TANBAC_TB0229
>> 545 default y
1165 546
1166 config SYS_SUPPORTS_RELOCATABLE !! 547 config VR41XX_COMMON
1167 bool 548 bool
1168 help !! 549 depends on NEC_EAGLE || ZAO_CAPCELLA || VICTOR_MPC30X || IBM_WORKPAD || CASIO_E55 || TANBAC_TB0226 || TANBAC_TB0229
1169 Selected if the platform supports r !! 550 default y
1170 The platform must provide plat_get_ <<
1171 to allow access to command line and <<
1172 <<
1173 # <<
1174 # Endianness selection. Sufficiently obscure <<
1175 # answer,so we try hard to limit the availabl <<
1176 # choice statement should be more obvious to <<
1177 # <<
1178 choice <<
1179 prompt "Endianness selection" <<
1180 help <<
1181 Some MIPS machines can be configure <<
1182 byte order. These modes require dif <<
1183 Linux distribution. In general the <<
1184 particular system but some systems <<
1185 one or the other endianness. <<
1186 <<
1187 config CPU_BIG_ENDIAN <<
1188 bool "Big endian" <<
1189 depends on SYS_SUPPORTS_BIG_ENDIAN <<
1190 <<
1191 config CPU_LITTLE_ENDIAN <<
1192 bool "Little endian" <<
1193 depends on SYS_SUPPORTS_LITTLE_ENDIAN <<
1194 551
1195 endchoice !! 552 config VRC4173
>> 553 tristate "NEC VRC4173 Support"
>> 554 depends on NEC_EAGLE || VICTOR_MPC30X
1196 555
1197 config EXPORT_UASM !! 556 config DDB5XXX_COMMON
1198 bool 557 bool
>> 558 depends on DDB5074 || DDB5476 || DDB5477
>> 559 default y
1199 560
1200 config SYS_SUPPORTS_APM_EMULATION !! 561 config MIPS_BOARDS_GEN
1201 bool 562 bool
>> 563 depends on MIPS_ATLAS || MIPS_MALTA || MIPS_SEAD
>> 564 default y
1202 565
1203 config SYS_SUPPORTS_BIG_ENDIAN !! 566 config ITE_BOARD_GEN
1204 bool 567 bool
>> 568 depends on MIPS_IVR || MIPS_ITE8172
>> 569 default y
1205 570
1206 config SYS_SUPPORTS_LITTLE_ENDIAN !! 571 config NEW_PCI
1207 bool 572 bool
>> 573 depends on ZAO_CAPCELLA || VICTOR_MPC30X || TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 || NEC_EAGLE || DDB5477 || DDB5476 || DDB5074 || MIPS_ITE8172 || HP_LASERJET || MIPS_IVR || MIPS_EV96100 || MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000 || TANBAC_TB0226 || TANBAC_TB0229
>> 574 default y
1208 575
1209 config MIPS_HUGE_TLB_SUPPORT !! 576 config SWAP_IO_SPACE
1210 def_bool HUGETLB_PAGE || TRANSPARENT_ !! 577 bool "Support for paging of anonymous memory"
1211 !! 578 depends on TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 || SIBYTE_SB1250 || SGI_IP22 || MOMENCO_OCELOT_C || MOMENCO_OCELOT_G || MOMENCO_OCELOT || MIPS_MALTA || MIPS_ATLAS || MIPS_EV96100 || MIPS_PB1100 || MIPS_PB1000
1212 config IRQ_TXX9 !! 579 default y
1213 bool !! 580 help
>> 581 This option allows you to choose whether you want to have support
>> 582 for socalled swap devices or swap files in your kernel that are
>> 583 used to provide more virtual memory than the actual RAM present
>> 584 in your computer. If unusre say Y.
1214 585
1215 config IRQ_GT641XX !! 586 config SIBYTE_HAS_LDT
1216 bool 587 bool
>> 588 depends on SIBYTE_SB1xxx_SOC && PCI
>> 589 default y
1217 590
1218 config PCI_GT64XXX_PCI0 !! 591 config AU1000_USB_DEVICE
1219 bool 592 bool
>> 593 depends on MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000
>> 594 default n
1220 595
1221 config PCI_XTALK_BRIDGE !! 596 config COBALT_LCD
1222 bool 597 bool
>> 598 depends on MIPS_COBALT
>> 599 default y
1223 600
1224 config NO_EXCEPT_FILL !! 601 config MIPS_GT64120
1225 bool 602 bool
>> 603 depends on MIPS_EV64120
>> 604 default y
1226 605
1227 config MIPS_SPRAM !! 606 config MIPS_GT96100
1228 bool 607 bool
>> 608 depends on MIPS_EV96100
>> 609 default y
>> 610 help
>> 611 Say Y here to support the Galileo Technology GT96100 communications
>> 612 controller card. There is a web page at <http://www.galileot.com/>.
1229 613
1230 config SWAP_IO_SPACE !! 614 config IT8172_CIR
1231 bool 615 bool
>> 616 depends on MIPS_ITE8172 || MIPS_IVR
>> 617 default y
1232 618
1233 config SGI_HAS_INDYDOG !! 619 config IT8712
1234 bool 620 bool
>> 621 depends on MIPS_ITE8172
>> 622 default y
1235 623
1236 config SGI_HAS_HAL2 !! 624 config BOOT_ELF32
1237 bool 625 bool
>> 626 depends on DECSTATION || MIPS_ATLAS || MIPS_MALTA || SIBYTE_SB1250 || SGI_IP32 || SGI_IP22 || SNI_RM200_PCI
>> 627 default y
1238 628
1239 config SGI_HAS_SEEQ !! 629 config L1_CACHE_SHIFT
1240 bool !! 630 int
>> 631 default "4" if DECSTATION
>> 632 default "5" if SGI_IP32 || SGI_IP22 || MIPS_SEAD || MIPS_MALTA || MIPS_ATLAS
>> 633 default "7" if SGI_IP27
1241 634
1242 config SGI_HAS_WD93 !! 635 config ARC32
1243 bool 636 bool
>> 637 depends on SNI_RM200_PCI || SGI_IP32 || SGI_IP22 || MIPS_MAGNUM_4000 || OLIVETTI_M700
>> 638 default y
1244 639
1245 config SGI_HAS_ZILOG !! 640 config FB
1246 bool 641 bool
>> 642 depends on MIPS_MAGNUM_4000 || OLIVETTI_M700
>> 643 default y
>> 644 ---help---
>> 645 The frame buffer device provides an abstraction for the graphics
>> 646 hardware. It represents the frame buffer of some video hardware and
>> 647 allows application software to access the graphics hardware through
>> 648 a well-defined interface, so the software doesn't need to know
>> 649 anything about the low-level (hardware register) stuff.
>> 650
>> 651 Frame buffer devices work identically across the different
>> 652 architectures supported by Linux and make the implementation of
>> 653 application programs easier and more portable; at this point, an X
>> 654 server exists which uses the frame buffer device exclusively.
>> 655 On several non-X86 architectures, the frame buffer device is the
>> 656 only way to use the graphics hardware.
>> 657
>> 658 The device is accessed through special device nodes, usually located
>> 659 in the /dev directory, i.e. /dev/fb*.
>> 660
>> 661 You need an utility program called fbset to make full use of frame
>> 662 buffer devices. Please read <file:Documentation/fb/framebuffer.txt>
>> 663 and the Framebuffer-HOWTO at
>> 664 <http://www.tahallah.demon.co.uk/programming/prog.html> for more
>> 665 information.
>> 666
>> 667 Say Y here and to the driver for your graphics board below if you
>> 668 are compiling a kernel for a non-x86 architecture.
>> 669
>> 670 If you are compiling for the x86 architecture, you can say Y if you
>> 671 want to play with it, but it is not essential. Please note that
>> 672 running graphical applications that directly touch the hardware
>> 673 (e.g. an accelerated X server) and that are not frame buffer
>> 674 device-aware may cause unexpected results. If unsure, say N.
1247 675
1248 config SGI_HAS_I8042 !! 676 config FB_G364
1249 bool 677 bool
>> 678 depends on MIPS_MAGNUM_4000 || OLIVETTI_M700
>> 679 default y
1250 680
1251 config DEFAULT_SGI_PARTITION !! 681 config HAVE_STD_PC_SERIAL_PORT
1252 bool 682 bool
>> 683 depends on DDB5476 || DDB5074 || MIPS_MALTA
>> 684 default y
1253 685
1254 config FW_ARC32 !! 686 config VR4181
1255 bool 687 bool
>> 688 depends on NEC_OSPREY
>> 689 default y
1256 690
1257 config FW_SNIPROM !! 691 config ARC_CONSOLE
1258 bool !! 692 bool "ARC console support"
>> 693 depends on SGI_IP22 || SNI_RM200_PCI
1259 694
1260 config BOOT_ELF32 !! 695 config ARC_MEMORY
1261 bool 696 bool
>> 697 depends on SNI_RM200_PCI || SGI_IP32
>> 698 default y
1262 699
1263 config MIPS_L1_CACHE_SHIFT_4 !! 700 config ARC_PROMLIB
1264 bool 701 bool
>> 702 depends on SNI_RM200_PCI || SGI_IP32 || SGI_IP22
>> 703 default y
1265 704
1266 config MIPS_L1_CACHE_SHIFT_5 !! 705 config BOARD_SCACHE
1267 bool 706 bool
>> 707 depends on MIPS_EV96100 || MOMENCO_OCELOT || SGI_IP22
>> 708 default y
1268 709
1269 config MIPS_L1_CACHE_SHIFT_6 !! 710 config ARC64
1270 bool 711 bool
>> 712 depends on SGI_IP27
>> 713 default y
1271 714
1272 config MIPS_L1_CACHE_SHIFT_7 !! 715 config BOOT_ELF64
1273 bool 716 bool
>> 717 depends on SGI_IP27
>> 718 default y
1274 719
1275 config MIPS_L1_CACHE_SHIFT !! 720 #config MAPPED_PCI_IO y
1276 int !! 721 # bool
1277 default "7" if MIPS_L1_CACHE_SHIFT_7 !! 722 # depends on SGI_IP27
1278 default "6" if MIPS_L1_CACHE_SHIFT_6 !! 723 # default y
1279 default "5" if MIPS_L1_CACHE_SHIFT_5 <<
1280 default "4" if MIPS_L1_CACHE_SHIFT_4 <<
1281 default "5" <<
1282 724
1283 config ARC_CMDLINE_ONLY !! 725 config QL_ISP_A64
1284 bool 726 bool
>> 727 depends on SGI_IP27
>> 728 default y
1285 729
1286 config ARC_CONSOLE !! 730 config TOSHIBA_BOARDS
1287 bool "ARC console support" <<
1288 depends on SGI_IP22 || SGI_IP28 || (S <<
1289 <<
1290 config ARC_MEMORY <<
1291 bool 731 bool
>> 732 depends on TOSHIBA_JMR3927 || TOSHIBA_RBTX4927
>> 733 default y
1292 734
1293 config ARC_PROMLIB !! 735 config TANBAC_TB0219
1294 bool !! 736 bool "Added TANBAC TB0219 Base board support"
>> 737 depends on TANBAC_TB0229
1295 738
1296 config FW_ARC64 !! 739 endmenu
1297 bool <<
1298 740
1299 config BOOT_ELF64 <<
1300 bool <<
1301 741
1302 menu "CPU selection" 742 menu "CPU selection"
1303 743
1304 choice 744 choice
1305 prompt "CPU type" 745 prompt "CPU type"
1306 default CPU_R4X00 746 default CPU_R4X00
1307 747
1308 config CPU_LOONGSON64 !! 748 config CPU_MIPS32
1309 bool "Loongson 64-bit CPU" !! 749 bool "MIPS32"
1310 depends on SYS_HAS_CPU_LOONGSON64 !! 750
1311 select ARCH_HAS_PHYS_TO_DMA !! 751 config CPU_MIPS64
1312 select CPU_MIPSR2 !! 752 bool "MIPS64"
1313 select CPU_HAS_PREFETCH <<
1314 select CPU_SUPPORTS_64BIT_KERNEL <<
1315 select CPU_SUPPORTS_HIGHMEM <<
1316 select CPU_SUPPORTS_HUGEPAGES <<
1317 select CPU_SUPPORTS_MSA <<
1318 select CPU_SUPPORTS_VZ <<
1319 select CPU_DIEI_BROKEN if !LOONGSON3_ <<
1320 select CPU_MIPSR2_IRQ_VI <<
1321 select DMA_NONCOHERENT <<
1322 select WEAK_ORDERING <<
1323 select WEAK_REORDERING_BEYOND_LLSC <<
1324 select MIPS_ASID_BITS_VARIABLE <<
1325 select MIPS_PGD_C0_CONTEXT <<
1326 select MIPS_L1_CACHE_SHIFT_6 <<
1327 select MIPS_FP_SUPPORT <<
1328 select GPIOLIB <<
1329 select SWIOTLB <<
1330 help <<
1331 The Loongson GSx64(GS264/GS464/GS46 <<
1332 cores implements the MIPS64R2 instr <<
1333 including most 64-bit Loongson-2 (2 <<
1334 3B1000, 3B1500, 3A2000, 3A3000 and <<
1335 Loongson-2E/2F is not covered here <<
1336 <<
1337 config CPU_LOONGSON2E <<
1338 bool "Loongson 2E" <<
1339 depends on SYS_HAS_CPU_LOONGSON2E <<
1340 select CPU_LOONGSON2EF <<
1341 help <<
1342 The Loongson 2E processor implement <<
1343 with many extensions. <<
1344 <<
1345 It has an internal FPGA northbridge <<
1346 bonito64. <<
1347 <<
1348 config CPU_LOONGSON2F <<
1349 bool "Loongson 2F" <<
1350 depends on SYS_HAS_CPU_LOONGSON2F <<
1351 select CPU_LOONGSON2EF <<
1352 help <<
1353 The Loongson 2F processor implement <<
1354 with many extensions. <<
1355 <<
1356 Loongson2F have built-in DDR2 and P <<
1357 have a similar programming interfac <<
1358 Loongson2E. <<
1359 <<
1360 config CPU_LOONGSON1B <<
1361 bool "Loongson 1B" <<
1362 depends on SYS_HAS_CPU_LOONGSON1B <<
1363 select CPU_LOONGSON32 <<
1364 select LEDS_GPIO_REGISTER <<
1365 help <<
1366 The Loongson 1B is a 32-bit SoC, wh <<
1367 Release 1 instruction set and part <<
1368 instruction set. <<
1369 <<
1370 config CPU_LOONGSON1C <<
1371 bool "Loongson 1C" <<
1372 depends on SYS_HAS_CPU_LOONGSON1C <<
1373 select CPU_LOONGSON32 <<
1374 select LEDS_GPIO_REGISTER <<
1375 help <<
1376 The Loongson 1C is a 32-bit SoC, wh <<
1377 Release 1 instruction set and part <<
1378 instruction set. <<
1379 <<
1380 config CPU_MIPS32_R1 <<
1381 bool "MIPS32 Release 1" <<
1382 depends on SYS_HAS_CPU_MIPS32_R1 <<
1383 select CPU_HAS_PREFETCH <<
1384 select CPU_SUPPORTS_32BIT_KERNEL <<
1385 select CPU_SUPPORTS_HIGHMEM <<
1386 help <<
1387 Choose this option to build a kerne <<
1388 MIPS32 architecture. Most modern e <<
1389 MIPS processor are based on a MIPS3 <<
1390 specific type of processor in your <<
1391 otherwise CPU_MIPS32_R1 is a safe b <<
1392 Release 2 of the MIPS32 architectur <<
1393 years so chances are you even have <<
1394 in which case you should choose CPU <<
1395 performance. <<
1396 <<
1397 config CPU_MIPS32_R2 <<
1398 bool "MIPS32 Release 2" <<
1399 depends on SYS_HAS_CPU_MIPS32_R2 <<
1400 select CPU_HAS_PREFETCH <<
1401 select CPU_SUPPORTS_32BIT_KERNEL <<
1402 select CPU_SUPPORTS_HIGHMEM <<
1403 select CPU_SUPPORTS_MSA <<
1404 help <<
1405 Choose this option to build a kerne <<
1406 MIPS32 architecture. Most modern e <<
1407 MIPS processor are based on a MIPS3 <<
1408 specific type of processor in your <<
1409 otherwise CPU_MIPS32_R1 is a safe b <<
1410 <<
1411 config CPU_MIPS32_R5 <<
1412 bool "MIPS32 Release 5" <<
1413 depends on SYS_HAS_CPU_MIPS32_R5 <<
1414 select CPU_HAS_PREFETCH <<
1415 select CPU_SUPPORTS_32BIT_KERNEL <<
1416 select CPU_SUPPORTS_HIGHMEM <<
1417 select CPU_SUPPORTS_MSA <<
1418 select CPU_SUPPORTS_VZ <<
1419 select MIPS_O32_FP64_SUPPORT <<
1420 help <<
1421 Choose this option to build a kerne <<
1422 MIPS32 architecture. New MIPS proc <<
1423 family, are based on a MIPS32r5 pro <<
1424 processor, you probably need to sel <<
1425 <<
1426 config CPU_MIPS32_R6 <<
1427 bool "MIPS32 Release 6" <<
1428 depends on SYS_HAS_CPU_MIPS32_R6 <<
1429 select CPU_HAS_PREFETCH <<
1430 select CPU_NO_LOAD_STORE_LR <<
1431 select CPU_SUPPORTS_32BIT_KERNEL <<
1432 select CPU_SUPPORTS_HIGHMEM <<
1433 select CPU_SUPPORTS_MSA <<
1434 select CPU_SUPPORTS_VZ <<
1435 select MIPS_O32_FP64_SUPPORT <<
1436 help <<
1437 Choose this option to build a kerne <<
1438 MIPS32 architecture. New MIPS proc <<
1439 family, are based on a MIPS32r6 pro <<
1440 processor, you probably need to sel <<
1441 <<
1442 config CPU_MIPS64_R1 <<
1443 bool "MIPS64 Release 1" <<
1444 depends on SYS_HAS_CPU_MIPS64_R1 <<
1445 select CPU_HAS_PREFETCH <<
1446 select CPU_SUPPORTS_32BIT_KERNEL <<
1447 select CPU_SUPPORTS_64BIT_KERNEL <<
1448 select CPU_SUPPORTS_HIGHMEM <<
1449 select CPU_SUPPORTS_HUGEPAGES <<
1450 help <<
1451 Choose this option to build a kerne <<
1452 MIPS64 architecture. Many modern e <<
1453 MIPS processor are based on a MIPS6 <<
1454 specific type of processor in your <<
1455 otherwise CPU_MIPS64_R1 is a safe b <<
1456 Release 2 of the MIPS64 architectur <<
1457 years so chances are you even have <<
1458 in which case you should choose CPU <<
1459 performance. <<
1460 <<
1461 config CPU_MIPS64_R2 <<
1462 bool "MIPS64 Release 2" <<
1463 depends on SYS_HAS_CPU_MIPS64_R2 <<
1464 select CPU_HAS_PREFETCH <<
1465 select CPU_SUPPORTS_32BIT_KERNEL <<
1466 select CPU_SUPPORTS_64BIT_KERNEL <<
1467 select CPU_SUPPORTS_HIGHMEM <<
1468 select CPU_SUPPORTS_HUGEPAGES <<
1469 select CPU_SUPPORTS_MSA <<
1470 help <<
1471 Choose this option to build a kerne <<
1472 MIPS64 architecture. Many modern e <<
1473 MIPS processor are based on a MIPS6 <<
1474 specific type of processor in your <<
1475 otherwise CPU_MIPS64_R1 is a safe b <<
1476 <<
1477 config CPU_MIPS64_R5 <<
1478 bool "MIPS64 Release 5" <<
1479 depends on SYS_HAS_CPU_MIPS64_R5 <<
1480 select CPU_HAS_PREFETCH <<
1481 select CPU_SUPPORTS_32BIT_KERNEL <<
1482 select CPU_SUPPORTS_64BIT_KERNEL <<
1483 select CPU_SUPPORTS_HIGHMEM <<
1484 select CPU_SUPPORTS_HUGEPAGES <<
1485 select CPU_SUPPORTS_MSA <<
1486 select MIPS_O32_FP64_SUPPORT if 32BIT <<
1487 select CPU_SUPPORTS_VZ <<
1488 help <<
1489 Choose this option to build a kerne <<
1490 MIPS64 architecture. This is a int <<
1491 release partly implementing release <<
1492 any hardware known to be based on t <<
1493 <<
1494 config CPU_MIPS64_R6 <<
1495 bool "MIPS64 Release 6" <<
1496 depends on SYS_HAS_CPU_MIPS64_R6 <<
1497 select CPU_HAS_PREFETCH <<
1498 select CPU_NO_LOAD_STORE_LR <<
1499 select CPU_SUPPORTS_32BIT_KERNEL <<
1500 select CPU_SUPPORTS_64BIT_KERNEL <<
1501 select CPU_SUPPORTS_HIGHMEM <<
1502 select CPU_SUPPORTS_HUGEPAGES <<
1503 select CPU_SUPPORTS_MSA <<
1504 select MIPS_O32_FP64_SUPPORT if 32BIT <<
1505 select CPU_SUPPORTS_VZ <<
1506 help <<
1507 Choose this option to build a kerne <<
1508 MIPS64 architecture. New MIPS proc <<
1509 family, are based on a MIPS64r6 pro <<
1510 processor, you probably need to sel <<
1511 <<
1512 config CPU_P5600 <<
1513 bool "MIPS Warrior P5600" <<
1514 depends on SYS_HAS_CPU_P5600 <<
1515 select CPU_HAS_PREFETCH <<
1516 select CPU_SUPPORTS_32BIT_KERNEL <<
1517 select CPU_SUPPORTS_HIGHMEM <<
1518 select CPU_SUPPORTS_MSA <<
1519 select CPU_SUPPORTS_CPUFREQ <<
1520 select CPU_SUPPORTS_VZ <<
1521 select CPU_MIPSR2_IRQ_VI <<
1522 select CPU_MIPSR2_IRQ_EI <<
1523 select MIPS_O32_FP64_SUPPORT <<
1524 help <<
1525 Choose this option to build a kerne <<
1526 It's based on MIPS32r5 ISA with XPA <<
1527 MMU with two-levels TLB, UCA, MSA, <<
1528 level features like up to six P5600 <<
1529 cache, IOCU/IOMMU (though might be <<
1530 specific IP core configuration), GI <<
1531 eJTAG and PDtrace. <<
1532 753
1533 config CPU_R3000 754 config CPU_R3000
1534 bool "R3000" 755 bool "R3000"
1535 depends on SYS_HAS_CPU_R3000 !! 756 depends on MIPS32
1536 select CPU_HAS_WB <<
1537 select CPU_R3K_TLB <<
1538 select CPU_SUPPORTS_32BIT_KERNEL <<
1539 select CPU_SUPPORTS_HIGHMEM <<
1540 help 757 help
1541 Please make sure to pick the right 758 Please make sure to pick the right CPU type. Linux/MIPS is not
1542 designed to be generic, i.e. Kernel 759 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1543 *not* work on R4000 machines and vi 760 *not* work on R4000 machines and vice versa. However, since most
1544 of the supported machines have an R 761 of the supported machines have an R4000 (or similar) CPU, R4x00
1545 might be a safe bet. If the result 762 might be a safe bet. If the resulting kernel does not work,
1546 try to recompile with R3000. 763 try to recompile with R3000.
1547 764
>> 765 config CPU_TX39XX
>> 766 bool "R39XX"
>> 767 depends on MIPS32
>> 768
>> 769 config CPU_VR41XX
>> 770 bool "R41xx"
>> 771 help
>> 772 The options selects support for the NEC VR41xx series of processors.
>> 773 Only choose this option if you have one of these processors as a
>> 774 kernel built with this option will not run on any other type of
>> 775 processor or vice versa.
>> 776
1548 config CPU_R4300 777 config CPU_R4300
1549 bool "R4300" 778 bool "R4300"
1550 depends on SYS_HAS_CPU_R4300 <<
1551 select CPU_SUPPORTS_32BIT_KERNEL <<
1552 select CPU_SUPPORTS_64BIT_KERNEL <<
1553 help 779 help
1554 MIPS Technologies R4300-series proc 780 MIPS Technologies R4300-series processors.
1555 781
1556 config CPU_R4X00 782 config CPU_R4X00
1557 bool "R4x00" 783 bool "R4x00"
1558 depends on SYS_HAS_CPU_R4X00 <<
1559 select CPU_SUPPORTS_32BIT_KERNEL <<
1560 select CPU_SUPPORTS_64BIT_KERNEL <<
1561 select CPU_SUPPORTS_HUGEPAGES <<
1562 help 784 help
1563 MIPS Technologies R4000-series proc 785 MIPS Technologies R4000-series processors other than 4300, including
1564 the R4000, R4400, R4600, and 4700. 786 the R4000, R4400, R4600, and 4700.
1565 787
1566 config CPU_TX49XX 788 config CPU_TX49XX
1567 bool "R49XX" 789 bool "R49XX"
1568 depends on SYS_HAS_CPU_TX49XX <<
1569 select CPU_HAS_PREFETCH <<
1570 select CPU_SUPPORTS_32BIT_KERNEL <<
1571 select CPU_SUPPORTS_64BIT_KERNEL <<
1572 select CPU_SUPPORTS_HUGEPAGES <<
1573 790
1574 config CPU_R5000 791 config CPU_R5000
1575 bool "R5000" 792 bool "R5000"
1576 depends on SYS_HAS_CPU_R5000 <<
1577 select CPU_SUPPORTS_32BIT_KERNEL <<
1578 select CPU_SUPPORTS_64BIT_KERNEL <<
1579 select CPU_SUPPORTS_HUGEPAGES <<
1580 help 793 help
1581 MIPS Technologies R5000-series proc 794 MIPS Technologies R5000-series processors other than the Nevada.
1582 795
1583 config CPU_R5500 !! 796 config CPU_R5432
1584 bool "R5500" !! 797 bool "R5432"
1585 depends on SYS_HAS_CPU_R5500 !! 798
1586 select CPU_SUPPORTS_32BIT_KERNEL !! 799 config CPU_R6000
1587 select CPU_SUPPORTS_64BIT_KERNEL !! 800 bool "R6000"
1588 select CPU_SUPPORTS_HUGEPAGES !! 801 depends on MIPS32 && EXPERIMENTAL
1589 help 802 help
1590 NEC VR5500 and VR5500A series proce !! 803 MIPS Technologies R6000 and R6000A series processors. Note these
1591 instruction set. !! 804 processors are extremly rare and the support for them is incomplete.
1592 805
1593 config CPU_NEVADA 806 config CPU_NEVADA
1594 bool "RM52xx" !! 807 bool "R52xx"
1595 depends on SYS_HAS_CPU_NEVADA !! 808 help
1596 select CPU_SUPPORTS_32BIT_KERNEL !! 809 MIPS Technologies R52x0-series ("Nevada") processors.
1597 select CPU_SUPPORTS_64BIT_KERNEL !! 810
1598 select CPU_SUPPORTS_HUGEPAGES !! 811 config CPU_R8000
>> 812 bool "R8000"
>> 813 depends on MIPS64 && EXPERIMENTAL
1599 help 814 help
1600 QED / PMC-Sierra RM52xx-series ("Ne !! 815 MIPS Technologies R8000 processors. Note these processors are
>> 816 uncommon and the support for them is incomplete.
1601 817
1602 config CPU_R10000 818 config CPU_R10000
1603 bool "R10000" 819 bool "R10000"
1604 depends on SYS_HAS_CPU_R10000 <<
1605 select CPU_HAS_PREFETCH <<
1606 select CPU_SUPPORTS_32BIT_KERNEL <<
1607 select CPU_SUPPORTS_64BIT_KERNEL <<
1608 select CPU_SUPPORTS_HIGHMEM <<
1609 select CPU_SUPPORTS_HUGEPAGES <<
1610 help 820 help
1611 MIPS Technologies R10000-series pro 821 MIPS Technologies R10000-series processors.
1612 822
1613 config CPU_RM7000 823 config CPU_RM7000
1614 bool "RM7000" 824 bool "RM7000"
1615 depends on SYS_HAS_CPU_RM7000 <<
1616 select CPU_HAS_PREFETCH <<
1617 select CPU_SUPPORTS_32BIT_KERNEL <<
1618 select CPU_SUPPORTS_64BIT_KERNEL <<
1619 select CPU_SUPPORTS_HIGHMEM <<
1620 select CPU_SUPPORTS_HUGEPAGES <<
1621 825
1622 config CPU_SB1 826 config CPU_SB1
1623 bool "SB1" 827 bool "SB1"
1624 depends on SYS_HAS_CPU_SB1 <<
1625 select CPU_SUPPORTS_32BIT_KERNEL <<
1626 select CPU_SUPPORTS_64BIT_KERNEL <<
1627 select CPU_SUPPORTS_HIGHMEM <<
1628 select CPU_SUPPORTS_HUGEPAGES <<
1629 select WEAK_ORDERING <<
1630 <<
1631 config CPU_CAVIUM_OCTEON <<
1632 bool "Cavium Octeon processor" <<
1633 depends on SYS_HAS_CPU_CAVIUM_OCTEON <<
1634 select CPU_HAS_PREFETCH <<
1635 select CPU_SUPPORTS_64BIT_KERNEL <<
1636 select HAVE_PAGE_SIZE_8KB if !MIPS_VA <<
1637 select HAVE_PAGE_SIZE_32KB if !MIPS_V <<
1638 select WEAK_ORDERING <<
1639 select CPU_SUPPORTS_HIGHMEM <<
1640 select CPU_SUPPORTS_HUGEPAGES <<
1641 select USB_EHCI_BIG_ENDIAN_MMIO if CP <<
1642 select USB_OHCI_BIG_ENDIAN_MMIO if CP <<
1643 select MIPS_L1_CACHE_SHIFT_7 <<
1644 select CPU_SUPPORTS_VZ <<
1645 help <<
1646 The Cavium Octeon processor is a hi <<
1647 many ethernet hardware widgets for <<
1648 can have up to 16 Mips64v2 cores an <<
1649 Full details can be found at http:/ <<
1650 <<
1651 config CPU_BMIPS <<
1652 bool "Broadcom BMIPS" <<
1653 depends on SYS_HAS_CPU_BMIPS <<
1654 select CPU_MIPS32 <<
1655 select CPU_BMIPS32_3300 if SYS_HAS_CP <<
1656 select CPU_BMIPS4350 if SYS_HAS_CPU_B <<
1657 select CPU_BMIPS4380 if SYS_HAS_CPU_B <<
1658 select CPU_BMIPS5000 if SYS_HAS_CPU_B <<
1659 select CPU_SUPPORTS_32BIT_KERNEL <<
1660 select DMA_NONCOHERENT <<
1661 select IRQ_MIPS_CPU <<
1662 select SWAP_IO_SPACE <<
1663 select WEAK_ORDERING <<
1664 select CPU_SUPPORTS_HIGHMEM <<
1665 select CPU_HAS_PREFETCH <<
1666 select CPU_SUPPORTS_CPUFREQ <<
1667 select MIPS_EXTERNAL_TIMER <<
1668 select GENERIC_IRQ_MIGRATION if HOTPL <<
1669 help <<
1670 Support for BMIPS32/3300/4350/4380 <<
1671 828
1672 endchoice 829 endchoice
1673 830
1674 config LOONGSON3_ENHANCEMENT <<
1675 bool "New Loongson-3 CPU Enhancements <<
1676 default n <<
1677 depends on CPU_LOONGSON64 <<
1678 help <<
1679 New Loongson-3 cores (since Loongso <<
1680 R1, Loongson-3B R1 and Loongson-3B <<
1681 FTLB, L1-VCache, EI/DI/Wait/Prefetc <<
1682 Local register, Read-Inhibit/Execut <<
1683 Fast TLB refill support, etc. <<
1684 <<
1685 This option enable those enhancemen <<
1686 time. If you want a generic kernel <<
1687 please say 'N' here. If you want a <<
1688 new Loongson-3 machines only, pleas <<
1689 <<
1690 config CPU_LOONGSON3_WORKAROUNDS <<
1691 bool "Loongson-3 LLSC Workarounds" <<
1692 default y if SMP <<
1693 depends on CPU_LOONGSON64 <<
1694 help <<
1695 Loongson-3 processors have the llsc <<
1696 Without workarounds the system may <<
1697 <<
1698 Say Y, unless you know what you are <<
1699 <<
1700 config CPU_LOONGSON3_CPUCFG_EMULATION <<
1701 bool "Emulate the CPUCFG instruction <<
1702 default y <<
1703 depends on CPU_LOONGSON64 <<
1704 help <<
1705 Loongson-3A R4 and newer have the C <<
1706 userland to query CPU capabilities, <<
1707 option provides emulation of the in <<
1708 cores, back to Loongson-3A1000. <<
1709 <<
1710 If unsure, please say Y. <<
1711 <<
1712 config CPU_MIPS32_3_5_FEATURES <<
1713 bool "MIPS32 Release 3.5 Features" <<
1714 depends on SYS_HAS_CPU_MIPS32_R3_5 <<
1715 depends on CPU_MIPS32_R2 || CPU_MIPS3 <<
1716 CPU_P5600 <<
1717 help <<
1718 Choose this option to build a kerne <<
1719 MIPS32 architecture including featu <<
1720 support for Enhanced Virtual Addres <<
1721 <<
1722 config CPU_MIPS32_3_5_EVA <<
1723 bool "Enhanced Virtual Addressing (EV <<
1724 depends on CPU_MIPS32_3_5_FEATURES <<
1725 select EVA <<
1726 default y <<
1727 help <<
1728 Choose this option if you want to e <<
1729 Addressing (EVA) on your MIPS32 cor <<
1730 One of its primary benefits is an i <<
1731 of lowmem (up to 3GB). If unsure, s <<
1732 <<
1733 config CPU_MIPS32_R5_FEATURES <<
1734 bool "MIPS32 Release 5 Features" <<
1735 depends on SYS_HAS_CPU_MIPS32_R5 <<
1736 depends on CPU_MIPS32_R2 || CPU_MIPS3 <<
1737 help <<
1738 Choose this option to build a kerne <<
1739 MIPS32 architecture including featu <<
1740 support for Extended Physical Addre <<
1741 <<
1742 config CPU_MIPS32_R5_XPA <<
1743 bool "Extended Physical Addressing (X <<
1744 depends on CPU_MIPS32_R5_FEATURES <<
1745 depends on !EVA <<
1746 depends on !PAGE_SIZE_4KB <<
1747 depends on SYS_SUPPORTS_HIGHMEM <<
1748 select XPA <<
1749 select HIGHMEM <<
1750 select PHYS_ADDR_T_64BIT <<
1751 default n <<
1752 help <<
1753 Choose this option if you want to e <<
1754 Addressing (XPA) on your MIPS32 cor <<
1755 benefit is to increase physical add <<
1756 than 40 bits. Note that this has th <<
1757 64-bit addressing which in turn mak <<
1758 If unsure, say 'N' here. <<
1759 <<
1760 if CPU_LOONGSON2F <<
1761 config CPU_NOP_WORKAROUNDS <<
1762 bool <<
1763 <<
1764 config CPU_JUMP_WORKAROUNDS <<
1765 bool <<
1766 <<
1767 config CPU_LOONGSON2F_WORKAROUNDS <<
1768 bool "Loongson 2F Workarounds" <<
1769 default y <<
1770 select CPU_NOP_WORKAROUNDS <<
1771 select CPU_JUMP_WORKAROUNDS <<
1772 help <<
1773 Loongson 2F01 / 2F02 processors hav <<
1774 require workarounds. Without worka <<
1775 unexpectedly. For more information <<
1776 -mfix-loongson2f-nop and -mfix-loon <<
1777 <<
1778 Loongson 2F03 and later have fixed <<
1779 are needed. The workarounds have n <<
1780 but may decrease the performance of <<
1781 be disabled unless the kernel is in <<
1782 systems. <<
1783 <<
1784 If unsure, please say Y. <<
1785 endif # CPU_LOONGSON2F <<
1786 <<
1787 config SYS_SUPPORTS_ZBOOT <<
1788 bool <<
1789 select HAVE_KERNEL_GZIP <<
1790 select HAVE_KERNEL_BZIP2 <<
1791 select HAVE_KERNEL_LZ4 <<
1792 select HAVE_KERNEL_LZMA <<
1793 select HAVE_KERNEL_LZO <<
1794 select HAVE_KERNEL_XZ <<
1795 select HAVE_KERNEL_ZSTD <<
1796 <<
1797 config SYS_SUPPORTS_ZBOOT_UART16550 <<
1798 bool <<
1799 select SYS_SUPPORTS_ZBOOT <<
1800 <<
1801 config SYS_SUPPORTS_ZBOOT_UART_PROM <<
1802 bool <<
1803 select SYS_SUPPORTS_ZBOOT <<
1804 <<
1805 config CPU_LOONGSON2EF <<
1806 bool <<
1807 select CPU_SUPPORTS_32BIT_KERNEL <<
1808 select CPU_SUPPORTS_64BIT_KERNEL <<
1809 select CPU_SUPPORTS_HIGHMEM <<
1810 select CPU_SUPPORTS_HUGEPAGES <<
1811 <<
1812 config CPU_LOONGSON32 <<
1813 bool <<
1814 select CPU_MIPS32 <<
1815 select CPU_MIPSR2 <<
1816 select CPU_HAS_PREFETCH <<
1817 select CPU_SUPPORTS_32BIT_KERNEL <<
1818 select CPU_SUPPORTS_HIGHMEM <<
1819 select CPU_SUPPORTS_CPUFREQ <<
1820 <<
1821 config CPU_BMIPS32_3300 <<
1822 select SMP_UP if SMP <<
1823 bool <<
1824 <<
1825 config CPU_BMIPS4350 <<
1826 bool <<
1827 select SYS_SUPPORTS_SMP <<
1828 select SYS_SUPPORTS_HOTPLUG_CPU <<
1829 <<
1830 config CPU_BMIPS4380 <<
1831 bool <<
1832 select MIPS_L1_CACHE_SHIFT_6 <<
1833 select SYS_SUPPORTS_SMP <<
1834 select SYS_SUPPORTS_HOTPLUG_CPU <<
1835 select CPU_HAS_RIXI <<
1836 <<
1837 config CPU_BMIPS5000 <<
1838 bool <<
1839 select MIPS_CPU_SCACHE <<
1840 select MIPS_L1_CACHE_SHIFT_7 <<
1841 select SYS_SUPPORTS_SMP <<
1842 select SYS_SUPPORTS_HOTPLUG_CPU <<
1843 select CPU_HAS_RIXI <<
1844 <<
1845 config SYS_HAS_CPU_LOONGSON64 <<
1846 bool <<
1847 select CPU_SUPPORTS_CPUFREQ <<
1848 select CPU_HAS_RIXI <<
1849 <<
1850 config SYS_HAS_CPU_LOONGSON2E <<
1851 bool <<
1852 <<
1853 config SYS_HAS_CPU_LOONGSON2F <<
1854 bool <<
1855 select CPU_SUPPORTS_CPUFREQ <<
1856 select CPU_SUPPORTS_ADDRWINCFG if 64B <<
1857 <<
1858 config SYS_HAS_CPU_LOONGSON1B <<
1859 bool <<
1860 <<
1861 config SYS_HAS_CPU_LOONGSON1C <<
1862 bool <<
1863 <<
1864 config SYS_HAS_CPU_MIPS32_R1 <<
1865 bool <<
1866 <<
1867 config SYS_HAS_CPU_MIPS32_R2 <<
1868 bool <<
1869 <<
1870 config SYS_HAS_CPU_MIPS32_R3_5 <<
1871 bool <<
1872 <<
1873 config SYS_HAS_CPU_MIPS32_R5 <<
1874 bool <<
1875 <<
1876 config SYS_HAS_CPU_MIPS32_R6 <<
1877 bool <<
1878 <<
1879 config SYS_HAS_CPU_MIPS64_R1 <<
1880 bool <<
1881 <<
1882 config SYS_HAS_CPU_MIPS64_R2 <<
1883 bool <<
1884 <<
1885 config SYS_HAS_CPU_MIPS64_R5 <<
1886 bool <<
1887 <<
1888 config SYS_HAS_CPU_MIPS64_R6 <<
1889 bool <<
1890 <<
1891 config SYS_HAS_CPU_P5600 <<
1892 bool <<
1893 <<
1894 config SYS_HAS_CPU_R3000 <<
1895 bool <<
1896 <<
1897 config SYS_HAS_CPU_R4300 <<
1898 bool <<
1899 <<
1900 config SYS_HAS_CPU_R4X00 <<
1901 bool <<
1902 <<
1903 config SYS_HAS_CPU_TX49XX <<
1904 bool <<
1905 <<
1906 config SYS_HAS_CPU_R5000 <<
1907 bool <<
1908 <<
1909 config SYS_HAS_CPU_R5500 <<
1910 bool <<
1911 <<
1912 config SYS_HAS_CPU_NEVADA <<
1913 bool <<
1914 <<
1915 config SYS_HAS_CPU_R10000 <<
1916 bool <<
1917 <<
1918 config SYS_HAS_CPU_RM7000 <<
1919 bool <<
1920 <<
1921 config SYS_HAS_CPU_SB1 <<
1922 bool <<
1923 <<
1924 config SYS_HAS_CPU_CAVIUM_OCTEON <<
1925 bool <<
1926 <<
1927 config SYS_HAS_CPU_BMIPS <<
1928 bool <<
1929 <<
1930 config SYS_HAS_CPU_BMIPS32_3300 <<
1931 bool <<
1932 select SYS_HAS_CPU_BMIPS <<
1933 <<
1934 config SYS_HAS_CPU_BMIPS4350 <<
1935 bool <<
1936 select SYS_HAS_CPU_BMIPS <<
1937 <<
1938 config SYS_HAS_CPU_BMIPS4380 <<
1939 bool <<
1940 select SYS_HAS_CPU_BMIPS <<
1941 <<
1942 config SYS_HAS_CPU_BMIPS5000 <<
1943 bool <<
1944 select SYS_HAS_CPU_BMIPS <<
1945 <<
1946 # <<
1947 # CPU may reorder R->R, R->W, W->R, W->W <<
1948 # Reordering beyond LL and SC is handled in W <<
1949 # <<
1950 config WEAK_ORDERING <<
1951 bool <<
1952 <<
1953 # <<
1954 # CPU may reorder reads and writes beyond LL/ <<
1955 # CPU may reorder R->LL, R->LL, W->LL, W->LL, <<
1956 # <<
1957 config WEAK_REORDERING_BEYOND_LLSC <<
1958 bool <<
1959 endmenu <<
1960 <<
1961 # <<
1962 # These two indicate any level of the MIPS32 <<
1963 # <<
1964 config CPU_MIPS32 <<
1965 bool <<
1966 default y if CPU_MIPS32_R1 || CPU_MIP <<
1967 CPU_MIPS32_R6 || CPU_P56 <<
1968 <<
1969 config CPU_MIPS64 <<
1970 bool <<
1971 default y if CPU_MIPS64_R1 || CPU_MIP <<
1972 CPU_MIPS64_R6 || CPU_LOO <<
1973 <<
1974 # <<
1975 # These indicate the revision of the architec <<
1976 # <<
1977 config CPU_MIPSR1 <<
1978 bool <<
1979 default y if CPU_MIPS32_R1 || CPU_MIP <<
1980 <<
1981 config CPU_MIPSR2 <<
1982 bool <<
1983 default y if CPU_MIPS32_R2 || CPU_MIP <<
1984 select CPU_HAS_RIXI <<
1985 select CPU_HAS_DIEI if !CPU_DIEI_BROK <<
1986 select MIPS_SPRAM <<
1987 <<
1988 config CPU_MIPSR5 <<
1989 bool <<
1990 default y if CPU_MIPS32_R5 || CPU_MIP <<
1991 select CPU_HAS_RIXI <<
1992 select CPU_HAS_DIEI if !CPU_DIEI_BROK <<
1993 select MIPS_SPRAM <<
1994 <<
1995 config CPU_MIPSR6 <<
1996 bool <<
1997 default y if CPU_MIPS32_R6 || CPU_MIP <<
1998 select CPU_HAS_RIXI <<
1999 select CPU_HAS_DIEI if !CPU_DIEI_BROK <<
2000 select HAVE_ARCH_BITREVERSE <<
2001 select MIPS_ASID_BITS_VARIABLE <<
2002 select MIPS_CRC_SUPPORT <<
2003 select MIPS_SPRAM <<
2004 <<
2005 config TARGET_ISA_REV <<
2006 int <<
2007 default 1 if CPU_MIPSR1 <<
2008 default 2 if CPU_MIPSR2 <<
2009 default 5 if CPU_MIPSR5 <<
2010 default 6 if CPU_MIPSR6 <<
2011 default 0 <<
2012 help <<
2013 Reflects the ISA revision being tar <<
2014 is effectively the Kconfig equivale <<
2015 <<
2016 config EVA <<
2017 bool <<
2018 <<
2019 config XPA <<
2020 bool <<
2021 <<
2022 config SYS_SUPPORTS_32BIT_KERNEL <<
2023 bool <<
2024 config SYS_SUPPORTS_64BIT_KERNEL <<
2025 bool <<
2026 config CPU_SUPPORTS_32BIT_KERNEL <<
2027 bool <<
2028 config CPU_SUPPORTS_64BIT_KERNEL <<
2029 bool <<
2030 config CPU_SUPPORTS_CPUFREQ <<
2031 bool <<
2032 config CPU_SUPPORTS_ADDRWINCFG <<
2033 bool <<
2034 config CPU_SUPPORTS_HUGEPAGES <<
2035 bool <<
2036 depends on !(32BIT && (PHYS_ADDR_T_64 <<
2037 config CPU_SUPPORTS_VZ <<
2038 bool <<
2039 config MIPS_PGD_C0_CONTEXT <<
2040 bool <<
2041 depends on 64BIT <<
2042 default y if (CPU_MIPSR2 || CPU_MIPSR <<
2043 <<
2044 # <<
2045 # Set to y for ptrace access to watch registe <<
2046 # <<
2047 config HARDWARE_WATCHPOINTS <<
2048 bool <<
2049 default y if CPU_MIPSR1 || CPU_MIPSR2 <<
2050 <<
2051 menu "Kernel type" <<
2052 <<
2053 choice <<
2054 prompt "Kernel code model" <<
2055 help <<
2056 You should only select this option <<
2057 actually benefits from 64-bit proce <<
2058 large memory. You will only be pre <<
2059 menu if your system does not suppor <<
2060 <<
2061 config 32BIT <<
2062 bool "32-bit kernel" <<
2063 depends on CPU_SUPPORTS_32BIT_KERNEL <<
2064 select TRAD_SIGNALS <<
2065 help <<
2066 Select this option if you want to b <<
2067 <<
2068 config 64BIT <<
2069 bool "64-bit kernel" <<
2070 depends on CPU_SUPPORTS_64BIT_KERNEL <<
2071 help <<
2072 Select this option if you want to b <<
2073 <<
2074 endchoice <<
2075 <<
2076 config MIPS_VA_BITS_48 <<
2077 bool "48 bits virtual memory" <<
2078 depends on 64BIT <<
2079 help <<
2080 Support a maximum at least 48 bits <<
2081 memory. Default is 40 bits or less <<
2082 For page sizes 16k and above, this <<
2083 memory overhead for page tables. F <<
2084 level of page tables is added which <<
2085 overhead as well as slower TLB faul <<
2086 <<
2087 If unsure, say N. <<
2088 <<
2089 config ZBOOT_LOAD_ADDRESS <<
2090 hex "Compressed kernel load address" <<
2091 default 0xffffffff80400000 if BCM47XX <<
2092 default 0x0 <<
2093 depends on SYS_SUPPORTS_ZBOOT <<
2094 help <<
2095 The address to load compressed kern <<
2096 <<
2097 This is only used if non-zero. <<
2098 <<
2099 config ARCH_FORCE_MAX_ORDER <<
2100 int "Maximum zone order" <<
2101 default "13" if MIPS_HUGE_TLB_SUPPORT <<
2102 default "12" if MIPS_HUGE_TLB_SUPPORT <<
2103 default "11" if MIPS_HUGE_TLB_SUPPORT <<
2104 default "10" <<
2105 help <<
2106 The kernel memory allocator divides <<
2107 blocks into "zones", where each zon <<
2108 pages. This option selects the lar <<
2109 keeps in the memory allocator. If <<
2110 blocks of physically contiguous mem <<
2111 increase this value. <<
2112 <<
2113 The page size is not necessarily 4K <<
2114 when choosing a value for this opti <<
2115 <<
2116 config BOARD_SCACHE <<
2117 bool <<
2118 <<
2119 config IP22_CPU_SCACHE <<
2120 bool <<
2121 select BOARD_SCACHE <<
2122 <<
2123 # <<
2124 # Support for a MIPS32 / MIPS64 style S-cache <<
2125 # <<
2126 config MIPS_CPU_SCACHE <<
2127 bool <<
2128 select BOARD_SCACHE <<
2129 <<
2130 config R5000_CPU_SCACHE 831 config R5000_CPU_SCACHE
2131 bool 832 bool
2132 select BOARD_SCACHE !! 833 depends on CPU_NEVADA || CPU_R5000
>> 834 default y if SGI_IP22 || SGI_IP32 || LASAT
2133 835
2134 config RM7000_CPU_SCACHE !! 836 config BOARD_SCACHE
2135 bool 837 bool
2136 select BOARD_SCACHE !! 838 depends on CPU_NEVADA || CPU_R4X00 || CPU_R5000
>> 839 default y if SGI_IP22 || (SGI_IP32 && CPU_R5000) || R5000_CPU_SCACHE
2137 840
2138 config SIBYTE_DMA_PAGEOPS 841 config SIBYTE_DMA_PAGEOPS
2139 bool "Use DMA to clear/copy pages" 842 bool "Use DMA to clear/copy pages"
2140 depends on CPU_SB1 843 depends on CPU_SB1
2141 help 844 help
2142 Instead of using the CPU to zero an 845 Instead of using the CPU to zero and copy pages, use a Data Mover
2143 channel. These DMA channels are ot 846 channel. These DMA channels are otherwise unused by the standard
2144 SiByte Linux port. Seems to give a 847 SiByte Linux port. Seems to give a small performance benefit.
2145 848
2146 config CPU_HAS_PREFETCH 849 config CPU_HAS_PREFETCH
2147 bool !! 850 bool "Enable prefetches" if CPU_SB1 && !CPU_SB1_PASS_2
>> 851 default y if CPU_RM7000 || CPU_MIPS64 || CPU_MIPS32
2148 852
2149 config CPU_GENERIC_DUMP_TLB !! 853 config VTAG_ICACHE
2150 bool !! 854 bool "Support for Virtual Tagged I-cache" if CPU_MIPS64 || CPU_MIPS32
2151 default y if !CPU_R3000 !! 855 default y if CPU_SB1
2152 <<
2153 config MIPS_FP_SUPPORT <<
2154 bool "Floating Point support" if EXPE <<
2155 default y <<
2156 help <<
2157 Select y to include support for flo <<
2158 including initialization of FPU har <<
2159 and emulation of an FPU where neces <<
2160 userland program attempting to use <<
2161 receive a SIGILL. <<
2162 <<
2163 If you know that your userland will <<
2164 instructions then you can say n her <<
2165 <<
2166 If unsure, say y. <<
2167 <<
2168 config CPU_R2300_FPU <<
2169 bool <<
2170 depends on MIPS_FP_SUPPORT <<
2171 default y if CPU_R3000 <<
2172 <<
2173 config CPU_R3K_TLB <<
2174 bool <<
2175 856
2176 config CPU_R4K_FPU !! 857 choice
2177 bool !! 858 prompt "SB1 Pass"
2178 depends on MIPS_FP_SUPPORT !! 859 depends on CPU_SB1
2179 default y if !CPU_R2300_FPU !! 860 default CPU_SB1_PASS_1
2180 <<
2181 config CPU_R4K_CACHE_TLB <<
2182 bool <<
2183 default y if !(CPU_R3K_TLB || CPU_SB1 <<
2184 <<
2185 config MIPS_MT_SMP <<
2186 bool "MIPS MT SMP support (1 TC on ea <<
2187 default y <<
2188 depends on TARGET_ISA_REV > 0 && TARG <<
2189 depends on SYS_SUPPORTS_MULTITHREADIN <<
2190 select CPU_MIPSR2_IRQ_VI <<
2191 select CPU_MIPSR2_IRQ_EI <<
2192 select SYNC_R4K <<
2193 select MIPS_MT <<
2194 select SMP <<
2195 select SMP_UP <<
2196 select SYS_SUPPORTS_SMP <<
2197 select SYS_SUPPORTS_SCHED_SMT <<
2198 select MIPS_PERF_SHARED_TC_COUNTERS <<
2199 help <<
2200 This is a kernel model which is kno <<
2201 on cores with the MT ASE and uses t <<
2202 virtual processors which supports S <<
2203 Intel Hyperthreading feature. For f <<
2204 <http://www.imgtec.com/mips/mips-mu <<
2205 <<
2206 config MIPS_MT <<
2207 bool <<
2208 <<
2209 config SCHED_SMT <<
2210 bool "SMT (multithreading) scheduler <<
2211 depends on SYS_SUPPORTS_SCHED_SMT <<
2212 default n <<
2213 help <<
2214 SMT scheduler support improves the <<
2215 when dealing with MIPS MT enabled c <<
2216 increased overhead in some places. <<
2217 <<
2218 config SYS_SUPPORTS_SCHED_SMT <<
2219 bool <<
2220 <<
2221 config SYS_SUPPORTS_MULTITHREADING <<
2222 bool <<
2223 861
2224 config MIPS_MT_FPAFF !! 862 config CPU_SB1_PASS_1
2225 bool "Dynamic FPU affinity for FP-int !! 863 bool "Pass1"
2226 default y <<
2227 depends on MIPS_MT_SMP <<
2228 864
2229 config MIPSR2_TO_R6_EMULATOR !! 865 config CPU_SB1_PASS_2
2230 bool "MIPS R2-to-R6 emulator" !! 866 bool "Pass2"
2231 depends on CPU_MIPSR6 <<
2232 depends on MIPS_FP_SUPPORT <<
2233 default y <<
2234 help <<
2235 Choose this option if you want to r <<
2236 Even if you say 'Y' here, the emula <<
2237 default. You can enable it using th <<
2238 The only reason this is a build-tim <<
2239 final kernel image. <<
2240 867
2241 config SYS_SUPPORTS_VPE_LOADER !! 868 config CPU_SB1_PASS_2_2
2242 bool !! 869 bool "Pass2.2"
2243 depends on SYS_SUPPORTS_MULTITHREADIN <<
2244 help <<
2245 Indicates that the platform support <<
2246 physical_memsize. <<
2247 870
2248 config MIPS_VPE_LOADER !! 871 endchoice
2249 bool "VPE loader support." <<
2250 depends on SYS_SUPPORTS_VPE_LOADER && <<
2251 select CPU_MIPSR2_IRQ_VI <<
2252 select CPU_MIPSR2_IRQ_EI <<
2253 select MIPS_MT <<
2254 help <<
2255 Includes a loader for loading an el <<
2256 onto another VPE and running it. <<
2257 872
2258 config MIPS_VPE_LOADER_MT !! 873 config SB1_PASS_1_WORKAROUNDS
2259 bool 874 bool
2260 default "y" !! 875 depends on CPU_SB1_PASS_1
2261 depends on MIPS_VPE_LOADER <<
2262 <<
2263 config MIPS_VPE_LOADER_TOM <<
2264 bool "Load VPE program into memory hi <<
2265 depends on MIPS_VPE_LOADER <<
2266 default y 876 default y
2267 help <<
2268 The loader can use memory that is p <<
2269 Linux using the kernel command line <<
2270 you to ensure the amount you put in <<
2271 program requires is less or equal t <<
2272 <<
2273 config MIPS_VPE_APSP_API <<
2274 bool "Enable support for AP/SP API (R <<
2275 depends on MIPS_VPE_LOADER <<
2276 <<
2277 config MIPS_VPE_APSP_API_MT <<
2278 bool <<
2279 default "y" <<
2280 depends on MIPS_VPE_APSP_API <<
2281 <<
2282 config MIPS_CPS <<
2283 bool "MIPS Coherent Processing System <<
2284 depends on SYS_SUPPORTS_MIPS_CPS <<
2285 select MIPS_CM <<
2286 select MIPS_CPS_PM if HOTPLUG_CPU <<
2287 select SMP <<
2288 select HOTPLUG_CORE_SYNC_DEAD if HOTP <<
2289 select SYNC_R4K if (CEVT_R4K || CSRC_ <<
2290 select SYS_SUPPORTS_HOTPLUG_CPU <<
2291 select SYS_SUPPORTS_SCHED_SMT if CPU_ <<
2292 select SYS_SUPPORTS_SMP <<
2293 select WEAK_ORDERING <<
2294 select GENERIC_IRQ_MIGRATION if HOTPL <<
2295 help <<
2296 Select this if you wish to run an S <<
2297 within a MIPS Coherent Processing S <<
2298 enabled the kernel will probe for o <<
2299 no external assistance. It is safe <<
2300 support is unavailable. <<
2301 <<
2302 config MIPS_CPS_PM <<
2303 depends on MIPS_CPS <<
2304 bool <<
2305 <<
2306 config MIPS_CM <<
2307 bool <<
2308 select MIPS_CPC <<
2309 <<
2310 config MIPS_CPC <<
2311 bool <<
2312 877
2313 config SB1_PASS_2_WORKAROUNDS 878 config SB1_PASS_2_WORKAROUNDS
2314 bool 879 bool
2315 depends on CPU_SB1 && (CPU_SB1_PASS_2 880 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2316 default y 881 default y
2317 882
2318 config SB1_PASS_2_1_WORKAROUNDS !! 883 # Avoid prefetches on Pass 2 (before 2.2)
2319 bool !! 884 # XXXKW for now, let 2.2 use same WORKAROUNDS flag as pre-2.2
2320 depends on CPU_SB1 && CPU_SB1_PASS_2 !! 885 config SB1_CACHE_ERROR
2321 default y !! 886 bool "Support for SB1 Cache Error handler"
2322 !! 887 depends on CPU_SB1
2323 choice <<
2324 prompt "SmartMIPS or microMIPS ASE su <<
2325 <<
2326 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS <<
2327 bool "None" <<
2328 help <<
2329 Select this if you want neither mic <<
2330 <<
2331 config CPU_HAS_SMARTMIPS <<
2332 depends on SYS_SUPPORTS_SMARTMIPS <<
2333 bool "SmartMIPS" <<
2334 help <<
2335 SmartMIPS is a extension of the MIP <<
2336 increased security at both hardware <<
2337 smartcards. Enabling this option w <<
2338 SmartMIPS instructions by Linux app <<
2339 this option will not work on a MIPS <<
2340 you don't know you probably don't h <<
2341 here. <<
2342 <<
2343 config CPU_MICROMIPS <<
2344 depends on 32BIT && SYS_SUPPORTS_MICR <<
2345 bool "microMIPS" <<
2346 help <<
2347 When this option is enabled the ker <<
2348 microMIPS ISA <<
2349 <<
2350 endchoice <<
2351 888
2352 config CPU_HAS_MSA !! 889 config SB1_CERR_IGNORE_RECOVERABLE
2353 bool "Support for the MIPS SIMD Archi !! 890 bool "Ignore recoverable cache errors"
2354 depends on CPU_SUPPORTS_MSA !! 891 depends on SB1_CACHE_ERROR
2355 depends on MIPS_FP_SUPPORT !! 892
2356 depends on 64BIT || MIPS_O32_FP64_SUP !! 893 config SB1_CERR_SPIN
2357 help !! 894 bool "Spin instead of running handler"
2358 MIPS SIMD Architecture (MSA) introd !! 895 depends on SB1_CACHE_ERROR
2359 and a set of SIMD instructions to o !! 896
2360 is enabled the kernel will support !! 897 config 64BIT_PHYS_ADDR
2361 vector register contexts. If you kn !! 898 bool "Support for 64-bit physical address space"
2362 running on CPUs which do not suppor !! 899 depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32 || CPU_MIPS64) && MIPS32
2363 not be making use of it then you ma !! 900
2364 the size & complexity of your kerne !! 901 config CPU_ADVANCED
2365 !! 902 bool "Override CPU Options"
2366 If unsure, say Y. !! 903 depends on MIPS32
>> 904 help
>> 905 Saying yes here allows you to select support for various features
>> 906 your CPU may or may not have. Most people should say N here.
>> 907
>> 908 config CPU_HAS_LLSC
>> 909 bool "ll/sc Instructions available" if CPU_ADVANCED
>> 910 default y if !CPU_ADVANCED && !CPU_R3000 && !CPU_VR41XX && !CPU_TX39XX
>> 911 help
>> 912 MIPS R4000 series and later provide the Load Linked (ll)
>> 913 and Store Conditional (sc) instructions. More information is
>> 914 available at <http://www.go-ecs.com/mips/miptek1.htm>.
>> 915
>> 916 Say Y here if your CPU has the ll and sc instructions. Say Y here
>> 917 for better performance, N if you don't know. You must say Y here
>> 918 for multiprocessor machines.
>> 919
>> 920 config CPU_HAS_LLDSCD
>> 921 bool "lld/scd Instructions available" if CPU_ADVANCED
>> 922 default y if !CPU_ADVANCED && !CPU_R3000 && !CPU_VR41XX && !CPU_TX39XX && !CPU_MIPS32
>> 923 help
>> 924 Say Y here if your CPU has the lld and scd instructions, the 64-bit
>> 925 equivalents of ll and sc. Say Y here for better performance, N if
>> 926 you don't know. You must say Y here for multiprocessor machines.
2367 927
2368 config CPU_HAS_WB 928 config CPU_HAS_WB
2369 bool !! 929 bool "Writeback Buffer available" if CPU_ADVANCED
2370 !! 930 default y if !CPU_ADVANCED && (CPU_R3000 || CPU_VR41XX || CPU_TX39XX) && DECSTATION
2371 config XKS01 <<
2372 bool <<
2373 <<
2374 config CPU_HAS_DIEI <<
2375 depends on !CPU_DIEI_BROKEN <<
2376 bool <<
2377 <<
2378 config CPU_DIEI_BROKEN <<
2379 bool <<
2380 <<
2381 config CPU_HAS_RIXI <<
2382 bool <<
2383 <<
2384 config CPU_NO_LOAD_STORE_LR <<
2385 bool <<
2386 help 931 help
2387 CPU lacks support for unaligned loa !! 932 Say N here for slightly better performance. You must say Y here for
2388 LWL, LWR, SWL, SWR (Load/store word !! 933 machines which require flushing of write buffers in software. Saying
2389 LDL, LDR, SDL, SDR (Load/store doub !! 934 Y is the safe option; N may result in kernel malfunction and crashes.
2390 systems). <<
2391 <<
2392 # <<
2393 # Vectored interrupt mode is an R2 feature <<
2394 # <<
2395 config CPU_MIPSR2_IRQ_VI <<
2396 bool <<
2397 <<
2398 # <<
2399 # Extended interrupt mode is an R2 feature <<
2400 # <<
2401 config CPU_MIPSR2_IRQ_EI <<
2402 bool <<
2403 935
2404 config CPU_HAS_SYNC 936 config CPU_HAS_SYNC
2405 bool 937 bool
2406 depends on !CPU_R3000 938 depends on !CPU_R3000
2407 default y 939 default y
2408 940
2409 # 941 #
2410 # CPU non-features <<
2411 # <<
2412 <<
2413 # Work around the "daddi" and "daddiu" CPU er <<
2414 # <<
2415 # - The `daddi' instruction fails to trap on <<
2416 # "MIPS R4000PC/SC Errata, Processor Revisi <<
2417 # erratum #23 <<
2418 # <<
2419 # - The `daddiu' instruction can produce an i <<
2420 # "MIPS R4000PC/SC Errata, Processor Revisi <<
2421 # erratum #41 <<
2422 # "MIPS R4000MC Errata, Processor Revision <<
2423 # #15 <<
2424 # "MIPS R4400PC/SC Errata, Processor Revisi <<
2425 # "MIPS R4400MC Errata, Processor Revision <<
2426 config CPU_DADDI_WORKAROUNDS <<
2427 bool <<
2428 <<
2429 # Work around certain R4000 CPU errata (as im <<
2430 # <<
2431 # - A double-word or a variable shift may giv <<
2432 # if executed immediately after starting an <<
2433 # "MIPS R4000PC/SC Errata, Processor Revisi <<
2434 # erratum #28 <<
2435 # "MIPS R4000MC Errata, Processor Revision <<
2436 # #19 <<
2437 # <<
2438 # - A double-word or a variable shift may giv <<
2439 # if executed while an integer multiplicati <<
2440 # "MIPS R4000PC/SC Errata, Processor Revisi <<
2441 # errata #16 & #28 <<
2442 # <<
2443 # - An integer division may give an incorrect <<
2444 # a delay slot of a taken branch or a jump: <<
2445 # "MIPS R4000PC/SC Errata, Processor Revisi <<
2446 # erratum #52 <<
2447 config CPU_R4000_WORKAROUNDS <<
2448 bool <<
2449 select CPU_R4400_WORKAROUNDS <<
2450 <<
2451 # Work around certain R4400 CPU errata (as im <<
2452 # <<
2453 # - A double-word or a variable shift may giv <<
2454 # if executed immediately after starting an <<
2455 # "MIPS R4400MC Errata, Processor Revision <<
2456 # "MIPS R4400MC Errata, Processor Revision <<
2457 config CPU_R4400_WORKAROUNDS <<
2458 bool <<
2459 <<
2460 config CPU_R4X00_BUGS64 <<
2461 bool <<
2462 default y if SYS_HAS_CPU_R4X00 && 64B <<
2463 <<
2464 config MIPS_ASID_SHIFT <<
2465 int <<
2466 default 6 if CPU_R3000 <<
2467 default 0 <<
2468 <<
2469 config MIPS_ASID_BITS <<
2470 int <<
2471 default 0 if MIPS_ASID_BITS_VARIABLE <<
2472 default 6 if CPU_R3000 <<
2473 default 8 <<
2474 <<
2475 config MIPS_ASID_BITS_VARIABLE <<
2476 bool <<
2477 <<
2478 config MIPS_CRC_SUPPORT <<
2479 bool <<
2480 <<
2481 # R4600 erratum. Due to the lack of errata i <<
2482 # technical details aren't known. I've exper <<
2483 # interrupts during indexed I-cache flushes s <<
2484 # with the issue. <<
2485 config WAR_R4600_V1_INDEX_ICACHEOP <<
2486 bool <<
2487 <<
2488 # Pleasures of the R4600 V1.x. Cite from the <<
2489 # <<
2490 # 18. The CACHE instructions Hit_Writeback_I <<
2491 # Hit_Invalidate_D and Create_Dirty_Excl <<
2492 # executed if there is no other dcache a <<
2493 # accessed for another instruction immed <<
2494 # cache instructions are executing, it i <<
2495 # tag match outputs used by these cache <<
2496 # incorrect. These cache instructions sh <<
2497 # four instructions that are not any kin <<
2498 # instruction. <<
2499 # <<
2500 # This is not allowed: lw <<
2501 # nop <<
2502 # nop <<
2503 # nop <<
2504 # cache Hi <<
2505 # <<
2506 # This is allowed: lw <<
2507 # nop <<
2508 # nop <<
2509 # nop <<
2510 # nop <<
2511 # cache Hi <<
2512 config WAR_R4600_V1_HIT_CACHEOP <<
2513 bool <<
2514 <<
2515 # Writeback and invalidate the primary cache <<
2516 # <<
2517 # R4600 v2.0 bug: "The CACHE instructions Hit <<
2518 # Hit_Writeback_D, Hit_Invalidate_D and Creat <<
2519 # operate correctly if the internal data cach <<
2520 # CACHE instructions should be separated from <<
2521 # by a load instruction to an uncached addres <<
2522 # (Revision 2.0 device errata from IDT availa <<
2523 # in .pdf format.) <<
2524 config WAR_R4600_V2_HIT_CACHEOP <<
2525 bool <<
2526 <<
2527 # From TX49/H2 manual: "If the instruction (i <<
2528 # the line which this instruction itself exis <<
2529 # operation is not guaranteed." <<
2530 # <<
2531 # Workaround: do two phase flushing for Index <<
2532 config WAR_TX49XX_ICACHE_INDEX_INV <<
2533 bool <<
2534 <<
2535 # The RM7000 processors and the E9000 cores h <<
2536 # opposes it being called that) where invalid <<
2537 # I-cache line worth of instructions being fe <<
2538 # exceptions. <<
2539 config WAR_ICACHE_REFILLS <<
2540 bool <<
2541 <<
2542 # On the R10000 up to version 2.6 (not sure a <<
2543 # may cause ll / sc and lld / scd sequences t <<
2544 config WAR_R10000_LLSC <<
2545 bool <<
2546 <<
2547 # 34K core erratum: "Problems Executing the T <<
2548 config WAR_MIPS34K_MISSED_ITLB <<
2549 bool <<
2550 <<
2551 # <<
2552 # - Highmem only makes sense for the 32-bit k 942 # - Highmem only makes sense for the 32-bit kernel.
2553 # - The current highmem code will only work p 943 # - The current highmem code will only work properly on physically indexed
2554 # caches such as R3000, SB1, R7000 or those 944 # caches such as R3000, SB1, R7000 or those that look like they're virtually
2555 # indexed such as R4000/R4400 SC and MC ver 945 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2556 # moment we protect the user and offer the 946 # moment we protect the user and offer the highmem option only on machines
2557 # where it's known to be safe. This will n 947 # where it's known to be safe. This will not offer highmem on a few systems
2558 # such as MIPS32 and MIPS64 CPUs which may 948 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2559 # indexed CPUs but we're playing safe. 949 # indexed CPUs but we're playing safe.
2560 # - We use SYS_SUPPORTS_HIGHMEM to offer high !! 950 # - We should not offer highmem for system of which we already know that they
2561 # know they might have memory configuration !! 951 # don't have memory configurations that could gain from highmem support in
2562 # support. !! 952 # the kernel because they don't support configurations with RAM at physical
>> 953 # addresses > 0x20000000.
2563 # 954 #
2564 config HIGHMEM 955 config HIGHMEM
2565 bool "High Memory Support" 956 bool "High Memory Support"
2566 depends on 32BIT && CPU_SUPPORTS_HIGH !! 957 depends on MIPS32 && (CPU_R3000 || CPU_SB1 || CPU_R7000 || CPU_R10000) && !(BAGET_MIPS || DECSTATION)
2567 select KMAP_LOCAL <<
2568 958
2569 config CPU_SUPPORTS_HIGHMEM !! 959 config SMP
2570 bool !! 960 bool "Multi-Processing support"
2571 !! 961 depends on SIBYTE_SB1xxx_SOC && SIBYTE_SB1250 && !SIBYTE_STANDALONE || SGI_IP27
2572 config SYS_SUPPORTS_HIGHMEM !! 962 ---help---
2573 bool !! 963 This enables support for systems with more than one CPU. If you have
>> 964 a system with only one CPU, like most personal computers, say N. If
>> 965 you have a system with more than one CPU, say Y.
2574 966
2575 config SYS_SUPPORTS_SMARTMIPS !! 967 If you say N here, the kernel will run on single and multiprocessor
2576 bool !! 968 machines, but will use only one CPU of a multiprocessor machine. If
>> 969 you say Y here, the kernel will run on many, but not all,
>> 970 singleprocessor machines. On a singleprocessor machine, the kernel
>> 971 will run faster if you say N here.
2577 972
2578 config SYS_SUPPORTS_MICROMIPS !! 973 People using multiprocessor machines who say Y here should also say
2579 bool !! 974 Y to "Enhanced Real Time Clock Support", below.
2580 975
2581 config SYS_SUPPORTS_MIPS16 !! 976 See also the <file:Documentation/smp.tex>,
2582 bool !! 977 <file:Documentation/smp.txt> and the SMP-HOWTO available at
2583 help !! 978 <http://www.tldp.org/docs.html#howto>.
2584 This option must be set if a kernel <<
2585 enabled CPU even if MIPS16 is not a <<
2586 words, it makes the kernel MIPS16-t <<
2587 979
2588 config CPU_SUPPORTS_MSA !! 980 If you don't know what to do here, say N.
2589 bool <<
2590 981
2591 config ARCH_FLATMEM_ENABLE !! 982 config NR_CPUS
2592 def_bool y !! 983 int "Maximum number of CPUs (2-32)"
2593 depends on !NUMA && !CPU_LOONGSON2EF !! 984 depends on SMP
>> 985 default "32"
>> 986 help
>> 987 This allows you to specify the maximum number of CPUs which this
>> 988 kernel will support. The maximum supported value is 32 and the
>> 989 minimum value which makes sense is 2.
2594 990
2595 config ARCH_SPARSEMEM_ENABLE !! 991 This is purely to save memory - each supported CPU adds
2596 bool !! 992 approximately eight kilobytes to the kernel image.
2597 993
2598 config NUMA !! 994 config PREEMPT
2599 bool "NUMA Support" !! 995 bool "Preemptible Kernel"
2600 depends on SYS_SUPPORTS_NUMA <<
2601 select SMP <<
2602 select HAVE_SETUP_PER_CPU_AREA <<
2603 select NEED_PER_CPU_EMBED_FIRST_CHUNK <<
2604 help 996 help
2605 Say Y to compile the kernel to supp !! 997 This option reduces the latency of the kernel when reacting to
2606 Access). This option improves perf !! 998 real-time or interactive events by allowing a low priority process to
2607 than two nodes; on two node systems !! 999 be preempted even if it is in kernel mode executing a system call.
2608 leave it disabled; on single node s !! 1000 This allows applications to run more reliably even when the system is
2609 disabled. !! 1001 under load.
>> 1002
>> 1003 config DEBUG_SPINLOCK_SLEEP
>> 1004 bool "Sleep-inside-spinlock checking"
>> 1005 help
>> 1006 If you say Y here, various routines which may sleep will become very
>> 1007 noisy if they are called with a spinlock held.
>> 1008
>> 1009 config RTC_DS1742
>> 1010 bool "DS1742 BRAM/RTC support"
>> 1011 depends on TOSHIBA_JMR3927 || TOSHIBA_RBTX4927
>> 1012
>> 1013 config MIPS_INSANE_LARGE
>> 1014 bool "Support for large 64-bit configurations"
>> 1015 depends on CPU_R10000 && MIPS64
>> 1016 help
>> 1017 MIPS R10000 does support a 44 bit / 16TB address space as opposed to
>> 1018 previous 64-bit processors which only supported 40 bit / 1TB. If you
>> 1019 need processes of more than 1TB virtual address space, say Y here.
>> 1020 This will result in additional memory usage, so it is not
>> 1021 recommended for normal users.
2610 1022
2611 config SYS_SUPPORTS_NUMA !! 1023 config RWSEM_GENERIC_SPINLOCK
2612 bool 1024 bool
>> 1025 default y
2613 1026
2614 config RELOCATABLE !! 1027 endmenu
2615 bool "Relocatable kernel" <<
2616 depends on SYS_SUPPORTS_RELOCATABLE <<
2617 depends on CPU_MIPS32_R2 || CPU_MIPS6 <<
2618 CPU_MIPS32_R5 || CPU_MIPS6 <<
2619 CPU_MIPS32_R6 || CPU_MIPS6 <<
2620 CPU_P5600 || CAVIUM_OCTEON <<
2621 CPU_LOONGSON64 <<
2622 help <<
2623 This builds a kernel image that ret <<
2624 so it can be loaded someplace besid <<
2625 The relocations make the kernel bin <<
2626 but are discarded at runtime <<
2627 <<
2628 config RELOCATION_TABLE_SIZE <<
2629 hex "Relocation table size" <<
2630 depends on RELOCATABLE <<
2631 range 0x0 0x01000000 <<
2632 default "0x00200000" if CPU_LOONGSON6 <<
2633 default "0x00100000" <<
2634 help <<
2635 A table of relocation data will be <<
2636 and parsed at boot to fix up the re <<
2637 1028
2638 This option allows the amount of sp !! 1029 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
2639 adjusted, although the default of 1 <<
2640 1030
2641 The build will fail and a valid siz !! 1031 config PCI
>> 1032 bool "Support for PCI controller"
>> 1033 depends on MIPS_DB1000 || DDB5074 || DDB5476 || DDB5477 || HP_LASERJET || LASAT || MIPS_IVR || MIPS_ATLAS || MIPS_COBALT || MIPS_EV64120 || MIPS_EV96100 || MIPS_ITE8172 || MIPS_MALTA || MOMENCO_OCELOT || MOMENCO_OCELOT_C || MOMENCO_OCELOT_G || MIPS_PB1000 || MIPS_PB1100 || MIPS_PB1500 || NEC_EAGLE || SGI_IP27 || SGI_IP32 || SIBYTE_SB1250 || SNI_RM200_PCI || TANBAC_TB0226 || TANBAC_TB0229 || TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 || VICTOR_MPC30X || ZAO_CAPCELLA
>> 1034 help
>> 1035 Find out whether you have a PCI motherboard. PCI is the name of a
>> 1036 bus system, i.e. the way the CPU talks to the other stuff inside
>> 1037 your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
>> 1038 say Y, otherwise N.
>> 1039
>> 1040 The PCI-HOWTO, available from
>> 1041 <http://www.tldp.org/docs.html#howto>, contains valuable
>> 1042 information about which PCI hardware does work under Linux and which
>> 1043 doesn't.
2642 1044
2643 If unsure, leave at the default val !! 1045 source "drivers/pci/Kconfig"
2644 1046
2645 config RANDOMIZE_BASE !! 1047 config ISA
2646 bool "Randomize the address of the ke !! 1048 bool "ISA bus support"
2647 depends on RELOCATABLE !! 1049 depends on ACER_PICA_61 || SGI_IP22 || MIPS_MAGNUM_4000 || OLIVETTI_M700 || SNI_RM200_PCI
2648 help !! 1050 default y if TOSHIBA_RBTX4927 || DDB5476 || DDB5074 || IBM_WORKPAD || CASIO_E55
2649 Randomizes the physical and virtual !! 1051 help
2650 kernel image is loaded, as a securi !! 1052 Find out whether you have ISA slots on your motherboard. ISA is the
2651 deters exploit attempts relying on !! 1053 name of a bus system, i.e. the way the CPU talks to the other stuff
2652 of kernel internals. !! 1054 inside your box. Other bus systems are PCI, EISA, or VESA. ISA is
>> 1055 an older system, now being displaced by PCI; newer boards don't
>> 1056 support it. If you have ISA, say Y, otherwise N.
2653 1057
2654 Entropy is generated using any copr !! 1058 #
>> 1059 # The SCSI bits are needed to get the SCSI code to link ...
>> 1060 #
>> 1061 config GENERIC_ISA_DMA
>> 1062 bool
>> 1063 default y if ACER_PICA_61 || MIPS_MAGNUM_4000 || OLIVETTI_M700 || SNI_RM200_PCI || SCSI
2655 1064
2656 The kernel will be offset by up to !! 1065 config EISA
>> 1066 bool "EISA support"
>> 1067 depends on ISA && (SGI_IP22 || SNI_RM200_PCI)
>> 1068 ---help---
>> 1069 The Extended Industry Standard Architecture (EISA) bus was
>> 1070 developed as an open alternative to the IBM MicroChannel bus.
2657 1071
2658 If unsure, say N. !! 1072 The EISA bus provided some of the features of the IBM MicroChannel
>> 1073 bus while maintaining backward compatibility with cards made for
>> 1074 the older ISA bus. The EISA bus saw limited use between 1988 and
>> 1075 1995 when it was made obsolete by the PCI bus.
2659 1076
2660 config RANDOMIZE_BASE_MAX_OFFSET !! 1077 Say Y here if you are building a kernel for an EISA-based machine.
2661 hex "Maximum kASLR offset" if EXPERT <<
2662 depends on RANDOMIZE_BASE <<
2663 range 0x0 0x40000000 if EVA || 64BIT <<
2664 range 0x0 0x08000000 <<
2665 default "0x01000000" <<
2666 help <<
2667 When kASLR is active, this provides <<
2668 be applied to the kernel image. It <<
2669 amount of physical RAM available in <<
2670 PHYSICAL_START and must be a power <<
2671 1078
2672 This is limited by the size of KSEG !! 1079 Otherwise, say N.
2673 EVA or 64-bit. The default is 16Mb. <<
2674 1080
2675 config NODES_SHIFT !! 1081 source "drivers/eisa/Kconfig"
2676 int <<
2677 default "6" <<
2678 depends on NUMA <<
2679 1082
2680 config HW_PERF_EVENTS !! 1083 config TC
2681 bool "Enable hardware performance cou !! 1084 bool "TURBOchannel support"
2682 depends on PERF_EVENTS && (CPU_MIPS32 !! 1085 depends on DECSTATION
2683 default y <<
2684 help 1086 help
2685 Enable hardware performance counter !! 1087 TurboChannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
2686 disabled, perf events will use soft !! 1088 processors. Documentation on writing device drivers for TurboChannel
>> 1089 is available at:
>> 1090 <http://www.cs.arizona.edu/computer.help/policy/DIGITAL_unix/AA-PS3HD-TET1_html/TITLE.html>.
>> 1091
>> 1092 #config ACCESSBUS
>> 1093 # bool "Access.Bus support"
>> 1094 # depends on TC
2687 1095
2688 config DMI !! 1096 config MMU
2689 bool "Enable DMI scanning" !! 1097 bool
2690 depends on MACH_LOONGSON64 <<
2691 select DMI_SCAN_MACHINE_NON_EFI_FALLB <<
2692 default y 1098 default y
2693 help <<
2694 Enabled scanning of DMI to identify <<
2695 here unless you have verified that <<
2696 affected by entries in the DMI blac <<
2697 BIOS code. <<
2698 <<
2699 config SMP <<
2700 bool "Multi-Processing support" <<
2701 depends on SYS_SUPPORTS_SMP <<
2702 help <<
2703 This enables support for systems wi <<
2704 a system with only one CPU, say N. <<
2705 than one CPU, say Y. <<
2706 <<
2707 If you say N here, the kernel will <<
2708 machines, but will use only one CPU <<
2709 you say Y here, the kernel will run <<
2710 uniprocessor machines. On a uniproc <<
2711 will run faster if you say N here. <<
2712 <<
2713 People using multiprocessor machine <<
2714 Y to "Enhanced Real Time Clock Supp <<
2715 <<
2716 See also the SMP-HOWTO available at <<
2717 <https://www.tldp.org/docs.html#how <<
2718 <<
2719 If you don't know what to do here, <<
2720 <<
2721 config HOTPLUG_CPU <<
2722 bool "Support for hot-pluggable CPUs" <<
2723 depends on SMP && SYS_SUPPORTS_HOTPLU <<
2724 help <<
2725 Say Y here to allow turning CPUs of <<
2726 controlled through /sys/devices/sys <<
2727 (Note: power management support wil <<
2728 automatically on SMP systems. ) <<
2729 Say N if you want to disable CPU ho <<
2730 1099
2731 config SMP_UP !! 1100 config MCA
2732 bool 1101 bool
2733 1102
2734 config SYS_SUPPORTS_MIPS_CPS !! 1103 config SBUS
2735 bool 1104 bool
2736 1105
2737 config SYS_SUPPORTS_SMP !! 1106 config HOTPLUG
2738 bool !! 1107 bool "Support for hot-pluggable devices"
>> 1108 ---help---
>> 1109 Say Y here if you want to plug devices into your computer while
>> 1110 the system is running, and be able to use them quickly. In many
>> 1111 cases, the devices can likewise be unplugged at any time too.
2739 1112
2740 config NR_CPUS_DEFAULT_4 !! 1113 One well known example of this is PCMCIA- or PC-cards, credit-card
2741 bool !! 1114 size devices such as network cards, modems or hard drives which are
>> 1115 plugged into slots found on all modern laptop computers. Another
>> 1116 example, used on modern desktops as well as laptops, is USB.
2742 1117
2743 config NR_CPUS_DEFAULT_8 !! 1118 Enable HOTPLUG and KMOD, and build a modular kernel. Get agent
2744 bool !! 1119 software (at <http://linux-hotplug.sourceforge.net/>) and install it.
>> 1120 Then your kernel will automatically call out to a user mode "policy
>> 1121 agent" (/sbin/hotplug) to load modules and set up software needed
>> 1122 to use devices as you hotplug them.
2745 1123
2746 config NR_CPUS_DEFAULT_16 !! 1124 source "drivers/pcmcia/Kconfig"
2747 bool <<
2748 1125
2749 config NR_CPUS_DEFAULT_32 !! 1126 source "drivers/pci/hotplug/Kconfig"
2750 bool <<
2751 1127
2752 config NR_CPUS_DEFAULT_64 !! 1128 endmenu
2753 bool <<
2754 1129
2755 config NR_CPUS !! 1130 menu "Executable file formats"
2756 int "Maximum number of CPUs (2-256)" <<
2757 range 2 256 <<
2758 depends on SMP <<
2759 default "4" if NR_CPUS_DEFAULT_4 <<
2760 default "8" if NR_CPUS_DEFAULT_8 <<
2761 default "16" if NR_CPUS_DEFAULT_16 <<
2762 default "32" if NR_CPUS_DEFAULT_32 <<
2763 default "64" if NR_CPUS_DEFAULT_64 <<
2764 help <<
2765 This allows you to specify the maxi <<
2766 kernel will support. The maximum s <<
2767 kernel and 64 for 64-bit kernels; t <<
2768 sense is 1 for Qemu (useful only fo <<
2769 and 2 for all others. <<
2770 1131
2771 This is purely to save memory - eac !! 1132 source "fs/Kconfig.binfmt"
2772 approximately eight kilobytes to th <<
2773 performance should round up your nu <<
2774 power of two. <<
2775 1133
2776 config MIPS_PERF_SHARED_TC_COUNTERS !! 1134 config TRAD_SIGNALS
2777 bool 1135 bool
>> 1136 default y if MIPS32
2778 1137
2779 config MIPS_NR_CPU_NR_MAP_1024 !! 1138 config BINFMT_IRIX
2780 bool !! 1139 bool "Include IRIX binary compatibility"
>> 1140 depends on !CPU_LITTLE_ENDIAN && MIPS32
2781 1141
2782 config MIPS_NR_CPU_NR_MAP !! 1142 config MIPS32_COMPAT
2783 int !! 1143 bool "Kernel support for Linux/MIPS 32-bit binary compatibility"
2784 depends on SMP !! 1144 depends on MIPS64
2785 default 1024 if MIPS_NR_CPU_NR_MAP_10 !! 1145 help
2786 default NR_CPUS if !MIPS_NR_CPU_NR_MA !! 1146 Select this option if you want Linux/MIPS 32-bit binary
>> 1147 compatibility. Since all software available for Linux/MIPS is
>> 1148 currently 32-bit you should say Y here.
2787 1149
2788 # !! 1150 config COMPAT
2789 # Timer Interrupt Frequency Configuration !! 1151 bool
2790 # !! 1152 depends on MIPS32_COMPAT
>> 1153 default y
2791 1154
2792 choice !! 1155 config MIPS32_O32
2793 prompt "Timer frequency" !! 1156 bool "Kernel support for o32 binaries"
2794 default HZ_250 !! 1157 depends on MIPS32_COMPAT
2795 help 1158 help
2796 Allows the configuration of the tim !! 1159 Select this option if you want to run o32 binaries. These are pure
2797 !! 1160 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
2798 config HZ_24 !! 1161 existing binaries are in this format.
2799 bool "24 HZ" if SYS_SUPPORTS_ <<
2800 1162
2801 config HZ_48 !! 1163 If unsure, say Y.
2802 bool "48 HZ" if SYS_SUPPORTS_ <<
2803 1164
2804 config HZ_100 !! 1165 config MIPS32_N32
2805 bool "100 HZ" if SYS_SUPPORTS !! 1166 bool "Kernel support for n32 binaries"
>> 1167 depends on MIPS32_COMPAT
>> 1168 help
>> 1169 Select this option if you want to run n32 binaries. These are
>> 1170 64-bit binaries using 32-bit quantities for addressing and certain
>> 1171 data that would normally be 64-bit. They are used in special
>> 1172 cases.
2806 1173
2807 config HZ_128 !! 1174 If unsure, say N.
2808 bool "128 HZ" if SYS_SUPPORTS <<
2809 1175
2810 config HZ_250 !! 1176 config BINFMT_ELF32
2811 bool "250 HZ" if SYS_SUPPORTS !! 1177 bool
>> 1178 default y if MIPS32_O32 || MIPS32_N32
2812 1179
2813 config HZ_256 !! 1180 config PM
2814 bool "256 HZ" if SYS_SUPPORTS !! 1181 bool "Power Management support (EXPERIMENTAL)"
>> 1182 depends on EXPERIMENTAL && SOC_AU1X00
2815 1183
2816 config HZ_1000 !! 1184 endmenu
2817 bool "1000 HZ" if SYS_SUPPORT <<
2818 1185
2819 config HZ_1024 !! 1186 source "drivers/mtd/Kconfig"
2820 bool "1024 HZ" if SYS_SUPPORT <<
2821 1187
2822 endchoice !! 1188 source "drivers/parport/Kconfig"
2823 1189
2824 config SYS_SUPPORTS_24HZ !! 1190 source "drivers/pnp/Kconfig"
2825 bool <<
2826 1191
2827 config SYS_SUPPORTS_48HZ !! 1192 source "drivers/base/Kconfig"
2828 bool <<
2829 1193
2830 config SYS_SUPPORTS_100HZ !! 1194 source "drivers/block/Kconfig"
2831 bool <<
2832 1195
2833 config SYS_SUPPORTS_128HZ <<
2834 bool <<
2835 1196
2836 config SYS_SUPPORTS_250HZ !! 1197 menu "MIPS initrd options"
2837 bool !! 1198 depends on BLK_DEV_INITRD
2838 1199
2839 config SYS_SUPPORTS_256HZ !! 1200 config EMBEDDED_RAMDISK
2840 bool !! 1201 bool "Embed root filesystem ramdisk into the kernel"
2841 1202
2842 config SYS_SUPPORTS_1000HZ !! 1203 config EMBEDDED_RAMDISK_IMAGE
2843 bool !! 1204 string "Filename of gziped ramdisk image"
>> 1205 depends on EMBEDDED_RAMDISK
>> 1206 default "ramdisk.gz"
>> 1207 help
>> 1208 This is the filename of the ramdisk image to be built into the
>> 1209 kernel. Relative pathnames are relative to arch/mips/ramdisk/.
>> 1210 The ramdisk image is not part of the kernel distribution; you must
>> 1211 provide one yourself.
2844 1212
2845 config SYS_SUPPORTS_1024HZ !! 1213 endmenu
2846 bool <<
2847 1214
2848 config SYS_SUPPORTS_ARBIT_HZ !! 1215 source "drivers/ide/Kconfig"
2849 bool <<
2850 default y if !SYS_SUPPORTS_24HZ && \ <<
2851 !SYS_SUPPORTS_48HZ && \ <<
2852 !SYS_SUPPORTS_100HZ && \ <<
2853 !SYS_SUPPORTS_128HZ && \ <<
2854 !SYS_SUPPORTS_250HZ && \ <<
2855 !SYS_SUPPORTS_256HZ && \ <<
2856 !SYS_SUPPORTS_1000HZ && <<
2857 !SYS_SUPPORTS_1024HZ <<
2858 1216
2859 config HZ !! 1217 source "drivers/scsi/Kconfig"
2860 int <<
2861 default 24 if HZ_24 <<
2862 default 48 if HZ_48 <<
2863 default 100 if HZ_100 <<
2864 default 128 if HZ_128 <<
2865 default 250 if HZ_250 <<
2866 default 256 if HZ_256 <<
2867 default 1000 if HZ_1000 <<
2868 default 1024 if HZ_1024 <<
2869 <<
2870 config SCHED_HRTICK <<
2871 def_bool HIGH_RES_TIMERS <<
2872 <<
2873 config ARCH_SUPPORTS_KEXEC <<
2874 def_bool y <<
2875 <<
2876 config ARCH_SUPPORTS_CRASH_DUMP <<
2877 def_bool y <<
2878 <<
2879 config PHYSICAL_START <<
2880 hex "Physical address where the kerne <<
2881 default "0xffffffff84000000" <<
2882 depends on CRASH_DUMP <<
2883 help <<
2884 This gives the CKSEG0 or KSEG0 addr <<
2885 If you plan to use kernel for captu <<
2886 this value to start of the reserved <<
2887 specified in the "crashkernel=YM@XM <<
2888 passed to the panic-ed kernel). <<
2889 <<
2890 config MIPS_O32_FP64_SUPPORT <<
2891 bool "Support for O32 binaries using <<
2892 depends on 32BIT || MIPS32_O32 <<
2893 help <<
2894 When this is enabled, the kernel wi <<
2895 point registers with binaries using <<
2896 EF_MIPS_FP64 ELF header flag (typic <<
2897 32-bit MIPS systems this support is <<
2898 size and complexity of the compiled <<
2899 running a MIPS32 system and know th <<
2900 will require 64-bit floating point, <<
2901 of your kernel & potentially improv <<
2902 saying N here. <<
2903 <<
2904 Although binutils currently support <<
2905 concerning its effect upon the O32 <<
2906 worked on. In order to avoid userla <<
2907 behaviour before the details have b <<
2908 be considered experimental and only <<
2909 said details. <<
2910 1218
2911 If unsure, say N. !! 1219 source "drivers/cdrom/Kconfig"
2912 1220
2913 config USE_OF !! 1221 source "drivers/md/Kconfig"
2914 bool <<
2915 select OF <<
2916 select OF_EARLY_FLATTREE <<
2917 select IRQ_DOMAIN <<
2918 1222
2919 config UHI_BOOT !! 1223 source "drivers/message/fusion/Kconfig"
2920 bool <<
2921 1224
2922 config BUILTIN_DTB !! 1225 source "drivers/ieee1394/Kconfig"
2923 bool <<
2924 1226
2925 choice !! 1227 source "drivers/message/i2o/Kconfig"
2926 prompt "Kernel appended dtb support" <<
2927 depends on USE_OF <<
2928 default MIPS_NO_APPENDED_DTB <<
2929 <<
2930 config MIPS_NO_APPENDED_DTB <<
2931 bool "None" <<
2932 help <<
2933 Do not enable appended dtb <<
2934 <<
2935 config MIPS_ELF_APPENDED_DTB <<
2936 bool "vmlinux" <<
2937 help <<
2938 With this option, the boot <<
2939 DTB) included in the vmlinu <<
2940 it is empty and the DTB can <<
2941 objcopy: <<
2942 <<
2943 objcopy --update-section <<
2944 <<
2945 This is meant as a backward <<
2946 systems with a bootloader t <<
2947 the documented boot protoco <<
2948 <<
2949 config MIPS_RAW_APPENDED_DTB <<
2950 bool "vmlinux.bin or vmlinuz. <<
2951 help <<
2952 With this option, the boot <<
2953 DTB) appended to raw vmlinu <<
2954 (e.g. cat vmlinux.bin <file <<
2955 <<
2956 This is meant as a backward <<
2957 systems with a bootloader t <<
2958 the documented boot protoco <<
2959 <<
2960 Beware that there is very l <<
2961 this option being confused <<
2962 look like a DTB header afte <<
2963 to vmlinux.bin. Do not lea <<
2964 if you don't intend to alwa <<
2965 endchoice <<
2966 1228
2967 choice !! 1229 source "net/Kconfig"
2968 prompt "Kernel command line type" <<
2969 depends on !CMDLINE_OVERRIDE <<
2970 default MIPS_CMDLINE_FROM_DTB if USE_ <<
2971 !MAC <<
2972 !CAV <<
2973 default MIPS_CMDLINE_FROM_BOOTLOADER <<
2974 <<
2975 config MIPS_CMDLINE_FROM_DTB <<
2976 depends on USE_OF <<
2977 bool "Dtb kernel arguments if <<
2978 <<
2979 config MIPS_CMDLINE_DTB_EXTEND <<
2980 depends on USE_OF <<
2981 bool "Extend dtb kernel argum <<
2982 <<
2983 config MIPS_CMDLINE_FROM_BOOTLOADER <<
2984 bool "Bootloader kernel argum <<
2985 <<
2986 config MIPS_CMDLINE_BUILTIN_EXTEND <<
2987 depends on CMDLINE_BOOL <<
2988 bool "Extend builtin kernel a <<
2989 endchoice <<
2990 1230
2991 endmenu !! 1231 source "drivers/isdn/Kconfig"
2992 1232
2993 config LOCKDEP_SUPPORT !! 1233 source "drivers/telephony/Kconfig"
2994 bool <<
2995 default y <<
2996 1234
2997 config STACKTRACE_SUPPORT !! 1235 #
2998 bool !! 1236 # input before char - char/joystick depends on it. As does USB.
2999 default y !! 1237 #
>> 1238 source "drivers/input/Kconfig"
3000 1239
3001 config PGTABLE_LEVELS !! 1240 source "drivers/char/Kconfig"
3002 int <<
3003 default 4 if PAGE_SIZE_4KB && MIPS_VA <<
3004 default 3 if 64BIT && (!PAGE_SIZE_64K <<
3005 default 2 <<
3006 1241
3007 config MIPS_AUTO_PFN_OFFSET !! 1242 #source drivers/misc/Config.in
3008 bool <<
3009 1243
3010 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC !! 1244 source "drivers/media/Kconfig"
3011 1245
3012 config PCI_DRIVERS_GENERIC !! 1246 source "fs/Kconfig"
3013 select PCI_DOMAINS_GENERIC if PCI <<
3014 bool <<
3015 1247
3016 config PCI_DRIVERS_LEGACY !! 1248 source "drivers/video/Kconfig"
3017 def_bool !PCI_DRIVERS_GENERIC <<
3018 select NO_GENERIC_PCI_IOPORT_MAP <<
3019 select PCI_DOMAINS if PCI <<
3020 1249
3021 # <<
3022 # ISA support is now enabled via select. Too <<
3023 # or other ISA chip on the board that users d <<
3024 # users to choose the right thing ... <<
3025 # <<
3026 config ISA <<
3027 bool <<
3028 1250
3029 config TC !! 1251 menu "Sound"
3030 bool "TURBOchannel support" <<
3031 depends on MACH_DECSTATION <<
3032 help <<
3033 TURBOchannel is a DEC (now Compaq ( <<
3034 processors. TURBOchannel programmi <<
3035 at: <<
3036 <ftp://ftp.hp.com/pub/alphaserver/a <<
3037 and: <<
3038 <http://www.computer-refuge.org/cla <<
3039 Linux driver support status is docu <<
3040 <http://www.linux-mips.org/wiki/DEC <<
3041 1252
3042 config MMU !! 1253 config SOUND
3043 bool !! 1254 tristate "Sound card support"
3044 default y !! 1255 ---help---
>> 1256 If you have a sound card in your computer, i.e. if it can say more
>> 1257 than an occasional beep, say Y. Be sure to have all the information
>> 1258 about your sound card and its configuration down (I/O port,
>> 1259 interrupt and DMA channel), because you will be asked for it.
3045 1260
3046 config ARCH_MMAP_RND_BITS_MIN !! 1261 You want to read the Sound-HOWTO, available from
3047 default 12 if 64BIT !! 1262 <http://www.tldp.org/docs.html#howto>. General information about
3048 default 8 !! 1263 the modular sound system is contained in the files
>> 1264 <file:Documentation/sound/Introduction>. The file
>> 1265 <file:Documentation/sound/README.OSS> contains some slightly
>> 1266 outdated but still useful information as well.
3049 1267
3050 config ARCH_MMAP_RND_BITS_MAX !! 1268 If you have a PnP sound card and you want to configure it at boot
3051 default 18 if 64BIT !! 1269 time using the ISA PnP tools (read
3052 default 15 !! 1270 <http://www.roestock.demon.co.uk/isapnptools/>), then you need to
>> 1271 compile the sound card support as a module and load that module
>> 1272 after the PnP configuration is finished. To do this, choose M here
>> 1273 and read <file:Documentation/sound/README.modules>; the module
>> 1274 will be called soundcore.
3053 1275
3054 config ARCH_MMAP_RND_COMPAT_BITS_MIN !! 1276 I'm told that even without a sound card, you can make your computer
3055 default 8 !! 1277 say more than an occasional beep, by programming the PC speaker.
>> 1278 Kernel patches and supporting utilities to do that are in the pcsp
>> 1279 package, available at <ftp://ftp.infradead.org/pub/pcsp/>.
3056 1280
3057 config ARCH_MMAP_RND_COMPAT_BITS_MAX !! 1281 source "sound/Kconfig"
3058 default 15 <<
3059 1282
3060 config I8253 <<
3061 bool <<
3062 select CLKSRC_I8253 <<
3063 select CLKEVT_I8253 <<
3064 select MIPS_EXTERNAL_TIMER <<
3065 endmenu 1283 endmenu
3066 1284
3067 config TRAD_SIGNALS !! 1285 source "drivers/usb/Kconfig"
3068 bool <<
3069 1286
3070 config MIPS32_COMPAT <<
3071 bool <<
3072 1287
3073 config COMPAT !! 1288 menu "Kernel hacking"
3074 bool <<
3075 1289
3076 config MIPS32_O32 !! 1290 config CROSSCOMPILE
3077 bool "Kernel support for o32 binaries !! 1291 bool "Are you using a crosscompiler"
3078 depends on 64BIT <<
3079 select ARCH_WANT_OLD_COMPAT_IPC <<
3080 select COMPAT <<
3081 select MIPS32_COMPAT <<
3082 help 1292 help
3083 Select this option if you want to r !! 1293 Say Y here if you are compiling the kernel on a different
3084 32-bit binaries as used by the 32-b !! 1294 architecture than the one it is intended to run on.
3085 existing binaries are in this forma <<
3086 1295
3087 If unsure, say Y. !! 1296 config DEBUG_KERNEL
>> 1297 bool "Kernel debugging"
3088 1298
3089 config MIPS32_N32 !! 1299 config KGDB
3090 bool "Kernel support for n32 binaries !! 1300 bool "Remote GDB kernel debugging"
3091 depends on 64BIT !! 1301 depends on DEBUG_KERNEL
3092 select ARCH_WANT_COMPAT_IPC_PARSE_VER <<
3093 select COMPAT <<
3094 select MIPS32_COMPAT <<
3095 help 1302 help
3096 Select this option if you want to r !! 1303 If you say Y here, it will be possible to remotely debug the MIPS
3097 64-bit binaries using 32-bit quanti !! 1304 kernel using gdb. This enlarges your kernel image disk size by
3098 data that would normally be 64-bit. !! 1305 several megabytes and requires a machine with more than 16 MB,
3099 cases. !! 1306 better 32 MB RAM to avoid excessive linking time. This is only
3100 !! 1307 useful for kernel hackers. If unsure, say N.
3101 If unsure, say N. <<
3102 <<
3103 config CC_HAS_MNO_BRANCH_LIKELY <<
3104 def_bool y <<
3105 depends on $(cc-option,-mno-branch-li <<
3106 1308
3107 # https://github.com/llvm/llvm-project/issues !! 1309 config GDB_CONSOLE
3108 config CC_HAS_BROKEN_INLINE_COMPAT_BRANCH !! 1310 bool "Console output to GDB"
3109 def_bool y if CC_IS_CLANG !! 1311 depends on KGDB
3110 !! 1312 help
3111 menu "Power management options" !! 1313 If you are using GDB for remote debugging over a serial port and
>> 1314 would like kernel messages to be formatted into GDB $O packets so
>> 1315 that GDB prints them as program output, say 'Y'.
3112 1316
3113 config ARCH_HIBERNATION_POSSIBLE !! 1317 config RUNTIME_DEBUG
3114 def_bool y !! 1318 bool "Enable run-time debugging"
3115 depends on SYS_SUPPORTS_HOTPLUG_CPU | !! 1319 depends on DEBUG_KERNEL
>> 1320 help
>> 1321 If you say Y here, some debugging macros will do run-time checking.
>> 1322 If you say N here, those macros will mostly turn to no-ops. See
>> 1323 include/asm-mips/debug.h for debuging macros.
>> 1324 If unsure, say N.
3116 1325
3117 config ARCH_SUSPEND_POSSIBLE <<
3118 def_bool y <<
3119 depends on SYS_SUPPORTS_HOTPLUG_CPU | <<
3120 1326
3121 source "kernel/power/Kconfig" !! 1327 config MAGIC_SYSRQ
>> 1328 bool "Magic SysRq key"
>> 1329 depends on DEBUG_KERNEL
>> 1330 help
>> 1331 If you say Y here, you will have some control over the system even
>> 1332 if the system crashes for example during kernel debugging (e.g., you
>> 1333 will be able to flush the buffer cache to disk, reboot the system
>> 1334 immediately or dump some status information). This is accomplished
>> 1335 by pressing various keys while holding SysRq (Alt+PrintScreen). It
>> 1336 also works on a serial console (on PC hardware at least), if you
>> 1337 send a BREAK and then within 5 seconds a command keypress. The
>> 1338 keys are documented in <file:Documentation/sysrq.txt>. Don't say Y
>> 1339 unless you really know what this hack does.
>> 1340
>> 1341 config MIPS_UNCACHED
>> 1342 bool "Run uncached"
>> 1343 depends on DEBUG_KERNEL && !SMP && !SGI_IP27
>> 1344 help
>> 1345 If you say Y here there kernel will disable all CPU caches. This will
>> 1346 reduce the system's performance dramatically but can help finding
>> 1347 otherwise hard to track bugs. It can also useful if you're doing
>> 1348 hardware debugging with a logic analyzer and need to see all traffic
>> 1349 on the bus.
>> 1350
>> 1351 config DEBUG_HIGHMEM
>> 1352 bool "Highmem debugging"
>> 1353 depends on DEBUG_KERNEL && HIGHMEM
3122 1354
3123 endmenu 1355 endmenu
3124 1356
3125 config MIPS_EXTERNAL_TIMER !! 1357 source "security/Kconfig"
3126 bool <<
3127 <<
3128 menu "CPU Power Management" <<
3129 <<
3130 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIME <<
3131 source "drivers/cpufreq/Kconfig" <<
3132 endif # CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL <<
3133 <<
3134 source "drivers/cpuidle/Kconfig" <<
3135 <<
3136 endmenu <<
3137 1358
3138 source "arch/mips/kvm/Kconfig" !! 1359 source "crypto/Kconfig"
3139 1360
3140 source "arch/mips/vdso/Kconfig" !! 1361 source "lib/Kconfig"
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