1 # 1 # >> 2 # alpha/Makefile >> 3 # 2 # This file is subject to the terms and condit 4 # This file is subject to the terms and conditions of the GNU General Public 3 # License. See the file "COPYING" in the main 5 # License. See the file "COPYING" in the main directory of this archive 4 # for more details. 6 # for more details. 5 # 7 # 6 # Copyright (C) 1994, 95, 96, 2003 by Ralf Bae !! 8 # Copyright (C) 1994 by Linus Torvalds 7 # DECStation modifications by Paul M. Antoine, << 8 # Copyright (C) 2002, 2003, 2004 Maciej W. Ro << 9 # << 10 # This file is included by the global makefile << 11 # architecture-specific flags and dependencies << 12 # 9 # 13 10 14 archscripts: scripts_basic !! 11 NM := $(NM) -B 15 $(Q)$(MAKE) $(build)=arch/mips/tools e << 16 ifeq ($(CONFIG_CPU_LOONGSON3_WORKAROUNDS),y) << 17 $(Q)$(MAKE) $(build)=arch/mips/tools l << 18 endif << 19 $(Q)$(MAKE) $(build)=arch/mips/boot/to << 20 12 21 KBUILD_DEFCONFIG := 32r2el_defconfig !! 13 LDFLAGS_vmlinux := -static -N #-relax 22 KBUILD_DTBS := dtbs !! 14 CHECKFLAGS += -D__alpha__ 23 !! 15 cflags-y := -pipe -mno-fp-regs -ffixed-8 24 # !! 16 cflags-y += $(call cc-option, -fno-jump-tables) 25 # Select the object file format to substitute << 26 # << 27 ifdef CONFIG_CPU_LITTLE_ENDIAN << 28 32bit-tool-archpref = mipsel << 29 64bit-tool-archpref = mips64el << 30 32bit-bfd = elf32-tradlittlemips << 31 64bit-bfd = elf64-tradlittlemips << 32 32bit-emul = elf32ltsmip << 33 64bit-emul = elf64ltsmip << 34 else << 35 32bit-tool-archpref = mips << 36 64bit-tool-archpref = mips64 << 37 32bit-bfd = elf32-tradbigmips << 38 64bit-bfd = elf64-tradbigmips << 39 32bit-emul = elf32btsmip << 40 64bit-emul = elf64btsmip << 41 endif << 42 << 43 ifdef CONFIG_32BIT << 44 tool-archpref = $(32bit-tool-archpre << 45 UTS_MACHINE := mips << 46 endif << 47 ifdef CONFIG_64BIT << 48 tool-archpref = $(64bit-tool-archpre << 49 UTS_MACHINE := mips64 << 50 endif << 51 << 52 ifdef cross_compiling << 53 ifeq ($(CROSS_COMPILE),) << 54 CROSS_COMPILE := $(call cc-cross-prefix, $ << 55 endif << 56 endif << 57 << 58 ifdef CONFIG_FUNCTION_GRAPH_TRACER << 59 ifndef KBUILD_MCOUNT_RA_ADDRESS << 60 ifeq ($(call cc-option-yn,-mmcount-ra-addr << 61 cflags-y += -mmcount-ra-address -DKBUILD << 62 endif << 63 endif << 64 endif << 65 cflags-y += $(call cc-option, -mno-check-zero- << 66 << 67 ifdef CONFIG_32BIT << 68 ld-emul = $(32bit-emul) << 69 vmlinux-32 = vmlinux << 70 vmlinux-64 = vmlinux.64 << 71 << 72 cflags-y += -mabi=32 << 73 endif << 74 << 75 ifdef CONFIG_64BIT << 76 ld-emul = $(64bit-emul) << 77 vmlinux-32 = vmlinux.32 << 78 vmlinux-64 = vmlinux << 79 << 80 cflags-y += -mabi=64 << 81 endif << 82 << 83 all-$(CONFIG_BOOT_ELF32) := $(vmlinux-3 << 84 all-$(CONFIG_BOOT_ELF64) := $(vmlinux-6 << 85 all-$(CONFIG_SYS_SUPPORTS_ZBOOT)+= vmlinuz << 86 17 87 # !! 18 cpuflags-$(CONFIG_ALPHA_EV56) := -mcpu=ev56 88 # GCC uses -G 0 -mabicalls -fpic as default. !! 19 cpuflags-$(CONFIG_ALPHA_POLARIS) := -mcpu=pca56 89 # code since it only slows down the whole thin !! 20 cpuflags-$(CONFIG_ALPHA_SX164) := -mcpu=pca56 90 # use of global pointer optimizations but thei !! 21 cpuflags-$(CONFIG_ALPHA_EV6) := -mcpu=ev6 91 # the current pointer optimization. !! 22 cpuflags-$(CONFIG_ALPHA_EV67) := -mcpu=ev67 92 # !! 23 # If GENERIC, make sure to turn off any instruction set extensions that 93 # The DECStation requires an ECOFF kernel for !! 24 # the host compiler might have on by default. 94 # machines may also. Since BFD is incredibly !! 25 cpuflags-$(CONFIG_ALPHA_GENERIC) := -mcpu=ev56 -mtune=ev6 95 # crossformat linking we rely on the elf2ecoff << 96 # << 97 cflags-y += -G 0 -mno-a << 98 cflags-y += -msoft-floa << 99 LDFLAGS_vmlinux += -G 0 -stati << 100 KBUILD_AFLAGS_MODULE += -mlong-call << 101 KBUILD_CFLAGS_MODULE += -mlong-call << 102 << 103 ifeq ($(CONFIG_RELOCATABLE),y) << 104 LDFLAGS_vmlinux += --emit-relo << 105 endif << 106 << 107 cflags-y += -ffreestanding << 108 << 109 cflags-$(CONFIG_CPU_BIG_ENDIAN) += -EB << 110 cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += -EL << 111 << 112 cflags-$(CONFIG_SB1XXX_CORELIS) += $(call cc-o << 113 -fno-omit-f << 114 << 115 # Some distribution-specific toolchains might << 116 # option during the build, which adds a simple << 117 # of every function. This stack probe is to e << 118 # stack space, else a SEGV is generated. This << 119 # as kernel stacks are small, placed in unmapp << 120 # grow when overflowed. Especially on SGI IP2 << 121 # lead to a NULL pointer dereference in _raw_s << 122 # << 123 # In disassembly, this stack probe appears at << 124 # sd zero,<offset>(sp) << 125 # Where <offset> is a negative value. << 126 # << 127 cflags-y += -fno-stack-check << 128 26 129 # binutils from v2.35 when built with --enable !! 27 cflags-y += $(cpuflags-y) 130 # supports an -mfix-loongson3-llsc flag which << 131 # instruction to work around a CPU bug (see __ << 132 # for a description). << 133 # << 134 # We disable this in order to prevent the asse << 135 # instruction that labels refer to, ie. if we << 136 # << 137 # 1: ll v0, 0(a0) << 138 # << 139 # ...then with the assembler fix applied the l << 140 # instruction inserted by the assembler, and i << 141 # exception table the table would no longer co << 142 # instruction. << 143 # << 144 # Avoid this by explicitly disabling that asse << 145 # << 146 cflags-y += $(call cc-option,-Wa$(comma)-mno-f << 147 28 148 # << 149 # CPU-dependent compiler/assembler options for << 150 # << 151 cflags-$(CONFIG_CPU_R3000) += $(call cc-o << 152 cflags-$(CONFIG_CPU_R4300) += $(call cc-o << 153 cflags-$(CONFIG_CPU_R4X00) += $(call cc-o << 154 cflags-$(CONFIG_CPU_TX49XX) += $(call cc-o << 155 cflags-$(CONFIG_CPU_MIPS32_R1) += -march=mips << 156 cflags-$(CONFIG_CPU_MIPS32_R2) += -march=mips << 157 cflags-$(CONFIG_CPU_MIPS32_R5) += -march=mips << 158 cflags-$(CONFIG_CPU_MIPS32_R6) += -march=mips << 159 cflags-$(CONFIG_CPU_MIPS64_R1) += -march=mips << 160 cflags-$(CONFIG_CPU_MIPS64_R2) += -march=mips << 161 cflags-$(CONFIG_CPU_MIPS64_R5) += -march=mips << 162 cflags-$(CONFIG_CPU_MIPS64_R6) += -march=mips << 163 cflags-$(CONFIG_CPU_P5600) += $(call cc-o << 164 -Wa,--trap -modd-spreg << 165 cflags-$(CONFIG_CPU_R5000) += $(call cc-o << 166 -Wa,--trap << 167 cflags-$(CONFIG_CPU_R5500) += $(call cc-o << 168 -Wa,--trap << 169 cflags-$(CONFIG_CPU_NEVADA) += $(call cc-o << 170 -Wa,--trap << 171 cflags-$(CONFIG_CPU_RM7000) += $(call cc-o << 172 -Wa,--trap << 173 cflags-$(CONFIG_CPU_SB1) += $(call cc-o << 174 -Wa,--trap << 175 cflags-$(CONFIG_CPU_SB1) += $(call cc-o << 176 cflags-$(CONFIG_CPU_SB1) += $(call cc-o << 177 cflags-$(CONFIG_CPU_R10000) += $(call cc-o << 178 -Wa,--trap << 179 cflags-$(CONFIG_CPU_CAVIUM_OCTEON) += -march=o << 180 cflags-$(CONFIG_CAVIUM_CN63XXP1) += -Wa,-mfix- << 181 cflags-$(CONFIG_CPU_BMIPS) += -march=mips << 182 << 183 cflags-$(CONFIG_CPU_LOONGSON2E) += \ << 184 $(call cc-option,-marc << 185 cflags-$(CONFIG_CPU_LOONGSON2F) += \ << 186 $(call cc-option,-marc << 187 # Some -march= flags enable MMI instructions, << 188 # support being enabled alongside -msoft-float << 189 cflags-$(CONFIG_CPU_LOONGSON2EF) += $(call cc- << 190 cflags-$(CONFIG_CPU_LOONGSON64) += \ << 191 $(call cc-option,-marc << 192 cflags-$(CONFIG_CPU_LOONGSON64) += $(call cc-o << 193 << 194 cflags-$(CONFIG_CPU_R4000_WORKAROUNDS) += $(c << 195 cflags-$(CONFIG_CPU_R4400_WORKAROUNDS) += $(c << 196 cflags-$(CONFIG_CPU_DADDI_WORKAROUNDS) += $(c << 197 ifdef CONFIG_CPU_LOONGSON2F_WORKAROUNDS << 198 cflags-$(CONFIG_CPU_NOP_WORKAROUNDS) += -Wa,-m << 199 cflags-$(CONFIG_CPU_JUMP_WORKAROUNDS) += -Wa,- << 200 endif << 201 29 202 # !! 30 # For TSUNAMI, we must have the assembler not emulate our instructions. 203 # Some versions of binutils, not currently mai !! 31 # The same is true for IRONGATE, POLARIS, PYXIS. 204 # an -mfix-loongson3-llsc flag which emits a s !! 32 # BWX is most important, but we don't really want any emulation ever. 205 # to work around a CPU bug (see __SYNC_loongso !! 33 KBUILD_CFLAGS += $(cflags-y) -Wa,-mev6 206 # description). << 207 # << 208 # We disable this in order to prevent the asse << 209 # instruction that labels refer to, ie. if we << 210 # << 211 # 1: ll v0, 0(a0) << 212 # << 213 # ...then with the assembler fix applied the l << 214 # instruction inserted by the assembler, and i << 215 # exception table the table would no longer co << 216 # instruction. << 217 # << 218 # Avoid this by explicitly disabling that asse << 219 # binutils does not merge support for the flag << 220 # this later - for now it ensures vendor toolc << 221 # << 222 cflags-$(CONFIG_CPU_LOONGSON64) += $(call as-o << 223 34 224 # For smartmips configurations, there are hund !! 35 libs-y += arch/alpha/lib/ 225 # in assembly and header files. smartmips is o << 226 # and there is no support for 64-bit. Various << 227 # similar directives in the kernel will spam t << 228 # Warning: the `smartmips' extension requires << 229 # or << 230 # Warning: the 64-bit MIPS architecture does n << 231 # Pass -Wa,--no-warn to disable all assembler << 232 # been fixed properly. << 233 mips-cflags := $(c << 234 ifeq ($(CONFIG_CPU_HAS_SMARTMIPS),y) << 235 smartmips-ase := $(c << 236 cflags-$(smartmips-ase) += -ms << 237 endif << 238 ifeq ($(CONFIG_CPU_MICROMIPS),y) << 239 micromips-ase := $(c << 240 cflags-$(micromips-ase) += -mm << 241 endif << 242 ifeq ($(CONFIG_CPU_HAS_MSA),y) << 243 toolchain-msa := $(c << 244 cflags-$(toolchain-msa) += -DT << 245 endif << 246 toolchain-virt := $(c << 247 cflags-$(toolchain-virt) += -DT << 248 # For -mmicromips, use -Wa,-fatal-warnings to << 249 # only warns << 250 xpa-cflags-y := $(m << 251 xpa-cflags-$(micromips-ase) += -mm << 252 toolchain-xpa := $(c << 253 cflags-$(toolchain-xpa) += -DT << 254 toolchain-crc := $(c << 255 cflags-$(toolchain-crc) += -DT << 256 toolchain-dsp := $(c << 257 cflags-$(toolchain-dsp) += -DT << 258 toolchain-ginv := $(c << 259 cflags-$(toolchain-ginv) += -DT << 260 36 261 # !! 37 # export what is needed by arch/alpha/boot/Makefile 262 # Firmware support !! 38 LIBS_Y := $(patsubst %/, %/lib.a, $(libs-y)) 263 # !! 39 export LIBS_Y 264 libs-$(CONFIG_FW_ARC) += arch/mips/f << 265 libs-$(CONFIG_FW_CFE) += arch/mips/f << 266 libs-$(CONFIG_FW_SNIPROM) += arch/mips/f << 267 libs-y += arch/mips/f << 268 40 269 # !! 41 boot := arch/alpha/boot 270 # Kernel compression << 271 # << 272 ifdef CONFIG_SYS_SUPPORTS_ZBOOT << 273 COMPRESSION_FNAME = vmlinuz << 274 else << 275 COMPRESSION_FNAME = vmlinux << 276 endif << 277 42 278 # !! 43 #Default target when executing make with no arguments 279 # Board-dependent options and extra files !! 44 all boot: $(boot)/vmlinux.gz 280 # << 281 include $(srctree)/arch/mips/Kbuild.platforms << 282 45 283 ifdef CONFIG_PHYSICAL_START !! 46 $(boot)/vmlinux.gz: vmlinux 284 load-y = $(CO !! 47 $(Q)$(MAKE) $(build)=$(boot) $@ 285 endif << 286 << 287 entry-y = $(shell $(ob << 288 cflags-y += -I$(srctree << 289 drivers-$(CONFIG_PCI) += arch/mips/p << 290 48 291 # !! 49 bootimage bootpfile bootpzfile: vmlinux 292 # Automatically detect the build format. By de !! 50 $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@ 293 # the elf format according to the load address << 294 # We can always force a build with a 64-bits s << 295 # passing 'KBUILD_SYM32=no' option to the make << 296 # << 297 ifdef CONFIG_64BIT << 298 ifndef KBUILD_SYM32 << 299 ifeq ($(shell expr $(load-y) \< 0xffffffff << 300 KBUILD_SYM32 = $(call cc-option-yn, -msy << 301 endif << 302 endif << 303 << 304 ifeq ($(KBUILD_SYM32), y) << 305 cflags-$(KBUILD_SYM32) += -msym32 -DKBUILD << 306 else << 307 ifeq ($(CONFIG_CPU_DADDI_WORKAROUNDS), y) << 308 $(error CONFIG_CPU_DADDI_WORKAROUNDS uns << 309 endif << 310 endif << 311 endif << 312 << 313 # When linking a 32-bit executable the LLVM li << 314 # 32-bit load address that has been sign-exten << 315 # remove the upper 32 bits then, as it is safe << 316 # linkers. << 317 ifdef CONFIG_64BIT << 318 load-ld = $(load-y) << 319 else << 320 load-ld = $(subst 0xff << 321 endif << 322 << 323 KBUILD_AFLAGS += $(cflags-y) << 324 KBUILD_CFLAGS += $(cflags-y) << 325 KBUILD_CPPFLAGS += -DVMLINUX_LOAD_ADDRESS=$(lo << 326 KBUILD_CPPFLAGS += -DDATAOFFSET=$(if $(dataoff << 327 << 328 bootvars-y = VMLINUX_LOAD_ADDRESS=$(load- << 329 LINKER_LOAD_ADDRESS=$(load-l << 330 VMLINUX_ENTRY_ADDRESS=$(entr << 331 PLATFORM="$(platform-y)" \ << 332 ITS_INPUTS="$(its-y)" << 333 ifdef CONFIG_32BIT << 334 bootvars-y += ADDR_BITS=32 << 335 endif << 336 ifdef CONFIG_64BIT << 337 bootvars-y += ADDR_BITS=64 << 338 endif << 339 << 340 # This is required to get dwarf unwinding tabl << 341 # instead of .eh_frame so we don't discard the << 342 KBUILD_CFLAGS += -fno-asynchronous-unwind-tabl << 343 << 344 KBUILD_LDFLAGS += -m $(ld-emul) << 345 << 346 ifdef need-compiler << 347 CHECKFLAGS += $(shell $(CC) $(KBUILD_CPPFLAGS) << 348 grep -E -vw '__GNUC_(MINOR_|PATCHLEVEL << 349 sed -e "s/^\#define /-D'/" -e "s/ /'=' << 350 endif << 351 << 352 OBJCOPYFLAGS += --remove-section=.r << 353 << 354 libs-y += arch/mips/lib/ << 355 libs-$(CONFIG_MIPS_FP_SUPPORT) += arch/mips/ma << 356 << 357 drivers-y += arch/mips/c << 358 << 359 # suspend and hibernation support << 360 drivers-$(CONFIG_PM) += arch/mips/power/ << 361 << 362 # boot image targets (arch/mips/boot/) << 363 boot-y := vmlinux.bin << 364 boot-y += vmlinux.ecoff << 365 boot-y += vmlinux.srec << 366 boot-y += uImage << 367 boot-y += uImage.bin << 368 boot-y += uImage.bz2 << 369 boot-y += uImage.gz << 370 boot-y += uImage.lzma << 371 boot-y += uImage.lzo << 372 boot-y += vmlinux.itb << 373 boot-y += vmlinux.gz.itb << 374 boot-y += vmlinux.bz2.itb << 375 boot-y += vmlinux.lzma.itb << 376 boot-y += vmlinux.lzo.itb << 377 << 378 # compressed boot image targets (arch/mips/boo << 379 bootz-y := vmlinuz << 380 bootz-y += vmlinuz.bin << 381 bootz-y += vmlinuz.ecoff << 382 bootz-y += vmlinuz.srec << 383 bootz-y += uzImage.bin << 384 bootz-y += vmlinuz.itb << 385 << 386 # << 387 # Some machines like the Indy need 32-bit ELF << 388 # Other need ECOFF, so we build a 32-bit ELF b << 389 # convert to ECOFF using elf2ecoff. << 390 # << 391 quiet_cmd_32 = OBJCOPY $@ << 392 cmd_32 = $(OBJCOPY) -O $(32bit-bfd) $( << 393 vmlinux.32: vmlinux << 394 $(call cmd,32) << 395 << 396 # << 397 # The 64-bit ELF tools are pretty broken so at << 398 # ELF files from 32-bit files by conversion. << 399 # << 400 quiet_cmd_64 = OBJCOPY $@ << 401 cmd_64 = $(OBJCOPY) -O $(64bit-bfd) $( << 402 vmlinux.64: vmlinux << 403 $(call cmd,64) << 404 << 405 all: $(all-y) $(KBUILD_DTBS) << 406 << 407 # boot << 408 $(boot-y): $(vmlinux-32) FORCE << 409 $(Q)$(MAKE) $(build)=arch/mips/boot VM << 410 $(bootvars-y) arch/mips/boot/$ << 411 << 412 ifdef CONFIG_SYS_SUPPORTS_ZBOOT << 413 # boot/compressed << 414 $(bootz-y): $(vmlinux-32) FORCE << 415 $(Q)$(MAKE) $(build)=arch/mips/boot/co << 416 $(bootvars-y) 32bit-bfd=$(32bi << 417 else << 418 vmlinuz: FORCE << 419 @echo ' CONFIG_SYS_SUPPORTS_ZBOOT is << 420 /bin/false << 421 endif << 422 << 423 << 424 CLEAN_FILES += vmlinux.32 vmlinux.64 << 425 << 426 # device-trees << 427 core-y += arch/mips/boot/dts/ << 428 << 429 archprepare: << 430 ifdef CONFIG_MIPS32_N32 << 431 @$(kecho) ' Checking missing-syscalls << 432 $(Q)$(MAKE) $(build)=. missing-syscall << 433 endif << 434 ifdef CONFIG_MIPS32_O32 << 435 @$(kecho) ' Checking missing-syscalls << 436 $(Q)$(MAKE) $(build)=. missing-syscall << 437 endif << 438 << 439 install: << 440 $(Q)install -D -m 755 vmlinux $(INSTAL << 441 ifdef CONFIG_SYS_SUPPORTS_ZBOOT << 442 $(Q)install -D -m 755 vmlinuz $(INSTAL << 443 endif << 444 $(Q)install -D -m 644 .config $(INSTAL << 445 $(Q)install -D -m 644 System.map $(INS << 446 51 447 archheaders: 52 archheaders: 448 $(Q)$(MAKE) $(build)=arch/mips/kernel/ !! 53 $(Q)$(MAKE) $(build)=arch/alpha/kernel/syscalls all 449 54 450 define archhelp 55 define archhelp 451 echo ' install - install !! 56 echo '* boot - Compressed kernel image (arch/alpha/boot/vmlinux.gz)' 452 echo ' vmlinux.ecoff - ECOFF b !! 57 echo ' bootimage - SRM bootable image (arch/alpha/boot/bootimage)' 453 echo ' vmlinux.bin - Raw bin !! 58 echo ' bootpfile - BOOTP bootable image (arch/alpha/boot/bootpfile)' 454 echo ' vmlinux.srec - SREC bo !! 59 echo ' bootpzfile - compressed kernel BOOTP image (arch/alpha/boot/bootpzfile)' 455 echo ' vmlinux.32 - 64-bit << 456 echo ' vmlinuz - Compres << 457 echo ' vmlinuz.ecoff - ECOFF z << 458 echo ' vmlinuz.bin - Raw bin << 459 echo ' vmlinuz.srec - SREC zb << 460 echo ' uImage - U-Boot << 461 echo ' uImage.bin - U-Boot << 462 echo ' uImage.bz2 - U-Boot << 463 echo ' uImage.gz - U-Boot << 464 echo ' uImage.lzma - U-Boot << 465 echo ' uImage.lzo - U-Boot << 466 echo ' uzImage.bin - U-Boot << 467 echo << 468 echo ' These will be default as appro << 469 echo << 470 echo ' If you are targeting a system << 471 echo ' configure the kernel for a giv << 472 echo << 473 echo ' {micro32,32,64}{r1,r2,r6}{el,} << 474 echo << 475 echo ' Where BOARDS is some subset of << 476 for board in $(sort $(BOARDS)); do ech << 477 echo << 478 echo ' Specifically the following gen << 479 echo ' supported:' << 480 echo << 481 $(foreach cfg,$(generic_defconfigs), << 482 printf " %-24s - Build generic kern << 483 echo << 484 echo ' The following legacy default c << 485 echo ' generic and can still be used: << 486 echo << 487 $(foreach cfg,$(sort $(legacy_defconfi << 488 printf " %-24s - Build $($(cfg)-y)\ << 489 echo << 490 echo ' Otherwise, the following defau << 491 endef << 492 << 493 generic_config_dir = $(srctree)/arch/$(ARCH)/c << 494 generic_defconfigs := << 495 << 496 # << 497 # If the user generates a generic kernel confi << 498 # list of boards to include the config fragmen << 499 # available board config fragments. << 500 # << 501 ifeq ($(BOARDS),) << 502 BOARDS = $(patsubst board-%.config,%,$(notdir << 503 endif << 504 << 505 # << 506 # Generic kernel configurations which merge ge << 507 # appropriate config fragments from arch/mips/ << 508 # the ability to easily configure the kernel f << 509 # endianness & set of boards without duplicati << 510 # hundreds of defconfig files. << 511 # << 512 define gen_generic_defconfigs << 513 $(foreach bits,$(1),$(foreach rev,$(2),$(forea << 514 target := $(bits)$(rev)$(filter el,$(endian))_ << 515 generic_defconfigs += $$(target) << 516 $$(target): $(generic_config_dir)/$(bits)$(rev << 517 $$(target): $(generic_config_dir)/$(endian).co << 518 ))) << 519 endef << 520 << 521 $(eval $(call gen_generic_defconfigs,32 64,r1 << 522 $(eval $(call gen_generic_defconfigs,micro32,r << 523 << 524 define describe_generic_defconfig << 525 $(subst 32r,MIPS32 r,$(subst 64r,MIPS64 r,$(su << 526 endef 60 endef 527 << 528 .PHONY: $(generic_defconfigs) << 529 $(generic_defconfigs): << 530 $(Q)$(CONFIG_SHELL) $(srctree)/scripts << 531 -m -O $(objtree) $(srctree)/ar << 532 grep -Ev '^#' << 533 $(Q)cp $(KCONFIG_CONFIG) $(objtree)/.c << 534 $(Q)$(MAKE) -f $(srctree)/Makefile old << 535 KCONFIG_CONFIG=$(objtree)/.con << 536 $(Q)$(CONFIG_SHELL) $(srctree)/arch/$( << 537 $(srctree) $(objtree) $(objtre << 538 "$(origin BOARDS)" $(BOARDS) << 539 $(Q)$(MAKE) -f $(srctree)/Makefile old << 540 << 541 # << 542 # Prevent generic merge_config rules attemptin << 543 # << 544 $(generic_config_dir)/%.config: ; << 545 << 546 # << 547 # Prevent direct use of generic_defconfig, whi << 548 # basis of the various ISA-specific targets ge << 549 # << 550 .PHONY: generic_defconfig << 551 generic_defconfig: << 552 $(Q)echo "generic_defconfig is not int << 553 $(Q)echo "used via an ISA-specific tar << 554 $(Q)echo << 555 $(Q)for cfg in $(generic_defconfigs); << 556 $(Q)echo << 557 $(Q)false << 558 << 559 # << 560 # Legacy defconfig compatibility - these targe << 561 # now that the boards have been converted to u << 562 # wrappers around the generic rules above. << 563 # << 564 legacy_defconfigs += ocelot_defc << 565 ocelot_defconfig-y := 32r2el_defc << 566 << 567 legacy_defconfigs += sead3_defco << 568 sead3_defconfig-y := 32r2el_defc << 569 << 570 legacy_defconfigs += sead3micro_ << 571 sead3micro_defconfig-y := micro32r2el << 572 << 573 legacy_defconfigs += xilfpga_def << 574 xilfpga_defconfig-y := 32r2el_defc << 575 << 576 legacy_defconfigs += pistachio_d << 577 pistachio_defconfig-y := 32r2el_defc << 578 << 579 .PHONY: $(legacy_defconfigs) << 580 $(legacy_defconfigs): << 581 $(Q)$(MAKE) -f $(srctree)/Makefile $($ <<
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.