1 /* SPDX-License-Identifier: GPL-2.0 */ 1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __ATH25_DEVICES_H 2 #ifndef __ATH25_DEVICES_H
3 #define __ATH25_DEVICES_H 3 #define __ATH25_DEVICES_H
4 4
5 #include <linux/cpu.h> 5 #include <linux/cpu.h>
6 6
7 #define ATH25_REG_MS(_val, _field) (((_va 7 #define ATH25_REG_MS(_val, _field) (((_val) & _field##_M) >> _field##_S)
8 8
9 #define ATH25_IRQ_CPU_CLOCK (MIPS_CPU_IRQ_ 9 #define ATH25_IRQ_CPU_CLOCK (MIPS_CPU_IRQ_BASE + 7) /* C0_CAUSE: 0x8000 */
10 10
11 enum ath25_soc_type { 11 enum ath25_soc_type {
12 /* handled by ar5312.c */ 12 /* handled by ar5312.c */
13 ATH25_SOC_AR2312, 13 ATH25_SOC_AR2312,
14 ATH25_SOC_AR2313, 14 ATH25_SOC_AR2313,
15 ATH25_SOC_AR5312, 15 ATH25_SOC_AR5312,
16 16
17 /* handled by ar2315.c */ 17 /* handled by ar2315.c */
18 ATH25_SOC_AR2315, 18 ATH25_SOC_AR2315,
19 ATH25_SOC_AR2316, 19 ATH25_SOC_AR2316,
20 ATH25_SOC_AR2317, 20 ATH25_SOC_AR2317,
21 ATH25_SOC_AR2318, 21 ATH25_SOC_AR2318,
22 22
23 ATH25_SOC_UNKNOWN 23 ATH25_SOC_UNKNOWN
24 }; 24 };
25 25
26 extern enum ath25_soc_type ath25_soc; 26 extern enum ath25_soc_type ath25_soc;
27 extern struct ar231x_board_config ath25_board; 27 extern struct ar231x_board_config ath25_board;
28 extern void (*ath25_irq_dispatch)(void); 28 extern void (*ath25_irq_dispatch)(void);
29 29
30 int ath25_find_config(phys_addr_t offset, unsi 30 int ath25_find_config(phys_addr_t offset, unsigned long size);
31 void ath25_serial_setup(u32 mapbase, int irq, 31 void ath25_serial_setup(u32 mapbase, int irq, unsigned int uartclk);
32 int ath25_add_wmac(int nr, u32 base, int irq); 32 int ath25_add_wmac(int nr, u32 base, int irq);
33 33
34 static inline bool is_ar2315(void) 34 static inline bool is_ar2315(void)
35 { 35 {
36 return (current_cpu_data.cputype == CP 36 return (current_cpu_data.cputype == CPU_4KEC);
37 } 37 }
38 38
39 static inline bool is_ar5312(void) 39 static inline bool is_ar5312(void)
40 { 40 {
41 return !is_ar2315(); 41 return !is_ar2315();
42 } 42 }
43 43
44 #endif 44 #endif
45 45
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