1 /* 1 /*
2 * This file is subject to the terms and condi 2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the mai 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 2008 Maxime Bizon <mbizon@fre 6 * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
7 */ 7 */
8 8
9 #include <linux/init.h> 9 #include <linux/init.h>
10 #include <linux/memblock.h> !! 10 #include <linux/bootmem.h>
11 #include <linux/smp.h> <<
12 #include <asm/bootinfo.h> 11 #include <asm/bootinfo.h>
13 #include <asm/bmips.h> <<
14 #include <asm/smp-ops.h> <<
15 #include <asm/mipsregs.h> <<
16 #include <bcm63xx_board.h> 12 #include <bcm63xx_board.h>
17 #include <bcm63xx_cpu.h> 13 #include <bcm63xx_cpu.h>
18 #include <bcm63xx_io.h> 14 #include <bcm63xx_io.h>
19 #include <bcm63xx_regs.h> 15 #include <bcm63xx_regs.h>
>> 16 #include <bcm63xx_gpio.h>
20 17
21 void __init prom_init(void) 18 void __init prom_init(void)
22 { 19 {
23 u32 reg, mask; 20 u32 reg, mask;
24 21
25 /* Cache CBR addr before CPU/DMA setup <<
26 bmips_cbr_addr = BMIPS_GET_CBR(); <<
27 <<
28 bcm63xx_cpu_init(); 22 bcm63xx_cpu_init();
29 23
30 /* stop any running watchdog */ 24 /* stop any running watchdog */
31 bcm_wdt_writel(WDT_STOP_1, WDT_CTL_REG 25 bcm_wdt_writel(WDT_STOP_1, WDT_CTL_REG);
32 bcm_wdt_writel(WDT_STOP_2, WDT_CTL_REG 26 bcm_wdt_writel(WDT_STOP_2, WDT_CTL_REG);
33 27
34 /* disable all hardware blocks clock f 28 /* disable all hardware blocks clock for now */
35 if (BCMCPU_IS_3368()) !! 29 if (BCMCPU_IS_6338())
36 mask = CKCTL_3368_ALL_SAFE_EN; <<
37 else if (BCMCPU_IS_6328()) <<
38 mask = CKCTL_6328_ALL_SAFE_EN; <<
39 else if (BCMCPU_IS_6338()) <<
40 mask = CKCTL_6338_ALL_SAFE_EN; 30 mask = CKCTL_6338_ALL_SAFE_EN;
41 else if (BCMCPU_IS_6345()) 31 else if (BCMCPU_IS_6345())
42 mask = CKCTL_6345_ALL_SAFE_EN; 32 mask = CKCTL_6345_ALL_SAFE_EN;
43 else if (BCMCPU_IS_6348()) 33 else if (BCMCPU_IS_6348())
44 mask = CKCTL_6348_ALL_SAFE_EN; 34 mask = CKCTL_6348_ALL_SAFE_EN;
45 else if (BCMCPU_IS_6358()) <<
46 mask = CKCTL_6358_ALL_SAFE_EN; <<
47 else if (BCMCPU_IS_6362()) <<
48 mask = CKCTL_6362_ALL_SAFE_EN; <<
49 else if (BCMCPU_IS_6368()) <<
50 mask = CKCTL_6368_ALL_SAFE_EN; <<
51 else 35 else
52 mask = 0; !! 36 /* BCMCPU_IS_6358() */
>> 37 mask = CKCTL_6358_ALL_SAFE_EN;
53 38
54 reg = bcm_perf_readl(PERF_CKCTL_REG); 39 reg = bcm_perf_readl(PERF_CKCTL_REG);
55 reg &= ~mask; 40 reg &= ~mask;
56 bcm_perf_writel(reg, PERF_CKCTL_REG); 41 bcm_perf_writel(reg, PERF_CKCTL_REG);
57 42
>> 43 /* assign command line from kernel config */
>> 44 strcpy(arcs_cmdline, CONFIG_CMDLINE);
>> 45
>> 46 /* register gpiochip */
>> 47 bcm63xx_gpio_init();
>> 48
58 /* do low level board init */ 49 /* do low level board init */
59 board_prom_init(); 50 board_prom_init();
>> 51 }
60 52
61 /* set up SMP */ !! 53 void __init prom_free_prom_memory(void)
62 if (!register_bmips_smp_ops()) { !! 54 {
63 /* <<
64 * BCM6328 might not have its <<
65 * and BCM6358 need special ha <<
66 * disable SMP for now. <<
67 */ <<
68 if (BCMCPU_IS_6328()) { <<
69 reg = bcm_readl(BCM_63 <<
70 OTP_US <<
71 <<
72 if (reg & OTP_6328_REG <<
73 bmips_smp_enab <<
74 } else if (BCMCPU_IS_3368() || <<
75 bmips_smp_enabled = 0; <<
76 } <<
77 <<
78 if (!bmips_smp_enabled) <<
79 return; <<
80 <<
81 /* <<
82 * The bootloader has set up t <<
83 * 0xa000_0200. <<
84 * This conflicts with the spe <<
85 * The bootloader has also set <<
86 * IPI interrupt. <<
87 * Here we will start up CPU1 <<
88 * reconfigure itself then go <<
89 */ <<
90 memcpy((void *)0xa0000200, bmi <<
91 __sync(); <<
92 set_c0_cause(C_SW0); <<
93 cpumask_set_cpu(1, &bmips_boot <<
94 <<
95 /* <<
96 * FIXME: we really should hav <<
97 */ <<
98 } <<
99 } 55 }
100 56
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