1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * OCTEON 3XXX, 5XXX, 63XX device tree skeleto 4 * 5 * This device tree is pruned and patched by e 6 * use. Because of this, it contains a super- 7 * devices and properties. 8 */ 9 10 /include/ "octeon_3xxx.dtsi" 11 12 / { 13 soc@0 { 14 smi0: mdio@1180000001800 { 15 phy0: ethernet-phy@0 { 16 compatible = " 17 marvell,reg-in 18 /* Fix 19 <2 0x1 20 /* Adj 21 <3 0x1 22 /* irq 23 <3 0x1 24 reg = <0>; 25 }; 26 27 phy1: ethernet-phy@1 { 28 compatible = " 29 marvell,reg-in 30 /* Fix 31 <2 0x1 32 /* Adj 33 <3 0x1 34 /* irq 35 <3 0x1 36 reg = <1>; 37 }; 38 39 phy2: ethernet-phy@2 { 40 reg = <2>; 41 compatible = " 42 marvell,reg-in 43 <3 0x1 44 <3 0x1 45 <3 0x1 46 }; 47 phy3: ethernet-phy@3 { 48 reg = <3>; 49 compatible = " 50 marvell,reg-in 51 <3 0x1 52 <3 0x1 53 <3 0x1 54 }; 55 phy4: ethernet-phy@4 { 56 reg = <4>; 57 compatible = " 58 marvell,reg-in 59 <3 0x1 60 <3 0x1 61 <3 0x1 62 }; 63 phy5: ethernet-phy@5 { 64 reg = <5>; 65 compatible = " 66 marvell,reg-in 67 <3 0x1 68 <3 0x1 69 <3 0x1 70 }; 71 72 phy6: ethernet-phy@6 { 73 reg = <6>; 74 compatible = " 75 marvell,reg-in 76 <3 0x1 77 <3 0x1 78 <3 0x1 79 }; 80 phy7: ethernet-phy@7 { 81 reg = <7>; 82 compatible = " 83 marvell,reg-in 84 <3 0x1 85 <3 0x1 86 <3 0x1 87 }; 88 phy8: ethernet-phy@8 { 89 reg = <8>; 90 compatible = " 91 marvell,reg-in 92 <3 0x1 93 <3 0x1 94 <3 0x1 95 }; 96 phy9: ethernet-phy@9 { 97 reg = <9>; 98 compatible = " 99 marvell,reg-in 100 <3 0x1 101 <3 0x1 102 <3 0x1 103 }; 104 }; 105 106 smi1: mdio@1180000001900 { 107 compatible = "cavium,o 108 #address-cells = <1>; 109 #size-cells = <0>; 110 reg = <0x11800 0x00001 111 112 phy100: ethernet-phy@1 113 reg = <1>; 114 compatible = " 115 marvell,reg-in 116 <3 0x1 117 <3 0x1 118 <3 0x1 119 interrupt-pare 120 interrupts = < 121 }; 122 phy101: ethernet-phy@2 123 reg = <2>; 124 compatible = " 125 marvell,reg-in 126 <3 0x1 127 <3 0x1 128 <3 0x1 129 interrupt-pare 130 interrupts = < 131 }; 132 phy102: ethernet-phy@3 133 reg = <3>; 134 compatible = " 135 marvell,reg-in 136 <3 0x1 137 <3 0x1 138 <3 0x1 139 interrupt-pare 140 interrupts = < 141 }; 142 phy103: ethernet-phy@4 143 reg = <4>; 144 compatible = " 145 marvell,reg-in 146 <3 0x1 147 <3 0x1 148 <3 0x1 149 interrupt-pare 150 interrupts = < 151 }; 152 }; 153 154 mix0: ethernet@1070000100000 { 155 compatible = "cavium,o 156 reg = <0x10700 0x00100 157 <0x11800 0xE0000 158 <0x11800 0xE0000 159 <0x11800 0xE0002 160 cell-index = <0>; 161 interrupts = <0 62>, < 162 local-mac-address = [ 163 phy-handle = <&phy0>; 164 }; 165 166 mix1: ethernet@1070000100800 { 167 compatible = "cavium,o 168 reg = <0x10700 0x00100 169 <0x11800 0xE0000 170 <0x11800 0xE0000 171 <0x11800 0xE0002 172 cell-index = <1>; 173 interrupts = <1 18>, < 174 local-mac-address = [ 175 phy-handle = <&phy1>; 176 }; 177 178 pip: pip@11800a0000000 { 179 interface@0 { 180 ethernet@0 { 181 phy-ha 182 cavium 183 rx-del 184 tx-del 185 fixed- 186 187 188 }; 189 }; 190 ethernet@1 { 191 phy-ha 192 cavium 193 rx-del 194 tx-del 195 fixed- 196 197 198 }; 199 }; 200 ethernet@2 { 201 phy-ha 202 cavium 203 rx-del 204 tx-del 205 }; 206 ethernet@3 { 207 compat 208 reg = 209 local- 210 phy-ha 211 cavium 212 }; 213 ethernet@4 { 214 compat 215 reg = 216 local- 217 }; 218 ethernet@5 { 219 compat 220 reg = 221 local- 222 }; 223 ethernet@6 { 224 compat 225 reg = 226 local- 227 }; 228 ethernet@7 { 229 compat 230 reg = 231 local- 232 }; 233 ethernet@8 { 234 compat 235 reg = 236 local- 237 }; 238 ethernet@9 { 239 compat 240 reg = 241 local- 242 }; 243 ethernet@a { 244 compat 245 reg = 246 local- 247 }; 248 ethernet@b { 249 compat 250 reg = 251 local- 252 }; 253 ethernet@c { 254 compat 255 reg = 256 local- 257 }; 258 ethernet@d { 259 compat 260 reg = 261 local- 262 }; 263 ethernet@e { 264 compat 265 reg = 266 local- 267 }; 268 ethernet@f { 269 compat 270 reg = 271 local- 272 }; 273 }; 274 275 interface@1 { 276 ethernet@0 { 277 compat 278 reg = 279 local- 280 phy-ha 281 }; 282 ethernet@1 { 283 compat 284 reg = 285 local- 286 phy-ha 287 }; 288 ethernet@2 { 289 compat 290 reg = 291 local- 292 phy-ha 293 }; 294 ethernet@3 { 295 compat 296 reg = 297 local- 298 phy-ha 299 }; 300 }; 301 }; 302 303 twsi0: i2c@1180000001000 { 304 rtc@68 { 305 compatible = " 306 reg = <0x68>; 307 }; 308 tmp@4c { 309 compatible = " 310 reg = <0x4c>; 311 }; 312 }; 313 314 twsi1: i2c@1180000001200 { 315 #address-cells = <1>; 316 #size-cells = <0>; 317 compatible = "cavium,o 318 reg = <0x11800 0x00001 319 interrupts = <0 59>; 320 clock-frequency = <100 321 }; 322 323 uart1: serial@1180000000c00 { 324 compatible = "cavium,o 325 reg = <0x11800 0x00000 326 clock-frequency = <0>; 327 current-speed = <11520 328 reg-shift = <3>; 329 interrupts = <0 35>; 330 }; 331 332 uart2: serial@1180000000400 { 333 compatible = "cavium,o 334 reg = <0x11800 0x00000 335 clock-frequency = <0>; 336 current-speed = <11520 337 reg-shift = <3>; 338 interrupts = <1 16>; 339 }; 340 341 bootbus: bootbus@1180000000000 342 led0: led-display@4,0 343 compatible = " 344 reg = <4 0x20 345 }; 346 347 cf0: compact-flash@5,0 348 compatible = " 349 reg = <5 0 0x1 350 cavium,bus-wid 351 cavium,true-id 352 cavium,dma-eng 353 }; 354 }; 355 356 uctl: uctl@118006f000000 { 357 compatible = "cavium,o 358 reg = <0x11800 0x6f000 359 ranges; /* Direct mapp 360 #address-cells = <2>; 361 #size-cells = <2>; 362 /* 12MHz, 24MHz and 48 363 refclk-frequency = <12 364 /* Either "crystal" or 365 refclk-type = "crystal 366 367 ehci@16f0000000000 { 368 compatible = " 369 reg = <0x16f00 370 interrupts = < 371 big-endian-reg 372 }; 373 ohci@16f0000000400 { 374 compatible = " 375 reg = <0x16f00 376 interrupts = < 377 big-endian-reg 378 }; 379 }; 380 381 usbn: usbn@1180068000000 { 382 /* 12MHz, 24MHz and 48 383 refclk-frequency = <12 384 /* Either "crystal" or 385 refclk-type = "crystal 386 }; 387 }; 388 389 aliases { 390 mix0 = &mix0; 391 mix1 = &mix1; 392 pip = &pip; 393 smi0 = &smi0; 394 smi1 = &smi1; 395 twsi0 = &twsi0; 396 twsi1 = &twsi1; 397 uart0 = &uart0; 398 uart1 = &uart1; 399 uart2 = &uart2; 400 flash0 = &flash0; 401 cf0 = &cf0; 402 uctl = &uctl; 403 usbn = &usbn; 404 led0 = &led0; 405 }; 406 };
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