1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4770-cgu 2 #include <dt-bindings/clock/ingenic,jz4770-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h> 3 #include <dt-bindings/clock/ingenic,tcu.h>
4 4
5 / { 5 / {
6 #address-cells = <1>; 6 #address-cells = <1>;
7 #size-cells = <1>; 7 #size-cells = <1>;
8 compatible = "ingenic,jz4770"; 8 compatible = "ingenic,jz4770";
9 9
10 cpus { 10 cpus {
11 #address-cells = <1>; 11 #address-cells = <1>;
12 #size-cells = <0>; 12 #size-cells = <0>;
13 13
14 cpu0: cpu@0 { 14 cpu0: cpu@0 {
15 device_type = "cpu"; 15 device_type = "cpu";
16 compatible = "ingenic, 16 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
17 reg = <0>; 17 reg = <0>;
18 18
19 clocks = <&cgu JZ4770_ 19 clocks = <&cgu JZ4770_CLK_CCLK>;
20 clock-names = "cpu"; 20 clock-names = "cpu";
21 }; 21 };
22 }; 22 };
23 23
24 cpuintc: interrupt-controller { 24 cpuintc: interrupt-controller {
25 #address-cells = <0>; 25 #address-cells = <0>;
26 #interrupt-cells = <1>; 26 #interrupt-cells = <1>;
27 interrupt-controller; 27 interrupt-controller;
28 compatible = "mti,cpu-interrup 28 compatible = "mti,cpu-interrupt-controller";
29 }; 29 };
30 30
31 intc: interrupt-controller@10001000 { 31 intc: interrupt-controller@10001000 {
32 compatible = "ingenic,jz4770-i 32 compatible = "ingenic,jz4770-intc";
33 reg = <0x10001000 0x40>; 33 reg = <0x10001000 0x40>;
34 34
35 interrupt-controller; 35 interrupt-controller;
36 #interrupt-cells = <1>; 36 #interrupt-cells = <1>;
37 37
38 interrupt-parent = <&cpuintc>; 38 interrupt-parent = <&cpuintc>;
39 interrupts = <2>; 39 interrupts = <2>;
40 }; 40 };
41 41
42 ext: ext { 42 ext: ext {
43 compatible = "fixed-clock"; 43 compatible = "fixed-clock";
44 #clock-cells = <0>; 44 #clock-cells = <0>;
45 }; 45 };
46 46
47 osc32k: osc32k { 47 osc32k: osc32k {
48 compatible = "fixed-clock"; 48 compatible = "fixed-clock";
49 #clock-cells = <0>; 49 #clock-cells = <0>;
50 clock-frequency = <32768>; 50 clock-frequency = <32768>;
51 }; 51 };
52 52
53 cgu: jz4770-cgu@10000000 { 53 cgu: jz4770-cgu@10000000 {
54 compatible = "ingenic,jz4770-c 54 compatible = "ingenic,jz4770-cgu", "simple-mfd";
55 reg = <0x10000000 0x100>; 55 reg = <0x10000000 0x100>;
56 #address-cells = <1>; 56 #address-cells = <1>;
57 #size-cells = <1>; 57 #size-cells = <1>;
58 ranges = <0x0 0x10000000 0x100 58 ranges = <0x0 0x10000000 0x100>;
59 59
60 clocks = <&ext>, <&osc32k>; 60 clocks = <&ext>, <&osc32k>;
61 clock-names = "ext", "osc32k"; 61 clock-names = "ext", "osc32k";
62 62
63 #clock-cells = <1>; 63 #clock-cells = <1>;
64 64
65 otg_phy: usb-phy@3c { 65 otg_phy: usb-phy@3c {
66 compatible = "ingenic, 66 compatible = "ingenic,jz4770-phy";
67 reg = <0x3c 0x10>; 67 reg = <0x3c 0x10>;
68 68
69 clocks = <&cgu JZ4770_ 69 clocks = <&cgu JZ4770_CLK_OTG_PHY>;
70 70
71 #phy-cells = <0>; 71 #phy-cells = <0>;
72 }; 72 };
73 }; 73 };
74 74
75 tcu: timer@10002000 { 75 tcu: timer@10002000 {
76 compatible = "ingenic,jz4770-t 76 compatible = "ingenic,jz4770-tcu", "simple-mfd";
77 reg = <0x10002000 0x1000>; 77 reg = <0x10002000 0x1000>;
78 #address-cells = <1>; 78 #address-cells = <1>;
79 #size-cells = <1>; 79 #size-cells = <1>;
80 ranges = <0x0 0x10002000 0x100 80 ranges = <0x0 0x10002000 0x1000>;
81 81
82 #clock-cells = <1>; 82 #clock-cells = <1>;
83 83
84 clocks = <&cgu JZ4770_CLK_RTC> 84 clocks = <&cgu JZ4770_CLK_RTC>,
85 <&cgu JZ4770_CLK_EXT> 85 <&cgu JZ4770_CLK_EXT>,
86 <&cgu JZ4770_CLK_PCLK 86 <&cgu JZ4770_CLK_PCLK>;
87 clock-names = "rtc", "ext", "p 87 clock-names = "rtc", "ext", "pclk";
88 88
89 interrupt-controller; 89 interrupt-controller;
90 #interrupt-cells = <1>; 90 #interrupt-cells = <1>;
91 91
92 interrupt-parent = <&intc>; 92 interrupt-parent = <&intc>;
93 interrupts = <27 26 25>; 93 interrupts = <27 26 25>;
94 94
95 watchdog: watchdog@0 { 95 watchdog: watchdog@0 {
96 compatible = "ingenic, 96 compatible = "ingenic,jz4770-watchdog",
97 "ingenic, 97 "ingenic,jz4740-watchdog";
98 reg = <0x0 0xc>; 98 reg = <0x0 0xc>;
99 99
100 clocks = <&tcu TCU_CLK 100 clocks = <&tcu TCU_CLK_WDT>;
101 clock-names = "wdt"; 101 clock-names = "wdt";
102 }; 102 };
103 103
104 pwm: pwm@40 { 104 pwm: pwm@40 {
105 compatible = "ingenic, 105 compatible = "ingenic,jz4770-pwm", "ingenic,jz4740-pwm";
106 reg = <0x40 0x80>; 106 reg = <0x40 0x80>;
107 107
108 #pwm-cells = <3>; 108 #pwm-cells = <3>;
109 109
110 clocks = <&tcu TCU_CLK 110 clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
111 <&tcu TCU_CLK 111 <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>,
112 <&tcu TCU_CLK 112 <&tcu TCU_CLK_TIMER4>, <&tcu TCU_CLK_TIMER5>,
113 <&tcu TCU_CLK 113 <&tcu TCU_CLK_TIMER6>, <&tcu TCU_CLK_TIMER7>;
114 clock-names = "timer0" 114 clock-names = "timer0", "timer1", "timer2", "timer3",
115 "timer4" 115 "timer4", "timer5", "timer6", "timer7";
116 }; 116 };
117 117
118 ost: timer@e0 { 118 ost: timer@e0 {
119 compatible = "ingenic, 119 compatible = "ingenic,jz4770-ost";
120 reg = <0xe0 0x20>; 120 reg = <0xe0 0x20>;
121 121
122 clocks = <&tcu TCU_CLK 122 clocks = <&tcu TCU_CLK_OST>;
123 clock-names = "ost"; 123 clock-names = "ost";
124 124
125 interrupts = <15>; 125 interrupts = <15>;
126 }; 126 };
127 }; 127 };
128 128
129 rtc: rtc@10003000 { 129 rtc: rtc@10003000 {
130 compatible = "ingenic,jz4770-r 130 compatible = "ingenic,jz4770-rtc", "ingenic,jz4760-rtc";
131 reg = <0x10003000 0x40>; 131 reg = <0x10003000 0x40>;
132 132
133 interrupt-parent = <&intc>; 133 interrupt-parent = <&intc>;
134 interrupts = <32>; 134 interrupts = <32>;
135 }; 135 };
136 136
137 pinctrl: pin-controller@10010000 { 137 pinctrl: pin-controller@10010000 {
138 compatible = "ingenic,jz4770-p 138 compatible = "ingenic,jz4770-pinctrl";
139 reg = <0x10010000 0x600>; 139 reg = <0x10010000 0x600>;
140 140
141 #address-cells = <1>; 141 #address-cells = <1>;
142 #size-cells = <0>; 142 #size-cells = <0>;
143 143
144 gpa: gpio@0 { 144 gpa: gpio@0 {
145 compatible = "ingenic, 145 compatible = "ingenic,jz4770-gpio";
146 reg = <0>; 146 reg = <0>;
147 147
148 gpio-controller; 148 gpio-controller;
149 gpio-ranges = <&pinctr 149 gpio-ranges = <&pinctrl 0 0 32>;
150 #gpio-cells = <2>; 150 #gpio-cells = <2>;
151 151
152 interrupt-controller; 152 interrupt-controller;
153 #interrupt-cells = <2> 153 #interrupt-cells = <2>;
154 154
155 interrupt-parent = <&i 155 interrupt-parent = <&intc>;
156 interrupts = <17>; 156 interrupts = <17>;
157 }; 157 };
158 158
159 gpb: gpio@1 { 159 gpb: gpio@1 {
160 compatible = "ingenic, 160 compatible = "ingenic,jz4770-gpio";
161 reg = <1>; 161 reg = <1>;
162 162
163 gpio-controller; 163 gpio-controller;
164 gpio-ranges = <&pinctr 164 gpio-ranges = <&pinctrl 0 32 32>;
165 #gpio-cells = <2>; 165 #gpio-cells = <2>;
166 166
167 interrupt-controller; 167 interrupt-controller;
168 #interrupt-cells = <2> 168 #interrupt-cells = <2>;
169 169
170 interrupt-parent = <&i 170 interrupt-parent = <&intc>;
171 interrupts = <16>; 171 interrupts = <16>;
172 }; 172 };
173 173
174 gpc: gpio@2 { 174 gpc: gpio@2 {
175 compatible = "ingenic, 175 compatible = "ingenic,jz4770-gpio";
176 reg = <2>; 176 reg = <2>;
177 177
178 gpio-controller; 178 gpio-controller;
179 gpio-ranges = <&pinctr 179 gpio-ranges = <&pinctrl 0 64 32>;
180 #gpio-cells = <2>; 180 #gpio-cells = <2>;
181 181
182 interrupt-controller; 182 interrupt-controller;
183 #interrupt-cells = <2> 183 #interrupt-cells = <2>;
184 184
185 interrupt-parent = <&i 185 interrupt-parent = <&intc>;
186 interrupts = <15>; 186 interrupts = <15>;
187 }; 187 };
188 188
189 gpd: gpio@3 { 189 gpd: gpio@3 {
190 compatible = "ingenic, 190 compatible = "ingenic,jz4770-gpio";
191 reg = <3>; 191 reg = <3>;
192 192
193 gpio-controller; 193 gpio-controller;
194 gpio-ranges = <&pinctr 194 gpio-ranges = <&pinctrl 0 96 32>;
195 #gpio-cells = <2>; 195 #gpio-cells = <2>;
196 196
197 interrupt-controller; 197 interrupt-controller;
198 #interrupt-cells = <2> 198 #interrupt-cells = <2>;
199 199
200 interrupt-parent = <&i 200 interrupt-parent = <&intc>;
201 interrupts = <14>; 201 interrupts = <14>;
202 }; 202 };
203 203
204 gpe: gpio@4 { 204 gpe: gpio@4 {
205 compatible = "ingenic, 205 compatible = "ingenic,jz4770-gpio";
206 reg = <4>; 206 reg = <4>;
207 207
208 gpio-controller; 208 gpio-controller;
209 gpio-ranges = <&pinctr 209 gpio-ranges = <&pinctrl 0 128 32>;
210 #gpio-cells = <2>; 210 #gpio-cells = <2>;
211 211
212 interrupt-controller; 212 interrupt-controller;
213 #interrupt-cells = <2> 213 #interrupt-cells = <2>;
214 214
215 interrupt-parent = <&i 215 interrupt-parent = <&intc>;
216 interrupts = <13>; 216 interrupts = <13>;
217 }; 217 };
218 218
219 gpf: gpio@5 { 219 gpf: gpio@5 {
220 compatible = "ingenic, 220 compatible = "ingenic,jz4770-gpio";
221 reg = <5>; 221 reg = <5>;
222 222
223 gpio-controller; 223 gpio-controller;
224 gpio-ranges = <&pinctr 224 gpio-ranges = <&pinctrl 0 160 32>;
225 #gpio-cells = <2>; 225 #gpio-cells = <2>;
226 226
227 interrupt-controller; 227 interrupt-controller;
228 #interrupt-cells = <2> 228 #interrupt-cells = <2>;
229 229
230 interrupt-parent = <&i 230 interrupt-parent = <&intc>;
231 interrupts = <12>; 231 interrupts = <12>;
232 }; 232 };
233 }; 233 };
234 234
235 aic: audio-controller@10020000 { 235 aic: audio-controller@10020000 {
236 compatible = "ingenic,jz4770-i 236 compatible = "ingenic,jz4770-i2s";
237 reg = <0x10020000 0x94>; 237 reg = <0x10020000 0x94>;
238 238
239 #sound-dai-cells = <0>; 239 #sound-dai-cells = <0>;
240 240
241 clocks = <&cgu JZ4770_CLK_AIC> 241 clocks = <&cgu JZ4770_CLK_AIC>, <&cgu JZ4770_CLK_I2S>;
242 clock-names = "aic", "i2s"; 242 clock-names = "aic", "i2s";
243 243
244 interrupt-parent = <&intc>; 244 interrupt-parent = <&intc>;
245 interrupts = <34>; 245 interrupts = <34>;
246 246
247 dmas = <&dmac0 25 0xffffffff>, 247 dmas = <&dmac0 25 0xffffffff>, <&dmac0 24 0xffffffff>;
248 dma-names = "rx", "tx"; 248 dma-names = "rx", "tx";
249 }; 249 };
250 250
251 codec: audio-codec@100200a0 { 251 codec: audio-codec@100200a0 {
252 compatible = "ingenic,jz4770-c 252 compatible = "ingenic,jz4770-codec";
253 reg = <0x100200a4 0x8>; 253 reg = <0x100200a4 0x8>;
254 254
255 #sound-dai-cells = <0>; 255 #sound-dai-cells = <0>;
256 256
257 clocks = <&cgu JZ4770_CLK_AIC> 257 clocks = <&cgu JZ4770_CLK_AIC>;
258 clock-names = "aic"; 258 clock-names = "aic";
259 }; 259 };
260 260
261 mmc0: mmc@10021000 { 261 mmc0: mmc@10021000 {
262 compatible = "ingenic,jz4770-m 262 compatible = "ingenic,jz4770-mmc", "ingenic,jz4760-mmc";
263 reg = <0x10021000 0x1000>; 263 reg = <0x10021000 0x1000>;
264 264
265 clocks = <&cgu JZ4770_CLK_MMC0 265 clocks = <&cgu JZ4770_CLK_MMC0>;
266 clock-names = "mmc"; 266 clock-names = "mmc";
267 267
268 interrupt-parent = <&intc>; 268 interrupt-parent = <&intc>;
269 interrupts = <37>; 269 interrupts = <37>;
270 270
271 dmas = <&dmac1 27 0xffffffff>, 271 dmas = <&dmac1 27 0xffffffff>, <&dmac1 26 0xffffffff>;
272 dma-names = "rx", "tx"; 272 dma-names = "rx", "tx";
273 273
274 cap-sd-highspeed; 274 cap-sd-highspeed;
275 cap-mmc-highspeed; 275 cap-mmc-highspeed;
276 cap-sdio-irq; 276 cap-sdio-irq;
277 277
278 status = "disabled"; 278 status = "disabled";
279 }; 279 };
280 280
281 mmc1: mmc@10022000 { 281 mmc1: mmc@10022000 {
282 compatible = "ingenic,jz4770-m 282 compatible = "ingenic,jz4770-mmc", "ingenic,jz4760-mmc";
283 reg = <0x10022000 0x1000>; 283 reg = <0x10022000 0x1000>;
284 284
285 clocks = <&cgu JZ4770_CLK_MMC1 285 clocks = <&cgu JZ4770_CLK_MMC1>;
286 clock-names = "mmc"; 286 clock-names = "mmc";
287 287
288 interrupt-parent = <&intc>; 288 interrupt-parent = <&intc>;
289 interrupts = <36>; 289 interrupts = <36>;
290 290
291 dmas = <&dmac1 31 0xffffffff>, 291 dmas = <&dmac1 31 0xffffffff>, <&dmac1 30 0xffffffff>;
292 dma-names = "rx", "tx"; 292 dma-names = "rx", "tx";
293 293
294 cap-sd-highspeed; 294 cap-sd-highspeed;
295 cap-mmc-highspeed; 295 cap-mmc-highspeed;
296 cap-sdio-irq; 296 cap-sdio-irq;
297 297
298 status = "disabled"; 298 status = "disabled";
299 }; 299 };
300 300
301 mmc2: mmc@10023000 { 301 mmc2: mmc@10023000 {
302 compatible = "ingenic,jz4770-m 302 compatible = "ingenic,jz4770-mmc", "ingenic,jz4760-mmc";
303 reg = <0x10023000 0x1000>; 303 reg = <0x10023000 0x1000>;
304 304
305 clocks = <&cgu JZ4770_CLK_MMC2 305 clocks = <&cgu JZ4770_CLK_MMC2>;
306 clock-names = "mmc"; 306 clock-names = "mmc";
307 307
308 interrupt-parent = <&intc>; 308 interrupt-parent = <&intc>;
309 interrupts = <35>; 309 interrupts = <35>;
310 310
311 dmas = <&dmac1 37 0xffffffff>, 311 dmas = <&dmac1 37 0xffffffff>, <&dmac1 36 0xffffffff>;
312 dma-names = "rx", "tx"; 312 dma-names = "rx", "tx";
313 313
314 cap-sd-highspeed; 314 cap-sd-highspeed;
315 cap-mmc-highspeed; 315 cap-mmc-highspeed;
316 cap-sdio-irq; 316 cap-sdio-irq;
317 317
318 status = "disabled"; 318 status = "disabled";
319 }; 319 };
320 320
321 uart0: serial@10030000 { 321 uart0: serial@10030000 {
322 compatible = "ingenic,jz4770-u 322 compatible = "ingenic,jz4770-uart";
323 reg = <0x10030000 0x100>; 323 reg = <0x10030000 0x100>;
324 324
325 clocks = <&ext>, <&cgu JZ4770_ 325 clocks = <&ext>, <&cgu JZ4770_CLK_UART0>;
326 clock-names = "baud", "module" 326 clock-names = "baud", "module";
327 327
328 interrupt-parent = <&intc>; 328 interrupt-parent = <&intc>;
329 interrupts = <5>; 329 interrupts = <5>;
330 330
331 status = "disabled"; 331 status = "disabled";
332 }; 332 };
333 333
334 uart1: serial@10031000 { 334 uart1: serial@10031000 {
335 compatible = "ingenic,jz4770-u 335 compatible = "ingenic,jz4770-uart";
336 reg = <0x10031000 0x100>; 336 reg = <0x10031000 0x100>;
337 337
338 clocks = <&ext>, <&cgu JZ4770_ 338 clocks = <&ext>, <&cgu JZ4770_CLK_UART1>;
339 clock-names = "baud", "module" 339 clock-names = "baud", "module";
340 340
341 interrupt-parent = <&intc>; 341 interrupt-parent = <&intc>;
342 interrupts = <4>; 342 interrupts = <4>;
343 343
344 status = "disabled"; 344 status = "disabled";
345 }; 345 };
346 346
347 uart2: serial@10032000 { 347 uart2: serial@10032000 {
348 compatible = "ingenic,jz4770-u 348 compatible = "ingenic,jz4770-uart";
349 reg = <0x10032000 0x100>; 349 reg = <0x10032000 0x100>;
350 350
351 clocks = <&ext>, <&cgu JZ4770_ 351 clocks = <&ext>, <&cgu JZ4770_CLK_UART2>;
352 clock-names = "baud", "module" 352 clock-names = "baud", "module";
353 353
354 interrupt-parent = <&intc>; 354 interrupt-parent = <&intc>;
355 interrupts = <3>; 355 interrupts = <3>;
356 356
357 status = "disabled"; 357 status = "disabled";
358 }; 358 };
359 359
360 uart3: serial@10033000 { 360 uart3: serial@10033000 {
361 compatible = "ingenic,jz4770-u 361 compatible = "ingenic,jz4770-uart";
362 reg = <0x10033000 0x100>; 362 reg = <0x10033000 0x100>;
363 363
364 clocks = <&ext>, <&cgu JZ4770_ 364 clocks = <&ext>, <&cgu JZ4770_CLK_UART3>;
365 clock-names = "baud", "module" 365 clock-names = "baud", "module";
366 366
367 interrupt-parent = <&intc>; 367 interrupt-parent = <&intc>;
368 interrupts = <2>; 368 interrupts = <2>;
369 369
370 status = "disabled"; 370 status = "disabled";
371 }; 371 };
372 372
373 adc: adc@10070000 { 373 adc: adc@10070000 {
374 compatible = "ingenic,jz4770-a 374 compatible = "ingenic,jz4770-adc";
375 reg = <0x10070000 0x30>; 375 reg = <0x10070000 0x30>;
376 376
377 #io-channel-cells = <1>; 377 #io-channel-cells = <1>;
378 378
379 clocks = <&cgu JZ4770_CLK_ADC> 379 clocks = <&cgu JZ4770_CLK_ADC>;
380 clock-names = "adc"; 380 clock-names = "adc";
381 381
382 interrupt-parent = <&intc>; 382 interrupt-parent = <&intc>;
383 interrupts = <18>; 383 interrupts = <18>;
384 }; 384 };
385 385
386 gpu: gpu@13040000 { 386 gpu: gpu@13040000 {
387 compatible = "vivante,gc"; 387 compatible = "vivante,gc";
388 reg = <0x13040000 0x10000>; 388 reg = <0x13040000 0x10000>;
389 389
390 clocks = <&cgu JZ4770_CLK_GPU> 390 clocks = <&cgu JZ4770_CLK_GPU>,
391 <&cgu JZ4770_CLK_GPU> 391 <&cgu JZ4770_CLK_GPU>,
392 <&cgu JZ4770_CLK_GPU> 392 <&cgu JZ4770_CLK_GPU>;
393 clock-names = "bus", "core", " 393 clock-names = "bus", "core", "shader";
394 394
395 interrupt-parent = <&intc>; 395 interrupt-parent = <&intc>;
396 interrupts = <6>; 396 interrupts = <6>;
397 }; 397 };
398 398
399 lcd: lcd-controller@13050000 { 399 lcd: lcd-controller@13050000 {
400 compatible = "ingenic,jz4770-l 400 compatible = "ingenic,jz4770-lcd";
401 reg = <0x13050000 0x130>; /* t 401 reg = <0x13050000 0x130>; /* tbc */
402 402
403 interrupt-parent = <&intc>; 403 interrupt-parent = <&intc>;
404 interrupts = <31>; 404 interrupts = <31>;
405 405
406 clocks = <&cgu JZ4770_CLK_LPCL 406 clocks = <&cgu JZ4770_CLK_LPCLK_MUX>;
407 clock-names = "lcd_pclk"; 407 clock-names = "lcd_pclk";
408 }; 408 };
409 409
410 dmac0: dma-controller@13420000 { 410 dmac0: dma-controller@13420000 {
411 compatible = "ingenic,jz4770-d 411 compatible = "ingenic,jz4770-dma";
412 reg = <0x13420000 0xC0>, <0x13 412 reg = <0x13420000 0xC0>, <0x13420300 0x20>;
413 413
414 #dma-cells = <2>; 414 #dma-cells = <2>;
415 415
416 clocks = <&cgu JZ4770_CLK_DMA> 416 clocks = <&cgu JZ4770_CLK_DMA>;
417 interrupt-parent = <&intc>; 417 interrupt-parent = <&intc>;
418 interrupts = <24>; 418 interrupts = <24>;
419 }; 419 };
420 420
421 dmac1: dma-controller@13420100 { 421 dmac1: dma-controller@13420100 {
422 compatible = "ingenic,jz4770-d 422 compatible = "ingenic,jz4770-dma";
423 reg = <0x13420100 0xC0>, <0x13 423 reg = <0x13420100 0xC0>, <0x13420400 0x20>;
424 424
425 #dma-cells = <2>; 425 #dma-cells = <2>;
426 426
427 clocks = <&cgu JZ4770_CLK_DMA> 427 clocks = <&cgu JZ4770_CLK_DMA>;
428 interrupt-parent = <&intc>; 428 interrupt-parent = <&intc>;
429 interrupts = <23>; 429 interrupts = <23>;
430 }; 430 };
431 431
432 uhc: usb@13430000 { 432 uhc: usb@13430000 {
433 compatible = "generic-ohci"; 433 compatible = "generic-ohci";
434 reg = <0x13430000 0x1000>; 434 reg = <0x13430000 0x1000>;
435 435
436 clocks = <&cgu JZ4770_CLK_UHC> 436 clocks = <&cgu JZ4770_CLK_UHC>, <&cgu JZ4770_CLK_UHC_PHY>;
437 assigned-clocks = <&cgu JZ4770 437 assigned-clocks = <&cgu JZ4770_CLK_UHC>;
438 assigned-clock-rates = <480000 438 assigned-clock-rates = <48000000>;
439 439
440 interrupt-parent = <&intc>; 440 interrupt-parent = <&intc>;
441 interrupts = <20>; 441 interrupts = <20>;
442 442
443 status = "disabled"; 443 status = "disabled";
444 }; 444 };
445 445
446 usb_otg: usb@13440000 { 446 usb_otg: usb@13440000 {
447 compatible = "ingenic,jz4770-m 447 compatible = "ingenic,jz4770-musb";
448 reg = <0x13440000 0x10000>; 448 reg = <0x13440000 0x10000>;
449 449
450 clocks = <&cgu JZ4770_CLK_OTG> 450 clocks = <&cgu JZ4770_CLK_OTG>;
451 clock-names = "udc"; 451 clock-names = "udc";
452 452
453 interrupt-parent = <&intc>; 453 interrupt-parent = <&intc>;
454 interrupts = <21>; 454 interrupts = <21>;
455 interrupt-names = "mc"; 455 interrupt-names = "mc";
456 456
457 phys = <&otg_phy>; 457 phys = <&otg_phy>;
458 458
459 usb-role-switch; 459 usb-role-switch;
460 }; 460 };
461 461
462 rom: memory@1fc00000 { 462 rom: memory@1fc00000 {
463 compatible = "mtd-rom"; 463 compatible = "mtd-rom";
464 reg = <0x1fc00000 0x2000>; 464 reg = <0x1fc00000 0x2000>;
465 465
466 bank-width = <4>; 466 bank-width = <4>;
467 device-width = <1>; 467 device-width = <1>;
468 }; 468 };
469 }; 469 };
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.