1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4780-cgu 2 #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h> 3 #include <dt-bindings/clock/ingenic,tcu.h>
4 #include <dt-bindings/dma/jz4780-dma.h> 4 #include <dt-bindings/dma/jz4780-dma.h>
5 5
6 / { 6 / {
7 #address-cells = <1>; 7 #address-cells = <1>;
8 #size-cells = <1>; 8 #size-cells = <1>;
9 compatible = "ingenic,jz4780"; 9 compatible = "ingenic,jz4780";
10 10
11 cpus { 11 cpus {
12 #address-cells = <1>; 12 #address-cells = <1>;
13 #size-cells = <0>; 13 #size-cells = <0>;
14 14
15 cpu0: cpu@0 { 15 cpu0: cpu@0 {
16 device_type = "cpu"; 16 device_type = "cpu";
17 compatible = "ingenic, 17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
18 reg = <0>; 18 reg = <0>;
19 19
20 clocks = <&cgu JZ4780_ 20 clocks = <&cgu JZ4780_CLK_CPU>;
21 clock-names = "cpu"; 21 clock-names = "cpu";
22 }; 22 };
23 23
24 cpu1: cpu@1 { 24 cpu1: cpu@1 {
25 device_type = "cpu"; 25 device_type = "cpu";
26 compatible = "ingenic, 26 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
27 reg = <1>; 27 reg = <1>;
28 28
29 clocks = <&cgu JZ4780_ 29 clocks = <&cgu JZ4780_CLK_CORE1>;
30 clock-names = "cpu"; 30 clock-names = "cpu";
31 }; 31 };
32 }; 32 };
33 33
34 cpuintc: interrupt-controller { 34 cpuintc: interrupt-controller {
35 #address-cells = <0>; 35 #address-cells = <0>;
36 #interrupt-cells = <1>; 36 #interrupt-cells = <1>;
37 interrupt-controller; 37 interrupt-controller;
38 compatible = "mti,cpu-interrup 38 compatible = "mti,cpu-interrupt-controller";
39 }; 39 };
40 40
41 intc: interrupt-controller@10001000 { 41 intc: interrupt-controller@10001000 {
42 compatible = "ingenic,jz4780-i 42 compatible = "ingenic,jz4780-intc";
43 reg = <0x10001000 0x50>; 43 reg = <0x10001000 0x50>;
44 44
45 interrupt-controller; 45 interrupt-controller;
46 #interrupt-cells = <1>; 46 #interrupt-cells = <1>;
47 47
48 interrupt-parent = <&cpuintc>; 48 interrupt-parent = <&cpuintc>;
49 interrupts = <2>; 49 interrupts = <2>;
50 }; 50 };
51 51
52 ext: ext { 52 ext: ext {
53 compatible = "fixed-clock"; 53 compatible = "fixed-clock";
54 #clock-cells = <0>; 54 #clock-cells = <0>;
55 }; 55 };
56 56
57 rtc: rtc { 57 rtc: rtc {
58 compatible = "fixed-clock"; 58 compatible = "fixed-clock";
59 #clock-cells = <0>; 59 #clock-cells = <0>;
60 clock-frequency = <32768>; 60 clock-frequency = <32768>;
61 }; 61 };
62 62
63 cgu: jz4780-cgu@10000000 { 63 cgu: jz4780-cgu@10000000 {
64 compatible = "ingenic,jz4780-c 64 compatible = "ingenic,jz4780-cgu", "simple-mfd";
65 reg = <0x10000000 0x100>; 65 reg = <0x10000000 0x100>;
66 #address-cells = <1>; 66 #address-cells = <1>;
67 #size-cells = <1>; 67 #size-cells = <1>;
68 ranges = <0x0 0x10000000 0x100 68 ranges = <0x0 0x10000000 0x100>;
69 69
70 #clock-cells = <1>; 70 #clock-cells = <1>;
71 71
72 clocks = <&ext>, <&rtc>; 72 clocks = <&ext>, <&rtc>;
73 clock-names = "ext", "rtc"; 73 clock-names = "ext", "rtc";
74 74
75 otg_phy: usb-phy@3c { 75 otg_phy: usb-phy@3c {
76 compatible = "ingenic, 76 compatible = "ingenic,jz4780-phy";
77 reg = <0x3c 0x10>; 77 reg = <0x3c 0x10>;
78 78
79 clocks = <&cgu JZ4780_ 79 clocks = <&cgu JZ4780_CLK_OTG1>;
80 80
81 #phy-cells = <0>; 81 #phy-cells = <0>;
82 82
83 status = "disabled"; 83 status = "disabled";
84 }; 84 };
85 85
86 rng: rng@d8 { 86 rng: rng@d8 {
87 compatible = "ingenic, 87 compatible = "ingenic,jz4780-rng";
88 reg = <0xd8 0x8>; 88 reg = <0xd8 0x8>;
89 89
90 status = "disabled"; 90 status = "disabled";
91 }; 91 };
92 }; 92 };
93 93
94 tcu: timer@10002000 { 94 tcu: timer@10002000 {
95 compatible = "ingenic,jz4780-t 95 compatible = "ingenic,jz4780-tcu",
96 "ingenic,jz4770-t 96 "ingenic,jz4770-tcu",
97 "simple-mfd"; 97 "simple-mfd";
98 reg = <0x10002000 0x1000>; 98 reg = <0x10002000 0x1000>;
99 #address-cells = <1>; 99 #address-cells = <1>;
100 #size-cells = <1>; 100 #size-cells = <1>;
101 ranges = <0x0 0x10002000 0x100 101 ranges = <0x0 0x10002000 0x1000>;
102 102
103 #clock-cells = <1>; 103 #clock-cells = <1>;
104 104
105 clocks = <&cgu JZ4780_CLK_RTCL 105 clocks = <&cgu JZ4780_CLK_RTCLK>,
106 <&cgu JZ4780_CLK_EXCL 106 <&cgu JZ4780_CLK_EXCLK>,
107 <&cgu JZ4780_CLK_PCLK 107 <&cgu JZ4780_CLK_PCLK>;
108 clock-names = "rtc", "ext", "p 108 clock-names = "rtc", "ext", "pclk";
109 109
110 interrupt-controller; 110 interrupt-controller;
111 #interrupt-cells = <1>; 111 #interrupt-cells = <1>;
112 112
113 interrupt-parent = <&intc>; 113 interrupt-parent = <&intc>;
114 interrupts = <27 26 25>; 114 interrupts = <27 26 25>;
115 115
116 watchdog: watchdog@0 { 116 watchdog: watchdog@0 {
117 compatible = "ingenic, 117 compatible = "ingenic,jz4780-watchdog";
118 reg = <0x0 0xc>; 118 reg = <0x0 0xc>;
119 119
120 clocks = <&tcu TCU_CLK 120 clocks = <&tcu TCU_CLK_WDT>;
121 clock-names = "wdt"; 121 clock-names = "wdt";
122 }; 122 };
123 123
124 pwm: pwm@40 { 124 pwm: pwm@40 {
125 compatible = "ingenic, 125 compatible = "ingenic,jz4780-pwm", "ingenic,jz4740-pwm";
126 reg = <0x40 0x80>; 126 reg = <0x40 0x80>;
127 127
128 #pwm-cells = <3>; 128 #pwm-cells = <3>;
129 129
130 clocks = <&tcu TCU_CLK 130 clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
131 <&tcu TCU_CLK 131 <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>,
132 <&tcu TCU_CLK 132 <&tcu TCU_CLK_TIMER4>, <&tcu TCU_CLK_TIMER5>,
133 <&tcu TCU_CLK 133 <&tcu TCU_CLK_TIMER6>, <&tcu TCU_CLK_TIMER7>;
134 clock-names = "timer0" 134 clock-names = "timer0", "timer1", "timer2", "timer3",
135 "timer4" 135 "timer4", "timer5", "timer6", "timer7";
136 }; 136 };
137 137
138 ost: timer@e0 { 138 ost: timer@e0 {
139 compatible = "ingenic, 139 compatible = "ingenic,jz4780-ost", "ingenic,jz4770-ost";
140 reg = <0xe0 0x20>; 140 reg = <0xe0 0x20>;
141 141
142 clocks = <&tcu TCU_CLK 142 clocks = <&tcu TCU_CLK_OST>;
143 clock-names = "ost"; 143 clock-names = "ost";
144 144
145 interrupts = <15>; 145 interrupts = <15>;
146 }; 146 };
147 }; 147 };
148 148
149 rtc_dev: rtc@10003000 { 149 rtc_dev: rtc@10003000 {
150 compatible = "ingenic,jz4780-r 150 compatible = "ingenic,jz4780-rtc";
151 reg = <0x10003000 0x4c>; 151 reg = <0x10003000 0x4c>;
152 152
153 interrupt-parent = <&intc>; 153 interrupt-parent = <&intc>;
154 interrupts = <32>; 154 interrupts = <32>;
155 155
156 clocks = <&cgu JZ4780_CLK_RTCL 156 clocks = <&cgu JZ4780_CLK_RTCLK>;
157 clock-names = "rtc"; 157 clock-names = "rtc";
158 158
159 #clock-cells = <0>; 159 #clock-cells = <0>;
160 }; 160 };
161 161
162 pinctrl: pin-controller@10010000 { 162 pinctrl: pin-controller@10010000 {
163 compatible = "ingenic,jz4780-p 163 compatible = "ingenic,jz4780-pinctrl";
164 reg = <0x10010000 0x600>; 164 reg = <0x10010000 0x600>;
165 165
166 #address-cells = <1>; 166 #address-cells = <1>;
167 #size-cells = <0>; 167 #size-cells = <0>;
168 168
169 gpa: gpio@0 { 169 gpa: gpio@0 {
170 compatible = "ingenic, 170 compatible = "ingenic,jz4780-gpio";
171 reg = <0>; 171 reg = <0>;
172 172
173 gpio-controller; 173 gpio-controller;
174 gpio-ranges = <&pinctr 174 gpio-ranges = <&pinctrl 0 0 32>;
175 #gpio-cells = <2>; 175 #gpio-cells = <2>;
176 176
177 interrupt-controller; 177 interrupt-controller;
178 #interrupt-cells = <2> 178 #interrupt-cells = <2>;
179 179
180 interrupt-parent = <&i 180 interrupt-parent = <&intc>;
181 interrupts = <17>; 181 interrupts = <17>;
182 }; 182 };
183 183
184 gpb: gpio@1 { 184 gpb: gpio@1 {
185 compatible = "ingenic, 185 compatible = "ingenic,jz4780-gpio";
186 reg = <1>; 186 reg = <1>;
187 187
188 gpio-controller; 188 gpio-controller;
189 gpio-ranges = <&pinctr 189 gpio-ranges = <&pinctrl 0 32 32>;
190 #gpio-cells = <2>; 190 #gpio-cells = <2>;
191 191
192 interrupt-controller; 192 interrupt-controller;
193 #interrupt-cells = <2> 193 #interrupt-cells = <2>;
194 194
195 interrupt-parent = <&i 195 interrupt-parent = <&intc>;
196 interrupts = <16>; 196 interrupts = <16>;
197 }; 197 };
198 198
199 gpc: gpio@2 { 199 gpc: gpio@2 {
200 compatible = "ingenic, 200 compatible = "ingenic,jz4780-gpio";
201 reg = <2>; 201 reg = <2>;
202 202
203 gpio-controller; 203 gpio-controller;
204 gpio-ranges = <&pinctr 204 gpio-ranges = <&pinctrl 0 64 32>;
205 #gpio-cells = <2>; 205 #gpio-cells = <2>;
206 206
207 interrupt-controller; 207 interrupt-controller;
208 #interrupt-cells = <2> 208 #interrupt-cells = <2>;
209 209
210 interrupt-parent = <&i 210 interrupt-parent = <&intc>;
211 interrupts = <15>; 211 interrupts = <15>;
212 }; 212 };
213 213
214 gpd: gpio@3 { 214 gpd: gpio@3 {
215 compatible = "ingenic, 215 compatible = "ingenic,jz4780-gpio";
216 reg = <3>; 216 reg = <3>;
217 217
218 gpio-controller; 218 gpio-controller;
219 gpio-ranges = <&pinctr 219 gpio-ranges = <&pinctrl 0 96 32>;
220 #gpio-cells = <2>; 220 #gpio-cells = <2>;
221 221
222 interrupt-controller; 222 interrupt-controller;
223 #interrupt-cells = <2> 223 #interrupt-cells = <2>;
224 224
225 interrupt-parent = <&i 225 interrupt-parent = <&intc>;
226 interrupts = <14>; 226 interrupts = <14>;
227 }; 227 };
228 228
229 gpe: gpio@4 { 229 gpe: gpio@4 {
230 compatible = "ingenic, 230 compatible = "ingenic,jz4780-gpio";
231 reg = <4>; 231 reg = <4>;
232 232
233 gpio-controller; 233 gpio-controller;
234 gpio-ranges = <&pinctr 234 gpio-ranges = <&pinctrl 0 128 32>;
235 #gpio-cells = <2>; 235 #gpio-cells = <2>;
236 236
237 interrupt-controller; 237 interrupt-controller;
238 #interrupt-cells = <2> 238 #interrupt-cells = <2>;
239 239
240 interrupt-parent = <&i 240 interrupt-parent = <&intc>;
241 interrupts = <13>; 241 interrupts = <13>;
242 }; 242 };
243 243
244 gpf: gpio@5 { 244 gpf: gpio@5 {
245 compatible = "ingenic, 245 compatible = "ingenic,jz4780-gpio";
246 reg = <5>; 246 reg = <5>;
247 247
248 gpio-controller; 248 gpio-controller;
249 gpio-ranges = <&pinctr 249 gpio-ranges = <&pinctrl 0 160 32>;
250 #gpio-cells = <2>; 250 #gpio-cells = <2>;
251 251
252 interrupt-controller; 252 interrupt-controller;
253 #interrupt-cells = <2> 253 #interrupt-cells = <2>;
254 254
255 interrupt-parent = <&i 255 interrupt-parent = <&intc>;
256 interrupts = <12>; 256 interrupts = <12>;
257 }; 257 };
258 }; 258 };
259 259
260 spi0: spi@10043000 { 260 spi0: spi@10043000 {
261 compatible = "ingenic,jz4780-s 261 compatible = "ingenic,jz4780-spi";
262 reg = <0x10043000 0x1c>; 262 reg = <0x10043000 0x1c>;
263 #address-cells = <1>; 263 #address-cells = <1>;
264 #size-cells = <0>; 264 #size-cells = <0>;
265 265
266 interrupt-parent = <&intc>; 266 interrupt-parent = <&intc>;
267 interrupts = <8>; 267 interrupts = <8>;
268 268
269 clocks = <&cgu JZ4780_CLK_SSI0 269 clocks = <&cgu JZ4780_CLK_SSI0>;
270 clock-names = "spi"; 270 clock-names = "spi";
271 271
272 dmas = <&dma JZ4780_DMA_SSI0_R 272 dmas = <&dma JZ4780_DMA_SSI0_RX 0xffffffff>,
273 <&dma JZ4780_DMA_SSI0_T 273 <&dma JZ4780_DMA_SSI0_TX 0xffffffff>;
274 dma-names = "rx", "tx"; 274 dma-names = "rx", "tx";
275 275
276 status = "disabled"; 276 status = "disabled";
277 }; 277 };
278 278
279 uart0: serial@10030000 { 279 uart0: serial@10030000 {
280 compatible = "ingenic,jz4780-u 280 compatible = "ingenic,jz4780-uart";
281 reg = <0x10030000 0x100>; 281 reg = <0x10030000 0x100>;
282 282
283 interrupt-parent = <&intc>; 283 interrupt-parent = <&intc>;
284 interrupts = <51>; 284 interrupts = <51>;
285 285
286 clocks = <&ext>, <&cgu JZ4780_ 286 clocks = <&ext>, <&cgu JZ4780_CLK_UART0>;
287 clock-names = "baud", "module" 287 clock-names = "baud", "module";
288 288
289 status = "disabled"; 289 status = "disabled";
290 }; 290 };
291 291
292 uart1: serial@10031000 { 292 uart1: serial@10031000 {
293 compatible = "ingenic,jz4780-u 293 compatible = "ingenic,jz4780-uart";
294 reg = <0x10031000 0x100>; 294 reg = <0x10031000 0x100>;
295 295
296 interrupt-parent = <&intc>; 296 interrupt-parent = <&intc>;
297 interrupts = <50>; 297 interrupts = <50>;
298 298
299 clocks = <&ext>, <&cgu JZ4780_ 299 clocks = <&ext>, <&cgu JZ4780_CLK_UART1>;
300 clock-names = "baud", "module" 300 clock-names = "baud", "module";
301 301
302 status = "disabled"; 302 status = "disabled";
303 }; 303 };
304 304
305 uart2: serial@10032000 { 305 uart2: serial@10032000 {
306 compatible = "ingenic,jz4780-u 306 compatible = "ingenic,jz4780-uart";
307 reg = <0x10032000 0x100>; 307 reg = <0x10032000 0x100>;
308 308
309 interrupt-parent = <&intc>; 309 interrupt-parent = <&intc>;
310 interrupts = <49>; 310 interrupts = <49>;
311 311
312 clocks = <&ext>, <&cgu JZ4780_ 312 clocks = <&ext>, <&cgu JZ4780_CLK_UART2>;
313 clock-names = "baud", "module" 313 clock-names = "baud", "module";
314 314
315 status = "disabled"; 315 status = "disabled";
316 }; 316 };
317 317
318 uart3: serial@10033000 { 318 uart3: serial@10033000 {
319 compatible = "ingenic,jz4780-u 319 compatible = "ingenic,jz4780-uart";
320 reg = <0x10033000 0x100>; 320 reg = <0x10033000 0x100>;
321 321
322 interrupt-parent = <&intc>; 322 interrupt-parent = <&intc>;
323 interrupts = <48>; 323 interrupts = <48>;
324 324
325 clocks = <&ext>, <&cgu JZ4780_ 325 clocks = <&ext>, <&cgu JZ4780_CLK_UART3>;
326 clock-names = "baud", "module" 326 clock-names = "baud", "module";
327 327
328 status = "disabled"; 328 status = "disabled";
329 }; 329 };
330 330
331 uart4: serial@10034000 { 331 uart4: serial@10034000 {
332 compatible = "ingenic,jz4780-u 332 compatible = "ingenic,jz4780-uart";
333 reg = <0x10034000 0x100>; 333 reg = <0x10034000 0x100>;
334 334
335 interrupt-parent = <&intc>; 335 interrupt-parent = <&intc>;
336 interrupts = <34>; 336 interrupts = <34>;
337 337
338 clocks = <&ext>, <&cgu JZ4780_ 338 clocks = <&ext>, <&cgu JZ4780_CLK_UART4>;
339 clock-names = "baud", "module" 339 clock-names = "baud", "module";
340 340
341 status = "disabled"; 341 status = "disabled";
342 }; 342 };
343 343
344 spi1: spi@10044000 { 344 spi1: spi@10044000 {
345 compatible = "ingenic,jz4780-s 345 compatible = "ingenic,jz4780-spi";
346 reg = <0x10044000 0x1c>; 346 reg = <0x10044000 0x1c>;
347 #address-cells = <1>; 347 #address-cells = <1>;
348 #size-sells = <0>; 348 #size-sells = <0>;
349 349
350 interrupt-parent = <&intc>; 350 interrupt-parent = <&intc>;
351 interrupts = <7>; 351 interrupts = <7>;
352 352
353 clocks = <&cgu JZ4780_CLK_SSI1 353 clocks = <&cgu JZ4780_CLK_SSI1>;
354 clock-names = "spi"; 354 clock-names = "spi";
355 355
356 dmas = <&dma JZ4780_DMA_SSI1_R 356 dmas = <&dma JZ4780_DMA_SSI1_RX 0xffffffff>,
357 <&dma JZ4780_DMA_SSI1_T 357 <&dma JZ4780_DMA_SSI1_TX 0xffffffff>;
358 dma-names = "rx", "tx"; 358 dma-names = "rx", "tx";
359 359
360 status = "disabled"; 360 status = "disabled";
361 }; 361 };
362 362
363 i2c0: i2c@10050000 { 363 i2c0: i2c@10050000 {
364 compatible = "ingenic,jz4780-i 364 compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
365 #address-cells = <1>; 365 #address-cells = <1>;
366 #size-cells = <0>; 366 #size-cells = <0>;
367 367
368 reg = <0x10050000 0x1000>; 368 reg = <0x10050000 0x1000>;
369 369
370 interrupt-parent = <&intc>; 370 interrupt-parent = <&intc>;
371 interrupts = <60>; 371 interrupts = <60>;
372 372
373 clocks = <&cgu JZ4780_CLK_SMB0 373 clocks = <&cgu JZ4780_CLK_SMB0>;
374 clock-frequency = <100000>; 374 clock-frequency = <100000>;
375 pinctrl-names = "default"; 375 pinctrl-names = "default";
376 pinctrl-0 = <&pins_i2c0_data>; 376 pinctrl-0 = <&pins_i2c0_data>;
377 377
378 status = "disabled"; 378 status = "disabled";
379 }; 379 };
380 380
381 i2c1: i2c@10051000 { 381 i2c1: i2c@10051000 {
382 compatible = "ingenic,jz4780-i 382 compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
383 #address-cells = <1>; 383 #address-cells = <1>;
384 #size-cells = <0>; 384 #size-cells = <0>;
385 reg = <0x10051000 0x1000>; 385 reg = <0x10051000 0x1000>;
386 386
387 interrupt-parent = <&intc>; 387 interrupt-parent = <&intc>;
388 interrupts = <59>; 388 interrupts = <59>;
389 389
390 clocks = <&cgu JZ4780_CLK_SMB1 390 clocks = <&cgu JZ4780_CLK_SMB1>;
391 clock-frequency = <100000>; 391 clock-frequency = <100000>;
392 pinctrl-names = "default"; 392 pinctrl-names = "default";
393 pinctrl-0 = <&pins_i2c1_data>; 393 pinctrl-0 = <&pins_i2c1_data>;
394 394
395 status = "disabled"; 395 status = "disabled";
396 }; 396 };
397 397
398 i2c2: i2c@10052000 { 398 i2c2: i2c@10052000 {
399 compatible = "ingenic,jz4780-i 399 compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
400 #address-cells = <1>; 400 #address-cells = <1>;
401 #size-cells = <0>; 401 #size-cells = <0>;
402 reg = <0x10052000 0x1000>; 402 reg = <0x10052000 0x1000>;
403 403
404 interrupt-parent = <&intc>; 404 interrupt-parent = <&intc>;
405 interrupts = <58>; 405 interrupts = <58>;
406 406
407 clocks = <&cgu JZ4780_CLK_SMB2 407 clocks = <&cgu JZ4780_CLK_SMB2>;
408 clock-frequency = <100000>; 408 clock-frequency = <100000>;
409 pinctrl-names = "default"; 409 pinctrl-names = "default";
410 pinctrl-0 = <&pins_i2c2_data>; 410 pinctrl-0 = <&pins_i2c2_data>;
411 411
412 status = "disabled"; 412 status = "disabled";
413 }; 413 };
414 414
415 i2c3: i2c@10053000 { 415 i2c3: i2c@10053000 {
416 compatible = "ingenic,jz4780-i 416 compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
417 #address-cells = <1>; 417 #address-cells = <1>;
418 #size-cells = <0>; 418 #size-cells = <0>;
419 reg = <0x10053000 0x1000>; 419 reg = <0x10053000 0x1000>;
420 420
421 interrupt-parent = <&intc>; 421 interrupt-parent = <&intc>;
422 interrupts = <57>; 422 interrupts = <57>;
423 423
424 clocks = <&cgu JZ4780_CLK_SMB3 424 clocks = <&cgu JZ4780_CLK_SMB3>;
425 clock-frequency = <100000>; 425 clock-frequency = <100000>;
426 pinctrl-names = "default"; 426 pinctrl-names = "default";
427 pinctrl-0 = <&pins_i2c3_data>; 427 pinctrl-0 = <&pins_i2c3_data>;
428 428
429 status = "disabled"; 429 status = "disabled";
430 }; 430 };
431 431
432 i2c4: i2c@10054000 { 432 i2c4: i2c@10054000 {
433 compatible = "ingenic,jz4780-i 433 compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
434 #address-cells = <1>; 434 #address-cells = <1>;
435 #size-cells = <0>; 435 #size-cells = <0>;
436 reg = <0x10054000 0x1000>; 436 reg = <0x10054000 0x1000>;
437 437
438 interrupt-parent = <&intc>; 438 interrupt-parent = <&intc>;
439 interrupts = <56>; 439 interrupts = <56>;
440 440
441 clocks = <&cgu JZ4780_CLK_SMB4 441 clocks = <&cgu JZ4780_CLK_SMB4>;
442 clock-frequency = <100000>; 442 clock-frequency = <100000>;
443 pinctrl-names = "default"; 443 pinctrl-names = "default";
444 pinctrl-0 = <&pins_i2c4_data>; 444 pinctrl-0 = <&pins_i2c4_data>;
445 445
446 status = "disabled"; 446 status = "disabled";
447 }; 447 };
448 448
449 hdmi: hdmi@10180000 { 449 hdmi: hdmi@10180000 {
450 compatible = "ingenic,jz4780-d 450 compatible = "ingenic,jz4780-dw-hdmi";
451 reg = <0x10180000 0x8000>; 451 reg = <0x10180000 0x8000>;
452 reg-io-width = <4>; 452 reg-io-width = <4>;
453 453
454 clocks = <&cgu JZ4780_CLK_AHB0 454 clocks = <&cgu JZ4780_CLK_AHB0>, <&cgu JZ4780_CLK_HDMI>;
455 clock-names = "iahb", "isfr"; 455 clock-names = "iahb", "isfr";
456 456
457 interrupt-parent = <&intc>; 457 interrupt-parent = <&intc>;
458 interrupts = <3>; 458 interrupts = <3>;
459 459
460 status = "disabled"; 460 status = "disabled";
461 }; 461 };
462 462
463 lcdc0: lcdc0@13050000 { 463 lcdc0: lcdc0@13050000 {
464 compatible = "ingenic,jz4780-l 464 compatible = "ingenic,jz4780-lcd";
465 reg = <0x13050000 0x1800>; 465 reg = <0x13050000 0x1800>;
466 466
467 clocks = <&cgu JZ4780_CLK_TVE> 467 clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD0PIXCLK>;
468 clock-names = "lcd", "lcd_pclk 468 clock-names = "lcd", "lcd_pclk";
469 469
470 interrupt-parent = <&intc>; 470 interrupt-parent = <&intc>;
471 interrupts = <31>; 471 interrupts = <31>;
472 472
473 status = "disabled"; 473 status = "disabled";
474 }; 474 };
475 475
476 lcdc1: lcdc1@130a0000 { 476 lcdc1: lcdc1@130a0000 {
477 compatible = "ingenic,jz4780-l 477 compatible = "ingenic,jz4780-lcd";
478 reg = <0x130a0000 0x1800>; 478 reg = <0x130a0000 0x1800>;
479 479
480 clocks = <&cgu JZ4780_CLK_TVE> 480 clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD1PIXCLK>;
481 clock-names = "lcd", "lcd_pclk 481 clock-names = "lcd", "lcd_pclk";
482 482
483 interrupt-parent = <&intc>; 483 interrupt-parent = <&intc>;
484 interrupts = <23>; 484 interrupts = <23>;
485 485
486 status = "disabled"; 486 status = "disabled";
487 }; 487 };
488 488
489 nemc: nemc@13410000 { 489 nemc: nemc@13410000 {
490 compatible = "ingenic,jz4780-n 490 compatible = "ingenic,jz4780-nemc", "simple-mfd";
491 reg = <0x13410000 0x10000>; 491 reg = <0x13410000 0x10000>;
492 #address-cells = <2>; 492 #address-cells = <2>;
493 #size-cells = <1>; 493 #size-cells = <1>;
494 ranges = <0 0 0x13410000 0x100 494 ranges = <0 0 0x13410000 0x10000>,
495 <1 0 0x1b000000 0x100 495 <1 0 0x1b000000 0x1000000>,
496 <2 0 0x1a000000 0x100 496 <2 0 0x1a000000 0x1000000>,
497 <3 0 0x19000000 0x100 497 <3 0 0x19000000 0x1000000>,
498 <4 0 0x18000000 0x100 498 <4 0 0x18000000 0x1000000>,
499 <5 0 0x17000000 0x100 499 <5 0 0x17000000 0x1000000>,
500 <6 0 0x16000000 0x100 500 <6 0 0x16000000 0x1000000>;
501 501
502 clocks = <&cgu JZ4780_CLK_NEMC 502 clocks = <&cgu JZ4780_CLK_NEMC>;
503 503
504 status = "disabled"; 504 status = "disabled";
505 505
506 efuse: efuse@d0 { 506 efuse: efuse@d0 {
507 reg = <0 0xd0 0x30>; 507 reg = <0 0xd0 0x30>;
508 compatible = "ingenic, 508 compatible = "ingenic,jz4780-efuse";
509 509
510 clocks = <&cgu JZ4780_ 510 clocks = <&cgu JZ4780_CLK_AHB2>;
511 511
512 #address-cells = <1>; 512 #address-cells = <1>;
513 #size-cells = <1>; 513 #size-cells = <1>;
514 514
515 eth0_addr: eth-mac-add 515 eth0_addr: eth-mac-addr@22 {
516 reg = <0x22 0x 516 reg = <0x22 0x6>;
517 }; 517 };
518 }; 518 };
519 }; 519 };
520 520
521 dma: dma@13420000 { 521 dma: dma@13420000 {
522 compatible = "ingenic,jz4780-d 522 compatible = "ingenic,jz4780-dma";
523 reg = <0x13420000 0x400>, <0x1 523 reg = <0x13420000 0x400>, <0x13421000 0x40>;
524 #dma-cells = <2>; 524 #dma-cells = <2>;
525 525
526 interrupt-parent = <&intc>; 526 interrupt-parent = <&intc>;
527 interrupts = <10>; 527 interrupts = <10>;
528 528
529 clocks = <&cgu JZ4780_CLK_PDMA 529 clocks = <&cgu JZ4780_CLK_PDMA>;
530 }; 530 };
531 531
532 mmc0: mmc@13450000 { 532 mmc0: mmc@13450000 {
533 compatible = "ingenic,jz4780-m 533 compatible = "ingenic,jz4780-mmc";
534 reg = <0x13450000 0x1000>; 534 reg = <0x13450000 0x1000>;
535 535
536 interrupt-parent = <&intc>; 536 interrupt-parent = <&intc>;
537 interrupts = <37>; 537 interrupts = <37>;
538 538
539 clocks = <&cgu JZ4780_CLK_MSC0 539 clocks = <&cgu JZ4780_CLK_MSC0>;
540 clock-names = "mmc"; 540 clock-names = "mmc";
541 541
542 cap-sd-highspeed; 542 cap-sd-highspeed;
543 cap-mmc-highspeed; 543 cap-mmc-highspeed;
544 cap-sdio-irq; 544 cap-sdio-irq;
545 dmas = <&dma JZ4780_DMA_MSC0_R 545 dmas = <&dma JZ4780_DMA_MSC0_RX 0xffffffff>,
546 <&dma JZ4780_DMA_MSC0_T 546 <&dma JZ4780_DMA_MSC0_TX 0xffffffff>;
547 dma-names = "rx", "tx"; 547 dma-names = "rx", "tx";
548 548
549 status = "disabled"; 549 status = "disabled";
550 }; 550 };
551 551
552 mmc1: mmc@13460000 { 552 mmc1: mmc@13460000 {
553 compatible = "ingenic,jz4780-m 553 compatible = "ingenic,jz4780-mmc";
554 reg = <0x13460000 0x1000>; 554 reg = <0x13460000 0x1000>;
555 555
556 interrupt-parent = <&intc>; 556 interrupt-parent = <&intc>;
557 interrupts = <36>; 557 interrupts = <36>;
558 558
559 clocks = <&cgu JZ4780_CLK_MSC1 559 clocks = <&cgu JZ4780_CLK_MSC1>;
560 clock-names = "mmc"; 560 clock-names = "mmc";
561 561
562 cap-sd-highspeed; 562 cap-sd-highspeed;
563 cap-mmc-highspeed; 563 cap-mmc-highspeed;
564 cap-sdio-irq; 564 cap-sdio-irq;
565 dmas = <&dma JZ4780_DMA_MSC1_R 565 dmas = <&dma JZ4780_DMA_MSC1_RX 0xffffffff>,
566 <&dma JZ4780_DMA_MSC1_T 566 <&dma JZ4780_DMA_MSC1_TX 0xffffffff>;
567 dma-names = "rx", "tx"; 567 dma-names = "rx", "tx";
568 568
569 status = "disabled"; 569 status = "disabled";
570 }; 570 };
571 571
572 bch: bch@134d0000 { 572 bch: bch@134d0000 {
573 compatible = "ingenic,jz4780-b 573 compatible = "ingenic,jz4780-bch";
574 reg = <0x134d0000 0x10000>; 574 reg = <0x134d0000 0x10000>;
575 575
576 clocks = <&cgu JZ4780_CLK_BCH> 576 clocks = <&cgu JZ4780_CLK_BCH>;
577 577
578 status = "disabled"; 578 status = "disabled";
579 }; 579 };
580 580
581 otg: usb@13500000 { 581 otg: usb@13500000 {
582 compatible = "ingenic,jz4780-o 582 compatible = "ingenic,jz4780-otg";
583 reg = <0x13500000 0x40000>; 583 reg = <0x13500000 0x40000>;
584 584
585 interrupt-parent = <&intc>; 585 interrupt-parent = <&intc>;
586 interrupts = <21>; 586 interrupts = <21>;
587 587
588 clocks = <&cgu JZ4780_CLK_UHC> 588 clocks = <&cgu JZ4780_CLK_UHC>;
589 clock-names = "otg"; 589 clock-names = "otg";
590 590
591 phys = <&otg_phy>; 591 phys = <&otg_phy>;
592 phy-names = "usb2-phy"; 592 phy-names = "usb2-phy";
593 593
594 g-rx-fifo-size = <768>; 594 g-rx-fifo-size = <768>;
595 g-np-tx-fifo-size = <256>; 595 g-np-tx-fifo-size = <256>;
596 g-tx-fifo-size = <256 256 256 596 g-tx-fifo-size = <256 256 256 256 256 256 256 512>;
597 597
598 status = "disabled"; 598 status = "disabled";
599 }; 599 };
600 }; 600 };
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