1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,tcu.h> 2 #include <dt-bindings/clock/ingenic,tcu.h>
3 #include <dt-bindings/clock/ingenic,x1000-cgu. 3 #include <dt-bindings/clock/ingenic,x1000-cgu.h>
4 #include <dt-bindings/dma/x1000-dma.h> 4 #include <dt-bindings/dma/x1000-dma.h>
5 5
6 / { 6 / {
7 #address-cells = <1>; 7 #address-cells = <1>;
8 #size-cells = <1>; 8 #size-cells = <1>;
9 compatible = "ingenic,x1000", "ingenic 9 compatible = "ingenic,x1000", "ingenic,x1000e";
10 10
11 cpus { 11 cpus {
12 #address-cells = <1>; 12 #address-cells = <1>;
13 #size-cells = <0>; 13 #size-cells = <0>;
14 14
15 cpu0: cpu@0 { 15 cpu0: cpu@0 {
16 device_type = "cpu"; 16 device_type = "cpu";
17 compatible = "ingenic, 17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
18 reg = <0>; 18 reg = <0>;
19 19
20 clocks = <&cgu X1000_C 20 clocks = <&cgu X1000_CLK_CPU>;
21 clock-names = "cpu"; 21 clock-names = "cpu";
22 }; 22 };
23 }; 23 };
24 24
25 cpuintc: interrupt-controller { 25 cpuintc: interrupt-controller {
26 #address-cells = <0>; 26 #address-cells = <0>;
27 #interrupt-cells = <1>; 27 #interrupt-cells = <1>;
28 interrupt-controller; 28 interrupt-controller;
29 compatible = "mti,cpu-interrup 29 compatible = "mti,cpu-interrupt-controller";
30 }; 30 };
31 31
32 intc: interrupt-controller@10001000 { 32 intc: interrupt-controller@10001000 {
33 compatible = "ingenic,x1000-in 33 compatible = "ingenic,x1000-intc", "ingenic,jz4780-intc";
34 reg = <0x10001000 0x50>; 34 reg = <0x10001000 0x50>;
35 35
36 interrupt-controller; 36 interrupt-controller;
37 #interrupt-cells = <1>; 37 #interrupt-cells = <1>;
38 38
39 interrupt-parent = <&cpuintc>; 39 interrupt-parent = <&cpuintc>;
40 interrupts = <2>; 40 interrupts = <2>;
41 }; 41 };
42 42
43 exclk: ext { 43 exclk: ext {
44 compatible = "fixed-clock"; 44 compatible = "fixed-clock";
45 #clock-cells = <0>; 45 #clock-cells = <0>;
46 }; 46 };
47 47
48 rtclk: rtc { 48 rtclk: rtc {
49 compatible = "fixed-clock"; 49 compatible = "fixed-clock";
50 #clock-cells = <0>; 50 #clock-cells = <0>;
51 clock-frequency = <32768>; 51 clock-frequency = <32768>;
52 }; 52 };
53 53
54 cgu: x1000-cgu@10000000 { 54 cgu: x1000-cgu@10000000 {
55 compatible = "ingenic,x1000-cg 55 compatible = "ingenic,x1000-cgu", "simple-mfd";
56 reg = <0x10000000 0x100>; 56 reg = <0x10000000 0x100>;
57 #address-cells = <1>; 57 #address-cells = <1>;
58 #size-cells = <1>; 58 #size-cells = <1>;
59 ranges = <0x0 0x10000000 0x100 59 ranges = <0x0 0x10000000 0x100>;
60 60
61 #clock-cells = <1>; 61 #clock-cells = <1>;
62 62
63 clocks = <&exclk>, <&rtclk>; 63 clocks = <&exclk>, <&rtclk>;
64 clock-names = "ext", "rtc"; 64 clock-names = "ext", "rtc";
65 65
66 otg_phy: usb-phy@3c { 66 otg_phy: usb-phy@3c {
67 compatible = "ingenic, 67 compatible = "ingenic,x1000-phy";
68 reg = <0x3c 0x10>; 68 reg = <0x3c 0x10>;
69 69
70 clocks = <&cgu X1000_C 70 clocks = <&cgu X1000_CLK_OTGPHY>;
71 71
72 #phy-cells = <0>; 72 #phy-cells = <0>;
73 73
74 status = "disabled"; 74 status = "disabled";
75 }; 75 };
76 76
77 rng: rng@d8 { 77 rng: rng@d8 {
78 compatible = "ingenic, 78 compatible = "ingenic,x1000-rng";
79 reg = <0xd8 0x8>; 79 reg = <0xd8 0x8>;
80 80
81 status = "disabled"; 81 status = "disabled";
82 }; 82 };
83 83
84 mac_phy_ctrl: mac-phy-ctrl@e8 84 mac_phy_ctrl: mac-phy-ctrl@e8 {
85 compatible = "syscon"; 85 compatible = "syscon";
86 reg = <0xe8 0x4>; 86 reg = <0xe8 0x4>;
87 }; 87 };
88 }; 88 };
89 89
90 ost: timer@12000000 { 90 ost: timer@12000000 {
91 compatible = "ingenic,x1000-os 91 compatible = "ingenic,x1000-ost";
92 reg = <0x12000000 0x3c>; 92 reg = <0x12000000 0x3c>;
93 93
94 #clock-cells = <1>; 94 #clock-cells = <1>;
95 95
96 clocks = <&cgu X1000_CLK_OST>; 96 clocks = <&cgu X1000_CLK_OST>;
97 clock-names = "ost"; 97 clock-names = "ost";
98 98
99 interrupt-parent = <&cpuintc>; 99 interrupt-parent = <&cpuintc>;
100 interrupts = <3>; 100 interrupts = <3>;
101 }; 101 };
102 102
103 tcu: timer@10002000 { 103 tcu: timer@10002000 {
104 compatible = "ingenic,x1000-tc 104 compatible = "ingenic,x1000-tcu", "simple-mfd";
105 reg = <0x10002000 0x1000>; 105 reg = <0x10002000 0x1000>;
106 #address-cells = <1>; 106 #address-cells = <1>;
107 #size-cells = <1>; 107 #size-cells = <1>;
108 ranges = <0x0 0x10002000 0x100 108 ranges = <0x0 0x10002000 0x1000>;
109 109
110 #clock-cells = <1>; 110 #clock-cells = <1>;
111 111
112 clocks = <&cgu X1000_CLK_RTCLK 112 clocks = <&cgu X1000_CLK_RTCLK>,
113 <&cgu X1000_CLK_EXCLK 113 <&cgu X1000_CLK_EXCLK>,
114 <&cgu X1000_CLK_PCLK> 114 <&cgu X1000_CLK_PCLK>,
115 <&cgu X1000_CLK_TCU>; 115 <&cgu X1000_CLK_TCU>;
116 clock-names = "rtc", "ext", "p 116 clock-names = "rtc", "ext", "pclk", "tcu";
117 117
118 interrupt-controller; 118 interrupt-controller;
119 #interrupt-cells = <1>; 119 #interrupt-cells = <1>;
120 120
121 interrupt-parent = <&intc>; 121 interrupt-parent = <&intc>;
122 interrupts = <27 26 25>; 122 interrupts = <27 26 25>;
123 123
124 wdt: watchdog@0 { 124 wdt: watchdog@0 {
125 compatible = "ingenic, 125 compatible = "ingenic,x1000-watchdog", "ingenic,jz4780-watchdog";
126 reg = <0x0 0x10>; 126 reg = <0x0 0x10>;
127 127
128 clocks = <&tcu TCU_CLK 128 clocks = <&tcu TCU_CLK_WDT>;
129 clock-names = "wdt"; 129 clock-names = "wdt";
130 }; 130 };
131 131
132 pwm: pwm@40 { 132 pwm: pwm@40 {
133 compatible = "ingenic, 133 compatible = "ingenic,x1000-pwm";
134 reg = <0x40 0x50>; 134 reg = <0x40 0x50>;
135 135
136 #pwm-cells = <3>; 136 #pwm-cells = <3>;
137 137
138 clocks = <&tcu TCU_CLK 138 clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
139 <&tcu TCU_CLK 139 <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>,
140 <&tcu TCU_CLK 140 <&tcu TCU_CLK_TIMER4>;
141 clock-names = "timer0" 141 clock-names = "timer0", "timer1", "timer2", "timer3", "timer4";
142 }; 142 };
143 }; 143 };
144 144
145 rtc: rtc@10003000 { 145 rtc: rtc@10003000 {
146 compatible = "ingenic,x1000-rt 146 compatible = "ingenic,x1000-rtc", "ingenic,jz4780-rtc";
147 reg = <0x10003000 0x4c>; 147 reg = <0x10003000 0x4c>;
148 148
149 interrupt-parent = <&intc>; 149 interrupt-parent = <&intc>;
150 interrupts = <32>; 150 interrupts = <32>;
151 151
152 clocks = <&cgu X1000_CLK_RTCLK 152 clocks = <&cgu X1000_CLK_RTCLK>;
153 clock-names = "rtc"; 153 clock-names = "rtc";
154 }; 154 };
155 155
156 pinctrl: pin-controller@10010000 { 156 pinctrl: pin-controller@10010000 {
157 compatible = "ingenic,x1000-pi 157 compatible = "ingenic,x1000-pinctrl";
158 reg = <0x10010000 0x800>; 158 reg = <0x10010000 0x800>;
159 #address-cells = <1>; 159 #address-cells = <1>;
160 #size-cells = <0>; 160 #size-cells = <0>;
161 161
162 gpa: gpio@0 { 162 gpa: gpio@0 {
163 compatible = "ingenic, 163 compatible = "ingenic,x1000-gpio";
164 reg = <0>; 164 reg = <0>;
165 165
166 gpio-controller; 166 gpio-controller;
167 gpio-ranges = <&pinctr 167 gpio-ranges = <&pinctrl 0 0 32>;
168 #gpio-cells = <2>; 168 #gpio-cells = <2>;
169 169
170 interrupt-controller; 170 interrupt-controller;
171 #interrupt-cells = <2> 171 #interrupt-cells = <2>;
172 172
173 interrupt-parent = <&i 173 interrupt-parent = <&intc>;
174 interrupts = <17>; 174 interrupts = <17>;
175 }; 175 };
176 176
177 gpb: gpio@1 { 177 gpb: gpio@1 {
178 compatible = "ingenic, 178 compatible = "ingenic,x1000-gpio";
179 reg = <1>; 179 reg = <1>;
180 180
181 gpio-controller; 181 gpio-controller;
182 gpio-ranges = <&pinctr 182 gpio-ranges = <&pinctrl 0 32 32>;
183 #gpio-cells = <2>; 183 #gpio-cells = <2>;
184 184
185 interrupt-controller; 185 interrupt-controller;
186 #interrupt-cells = <2> 186 #interrupt-cells = <2>;
187 187
188 interrupt-parent = <&i 188 interrupt-parent = <&intc>;
189 interrupts = <16>; 189 interrupts = <16>;
190 }; 190 };
191 191
192 gpc: gpio@2 { 192 gpc: gpio@2 {
193 compatible = "ingenic, 193 compatible = "ingenic,x1000-gpio";
194 reg = <2>; 194 reg = <2>;
195 195
196 gpio-controller; 196 gpio-controller;
197 gpio-ranges = <&pinctr 197 gpio-ranges = <&pinctrl 0 64 32>;
198 #gpio-cells = <2>; 198 #gpio-cells = <2>;
199 199
200 interrupt-controller; 200 interrupt-controller;
201 #interrupt-cells = <2> 201 #interrupt-cells = <2>;
202 202
203 interrupt-parent = <&i 203 interrupt-parent = <&intc>;
204 interrupts = <15>; 204 interrupts = <15>;
205 }; 205 };
206 206
207 gpd: gpio@3 { 207 gpd: gpio@3 {
208 compatible = "ingenic, 208 compatible = "ingenic,x1000-gpio";
209 reg = <3>; 209 reg = <3>;
210 210
211 gpio-controller; 211 gpio-controller;
212 gpio-ranges = <&pinctr 212 gpio-ranges = <&pinctrl 0 96 32>;
213 #gpio-cells = <2>; 213 #gpio-cells = <2>;
214 214
215 interrupt-controller; 215 interrupt-controller;
216 #interrupt-cells = <2> 216 #interrupt-cells = <2>;
217 217
218 interrupt-parent = <&i 218 interrupt-parent = <&intc>;
219 interrupts = <14>; 219 interrupts = <14>;
220 }; 220 };
221 }; 221 };
222 222
223 uart0: serial@10030000 { 223 uart0: serial@10030000 {
224 compatible = "ingenic,x1000-ua 224 compatible = "ingenic,x1000-uart";
225 reg = <0x10030000 0x100>; 225 reg = <0x10030000 0x100>;
226 226
227 interrupt-parent = <&intc>; 227 interrupt-parent = <&intc>;
228 interrupts = <51>; 228 interrupts = <51>;
229 229
230 clocks = <&exclk>, <&cgu X1000 230 clocks = <&exclk>, <&cgu X1000_CLK_UART0>;
231 clock-names = "baud", "module" 231 clock-names = "baud", "module";
232 232
233 status = "disabled"; 233 status = "disabled";
234 }; 234 };
235 235
236 uart1: serial@10031000 { 236 uart1: serial@10031000 {
237 compatible = "ingenic,x1000-ua 237 compatible = "ingenic,x1000-uart";
238 reg = <0x10031000 0x100>; 238 reg = <0x10031000 0x100>;
239 239
240 interrupt-parent = <&intc>; 240 interrupt-parent = <&intc>;
241 interrupts = <50>; 241 interrupts = <50>;
242 242
243 clocks = <&exclk>, <&cgu X1000 243 clocks = <&exclk>, <&cgu X1000_CLK_UART1>;
244 clock-names = "baud", "module" 244 clock-names = "baud", "module";
245 245
246 status = "disabled"; 246 status = "disabled";
247 }; 247 };
248 248
249 uart2: serial@10032000 { 249 uart2: serial@10032000 {
250 compatible = "ingenic,x1000-ua 250 compatible = "ingenic,x1000-uart";
251 reg = <0x10032000 0x100>; 251 reg = <0x10032000 0x100>;
252 252
253 interrupt-parent = <&intc>; 253 interrupt-parent = <&intc>;
254 interrupts = <49>; 254 interrupts = <49>;
255 255
256 clocks = <&exclk>, <&cgu X1000 256 clocks = <&exclk>, <&cgu X1000_CLK_UART2>;
257 clock-names = "baud", "module" 257 clock-names = "baud", "module";
258 258
259 status = "disabled"; 259 status = "disabled";
260 }; 260 };
261 261
262 ssi: spi@10043000 { 262 ssi: spi@10043000 {
263 compatible = "ingenic,x1000-sp 263 compatible = "ingenic,x1000-spi";
264 reg = <0x10043000 0x20>; 264 reg = <0x10043000 0x20>;
265 #address-cells = <1>; 265 #address-cells = <1>;
266 #size-cells = <0>; 266 #size-cells = <0>;
267 267
268 interrupt-parent = <&intc>; 268 interrupt-parent = <&intc>;
269 interrupts = <8>; 269 interrupts = <8>;
270 270
271 clocks = <&cgu X1000_CLK_SSI>; 271 clocks = <&cgu X1000_CLK_SSI>;
272 clock-names = "spi"; 272 clock-names = "spi";
273 273
274 dmas = <&pdma X1000_DMA_SSI0_R 274 dmas = <&pdma X1000_DMA_SSI0_RX 0xffffffff>,
275 <&pdma X1000_DMA_SS 275 <&pdma X1000_DMA_SSI0_TX 0xffffffff>;
276 dma-names = "rx", "tx"; 276 dma-names = "rx", "tx";
277 277
278 status = "disabled"; 278 status = "disabled";
279 }; 279 };
280 280
281 i2c0: i2c-controller@10050000 { 281 i2c0: i2c-controller@10050000 {
282 compatible = "ingenic,x1000-i2 282 compatible = "ingenic,x1000-i2c";
283 reg = <0x10050000 0x1000>; 283 reg = <0x10050000 0x1000>;
284 #address-cells = <1>; 284 #address-cells = <1>;
285 #size-cells = <0>; 285 #size-cells = <0>;
286 286
287 interrupt-parent = <&intc>; 287 interrupt-parent = <&intc>;
288 interrupts = <60>; 288 interrupts = <60>;
289 289
290 clocks = <&cgu X1000_CLK_I2C0> 290 clocks = <&cgu X1000_CLK_I2C0>;
291 291
292 status = "disabled"; 292 status = "disabled";
293 }; 293 };
294 294
295 i2c1: i2c-controller@10051000 { 295 i2c1: i2c-controller@10051000 {
296 compatible = "ingenic,x1000-i2 296 compatible = "ingenic,x1000-i2c";
297 reg = <0x10051000 0x1000>; 297 reg = <0x10051000 0x1000>;
298 #address-cells = <1>; 298 #address-cells = <1>;
299 #size-cells = <0>; 299 #size-cells = <0>;
300 300
301 interrupt-parent = <&intc>; 301 interrupt-parent = <&intc>;
302 interrupts = <59>; 302 interrupts = <59>;
303 303
304 clocks = <&cgu X1000_CLK_I2C1> 304 clocks = <&cgu X1000_CLK_I2C1>;
305 305
306 status = "disabled"; 306 status = "disabled";
307 }; 307 };
308 308
309 i2c2: i2c-controller@10052000 { 309 i2c2: i2c-controller@10052000 {
310 compatible = "ingenic,x1000-i2 310 compatible = "ingenic,x1000-i2c";
311 reg = <0x10052000 0x1000>; 311 reg = <0x10052000 0x1000>;
312 #address-cells = <1>; 312 #address-cells = <1>;
313 #size-cells = <0>; 313 #size-cells = <0>;
314 314
315 interrupt-parent = <&intc>; 315 interrupt-parent = <&intc>;
316 interrupts = <58>; 316 interrupts = <58>;
317 317
318 clocks = <&cgu X1000_CLK_I2C2> 318 clocks = <&cgu X1000_CLK_I2C2>;
319 319
320 status = "disabled"; 320 status = "disabled";
321 }; 321 };
322 322
323 pdma: dma-controller@13420000 { 323 pdma: dma-controller@13420000 {
324 compatible = "ingenic,x1000-dm 324 compatible = "ingenic,x1000-dma";
325 reg = <0x13420000 0x400>, <0x1 325 reg = <0x13420000 0x400>, <0x13421000 0x40>;
326 326
327 #dma-cells = <2>; 327 #dma-cells = <2>;
328 328
329 interrupt-parent = <&intc>; 329 interrupt-parent = <&intc>;
330 interrupts = <10>; 330 interrupts = <10>;
331 331
332 clocks = <&cgu X1000_CLK_PDMA> 332 clocks = <&cgu X1000_CLK_PDMA>;
333 }; 333 };
334 334
335 msc0: mmc@13450000 { 335 msc0: mmc@13450000 {
336 compatible = "ingenic,x1000-mm 336 compatible = "ingenic,x1000-mmc";
337 reg = <0x13450000 0x1000>; 337 reg = <0x13450000 0x1000>;
338 338
339 interrupt-parent = <&intc>; 339 interrupt-parent = <&intc>;
340 interrupts = <37>; 340 interrupts = <37>;
341 341
342 clocks = <&cgu X1000_CLK_MSC0> 342 clocks = <&cgu X1000_CLK_MSC0>;
343 clock-names = "mmc"; 343 clock-names = "mmc";
344 344
345 cap-sd-highspeed; 345 cap-sd-highspeed;
346 cap-mmc-highspeed; 346 cap-mmc-highspeed;
347 cap-sdio-irq; 347 cap-sdio-irq;
348 348
349 dmas = <&pdma X1000_DMA_MSC0_R 349 dmas = <&pdma X1000_DMA_MSC0_RX 0xffffffff>,
350 <&pdma X1000_DMA_MS 350 <&pdma X1000_DMA_MSC0_TX 0xffffffff>;
351 dma-names = "rx", "tx"; 351 dma-names = "rx", "tx";
352 352
353 status = "disabled"; 353 status = "disabled";
354 }; 354 };
355 355
356 msc1: mmc@13460000 { 356 msc1: mmc@13460000 {
357 compatible = "ingenic,x1000-mm 357 compatible = "ingenic,x1000-mmc";
358 reg = <0x13460000 0x1000>; 358 reg = <0x13460000 0x1000>;
359 359
360 interrupt-parent = <&intc>; 360 interrupt-parent = <&intc>;
361 interrupts = <36>; 361 interrupts = <36>;
362 362
363 clocks = <&cgu X1000_CLK_MSC1> 363 clocks = <&cgu X1000_CLK_MSC1>;
364 clock-names = "mmc"; 364 clock-names = "mmc";
365 365
366 cap-sd-highspeed; 366 cap-sd-highspeed;
367 cap-mmc-highspeed; 367 cap-mmc-highspeed;
368 cap-sdio-irq; 368 cap-sdio-irq;
369 369
370 dmas = <&pdma X1000_DMA_MSC1_R 370 dmas = <&pdma X1000_DMA_MSC1_RX 0xffffffff>,
371 <&pdma X1000_DMA_MS 371 <&pdma X1000_DMA_MSC1_TX 0xffffffff>;
372 dma-names = "rx", "tx"; 372 dma-names = "rx", "tx";
373 373
374 status = "disabled"; 374 status = "disabled";
375 }; 375 };
376 376
377 mac: ethernet@134b0000 { 377 mac: ethernet@134b0000 {
378 compatible = "ingenic,x1000-ma 378 compatible = "ingenic,x1000-mac", "snps,dwmac";
379 reg = <0x134b0000 0x2000>; 379 reg = <0x134b0000 0x2000>;
380 380
381 interrupt-parent = <&intc>; 381 interrupt-parent = <&intc>;
382 interrupts = <55>; 382 interrupts = <55>;
383 interrupt-names = "macirq"; 383 interrupt-names = "macirq";
384 384
385 clocks = <&cgu X1000_CLK_MAC>; 385 clocks = <&cgu X1000_CLK_MAC>;
386 clock-names = "stmmaceth"; 386 clock-names = "stmmaceth";
387 387
388 mode-reg = <&mac_phy_ctrl>; 388 mode-reg = <&mac_phy_ctrl>;
389 389
390 status = "disabled"; 390 status = "disabled";
391 391
392 mdio: mdio { 392 mdio: mdio {
393 compatible = "snps,dwm 393 compatible = "snps,dwmac-mdio";
394 #address-cells = <1>; 394 #address-cells = <1>;
395 #size-cells = <0>; 395 #size-cells = <0>;
396 396
397 status = "disabled"; 397 status = "disabled";
398 }; 398 };
399 }; 399 };
400 400
401 otg: usb@13500000 { 401 otg: usb@13500000 {
402 compatible = "ingenic,x1000-ot 402 compatible = "ingenic,x1000-otg";
403 reg = <0x13500000 0x40000>; 403 reg = <0x13500000 0x40000>;
404 404
405 interrupt-parent = <&intc>; 405 interrupt-parent = <&intc>;
406 interrupts = <21>; 406 interrupts = <21>;
407 407
408 clocks = <&cgu X1000_CLK_OTG>; 408 clocks = <&cgu X1000_CLK_OTG>;
409 clock-names = "otg"; 409 clock-names = "otg";
410 410
411 phys = <&otg_phy>; 411 phys = <&otg_phy>;
412 phy-names = "usb2-phy"; 412 phy-names = "usb2-phy";
413 413
414 g-rx-fifo-size = <768>; 414 g-rx-fifo-size = <768>;
415 g-np-tx-fifo-size = <256>; 415 g-np-tx-fifo-size = <256>;
416 g-tx-fifo-size = <256 256 256 416 g-tx-fifo-size = <256 256 256 256 256 256 256 512>;
417 417
418 status = "disabled"; 418 status = "disabled";
419 }; 419 };
420 420
421 aic: audio-controller@10020000 { 421 aic: audio-controller@10020000 {
422 compatible = "ingenic,x1000-i2 422 compatible = "ingenic,x1000-i2s";
423 reg = <0x10020000 0x38>; 423 reg = <0x10020000 0x38>;
424 424
425 #sound-dai-cells = <0>; 425 #sound-dai-cells = <0>;
426 426
427 interrupt-parent = <&intc>; 427 interrupt-parent = <&intc>;
428 interrupts = <1>; 428 interrupts = <1>;
429 429
430 clocks = <&cgu X1000_CLK_AIC>, 430 clocks = <&cgu X1000_CLK_AIC>,
431 <&cgu X1000_CLK_I2S>; 431 <&cgu X1000_CLK_I2S>;
432 clock-names = "aic", "i2s"; 432 clock-names = "aic", "i2s";
433 433
434 dmas = <&pdma X1000_DMA_I2S0_R 434 dmas = <&pdma X1000_DMA_I2S0_RX 0xffffffff>,
435 <&pdma X1000_DMA_I2 435 <&pdma X1000_DMA_I2S0_TX 0xffffffff>;
436 dma-names = "rx", "tx"; 436 dma-names = "rx", "tx";
437 }; 437 };
438 }; 438 };
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