1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/; 2 /dts-v1/;
3 3
4 #include <dt-bindings/interrupt-controller/irq 4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/mip 5 #include <dt-bindings/interrupt-controller/mips-gic.h>
6 6
7 /memreserve/ 0x00000000 0x00001000; /* YAM 7 /memreserve/ 0x00000000 0x00001000; /* YAMON exception vectors */
8 /memreserve/ 0x00001000 0x000ef000; /* YAM 8 /memreserve/ 0x00001000 0x000ef000; /* YAMON */
9 /memreserve/ 0x000f0000 0x00010000; /* PII 9 /memreserve/ 0x000f0000 0x00010000; /* PIIX4 ISA memory */
10 10
11 / { 11 / {
12 #address-cells = <1>; 12 #address-cells = <1>;
13 #size-cells = <1>; 13 #size-cells = <1>;
14 compatible = "mti,malta"; 14 compatible = "mti,malta";
15 15
16 cpu_intc: interrupt-controller { 16 cpu_intc: interrupt-controller {
17 compatible = "mti,cpu-interrup 17 compatible = "mti,cpu-interrupt-controller";
18 18
19 interrupt-controller; 19 interrupt-controller;
20 #interrupt-cells = <1>; 20 #interrupt-cells = <1>;
21 }; 21 };
22 22
23 gic: interrupt-controller@1bdc0000 { 23 gic: interrupt-controller@1bdc0000 {
24 compatible = "mti,gic"; 24 compatible = "mti,gic";
25 reg = <0x1bdc0000 0x20000>; 25 reg = <0x1bdc0000 0x20000>;
26 26
27 interrupt-controller; 27 interrupt-controller;
28 #interrupt-cells = <3>; 28 #interrupt-cells = <3>;
29 29
30 /* 30 /*
31 * Declare the interrupt-paren 31 * Declare the interrupt-parent even though the mti,gic
32 * binding doesn't require it, 32 * binding doesn't require it, such that the kernel can
33 * figure out that cpu_intc is 33 * figure out that cpu_intc is the root interrupt
34 * controller & should be prob 34 * controller & should be probed first.
35 */ 35 */
36 interrupt-parent = <&cpu_intc> 36 interrupt-parent = <&cpu_intc>;
37 37
38 timer { 38 timer {
39 compatible = "mti,gic- 39 compatible = "mti,gic-timer";
40 interrupts = <GIC_LOCA 40 interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
41 }; 41 };
42 }; 42 };
43 43
44 i8259: interrupt-controller@20 { 44 i8259: interrupt-controller@20 {
45 compatible = "intel,i8259"; 45 compatible = "intel,i8259";
46 46
47 interrupt-controller; 47 interrupt-controller;
48 #interrupt-cells = <1>; 48 #interrupt-cells = <1>;
49 49
50 interrupt-parent = <&gic>; 50 interrupt-parent = <&gic>;
51 interrupts = <GIC_SHARED 3 IRQ 51 interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
52 }; 52 };
53 53
54 flash@1e000000 { 54 flash@1e000000 {
55 compatible = "intel,dt28f160", 55 compatible = "intel,dt28f160", "cfi-flash";
56 reg = <0x1e000000 0x400000>; 56 reg = <0x1e000000 0x400000>;
57 bank-width = <4>; 57 bank-width = <4>;
58 #address-cells = <1>; 58 #address-cells = <1>;
59 #size-cells = <1>; 59 #size-cells = <1>;
60 60
61 partitions { 61 partitions {
62 compatible = "fixed-pa 62 compatible = "fixed-partitions";
63 #address-cells = <1>; 63 #address-cells = <1>;
64 #size-cells = <1>; 64 #size-cells = <1>;
65 65
66 yamon@0 { 66 yamon@0 {
67 label = "YAMON 67 label = "YAMON";
68 reg = <0x0 0x1 68 reg = <0x0 0x100000>;
69 read-only; 69 read-only;
70 }; 70 };
71 71
72 user-fs@100000 { 72 user-fs@100000 {
73 label = "User 73 label = "User FS";
74 reg = <0x10000 74 reg = <0x100000 0x2e0000>;
75 }; 75 };
76 76
77 board-config@3e0000 { 77 board-config@3e0000 {
78 label = "Board 78 label = "Board Config";
79 reg = <0x3e000 79 reg = <0x3e0000 0x20000>;
80 read-only; 80 read-only;
81 }; 81 };
82 }; 82 };
83 }; 83 };
84 84
85 fpga_regs: system-controller@1f000000 85 fpga_regs: system-controller@1f000000 {
86 compatible = "mti,malta-fpga", 86 compatible = "mti,malta-fpga", "syscon", "simple-mfd";
87 reg = <0x1f000000 0x1000>; 87 reg = <0x1f000000 0x1000>;
88 native-endian; 88 native-endian;
89 89
90 lcd@410 { 90 lcd@410 {
91 compatible = "mti,malt 91 compatible = "mti,malta-lcd";
92 offset = <0x410>; 92 offset = <0x410>;
93 }; 93 };
94 94
95 reboot { 95 reboot {
96 compatible = "syscon-r 96 compatible = "syscon-reboot";
97 regmap = <&fpga_regs>; 97 regmap = <&fpga_regs>;
98 offset = <0x500>; 98 offset = <0x500>;
99 mask = <0x42>; 99 mask = <0x42>;
100 }; 100 };
101 }; 101 };
102 102
103 isa { 103 isa {
104 compatible = "isa"; 104 compatible = "isa";
105 #address-cells = <2>; 105 #address-cells = <2>;
106 #size-cells = <1>; 106 #size-cells = <1>;
107 ranges = <1 0 0 0x1000>; 107 ranges = <1 0 0 0x1000>;
108 108
109 rtc@70 { 109 rtc@70 {
110 compatible = "motorola 110 compatible = "motorola,mc146818";
111 reg = <1 0x70 0x8>; 111 reg = <1 0x70 0x8>;
112 112
113 interrupt-parent = <&i 113 interrupt-parent = <&i8259>;
114 interrupts = <8>; 114 interrupts = <8>;
115 }; 115 };
116 }; 116 };
117 }; 117 };
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