1 /* SPDX-License-Identifier: GPL-2.0-only */ 1 2 /* 3 * Lantiq FALCON specific CPU feature overrid 4 * 5 * Copyright (C) 2013 Thomas Langer, Lantiq D 6 * 7 * This file was derived from: include/asm-mi 8 * Copyright (C) 2003, 2004 Ralf Baechle 9 * Copyright (C) 2004 Maciej W. Rozycki 10 */ 11 #ifndef __ASM_MACH_FALCON_CPU_FEATURE_OVERRIDE 12 #define __ASM_MACH_FALCON_CPU_FEATURE_OVERRIDE 13 14 #define cpu_has_tlb 1 15 #define cpu_has_4kex 1 16 #define cpu_has_3k_cache 0 17 #define cpu_has_4k_cache 1 18 #define cpu_has_sb1_cache 0 19 #define cpu_has_fpu 0 20 #define cpu_has_32fpr 0 21 #define cpu_has_counter 1 22 #define cpu_has_watch 1 23 #define cpu_has_divec 1 24 25 #define cpu_has_prefetch 1 26 #define cpu_has_ejtag 1 27 #define cpu_has_llsc 1 28 29 #define cpu_has_mips16 1 30 #define cpu_has_mdmx 0 31 #define cpu_has_mips3d 0 32 #define cpu_has_smartmips 0 33 34 #define cpu_has_mips32r1 1 35 #define cpu_has_mips32r2 1 36 #define cpu_has_mips64r1 0 37 #define cpu_has_mips64r2 0 38 39 #define cpu_has_dsp 1 40 #define cpu_has_mipsmt 1 41 42 #define cpu_has_vint 1 43 #define cpu_has_veic 1 44 45 #define cpu_has_64bits 0 46 #define cpu_has_64bit_zero_reg 0 47 #define cpu_has_64bit_gp_regs 0 48 49 #define cpu_dcache_line_size() 32 50 #define cpu_icache_line_size() 32 51 52 #endif /* __ASM_MACH_FALCON_CPU_FEATURE_OVERRI 53
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