1 /* SPDX-License-Identifier: GPL-2.0-or-later * 1 2 /* 3 * Copyright (c) 2011 Zhang, Keguang <keguang. 4 * 5 * IRQ mappings for Loongson 1 6 */ 7 8 #ifndef __ASM_MACH_LOONGSON32_IRQ_H 9 #define __ASM_MACH_LOONGSON32_IRQ_H 10 11 /* 12 * CPU core Interrupt Numbers 13 */ 14 #define MIPS_CPU_IRQ_BASE 0 15 #define MIPS_CPU_IRQ(x) (MIPS_ 16 17 #define SOFTINT0_IRQ MIPS_C 18 #define SOFTINT1_IRQ MIPS_C 19 #define INT0_IRQ MIPS_C 20 #define INT1_IRQ MIPS_C 21 #define INT2_IRQ MIPS_C 22 #define INT3_IRQ MIPS_C 23 #define INT4_IRQ MIPS_C 24 #define TIMER_IRQ MIPS_C 25 26 #define MIPS_CPU_IRQS (MIPS_CPU_IRQ( 27 28 /* 29 * INT0~3 Interrupt Numbers 30 */ 31 #define LS1X_IRQ_BASE MIPS_C 32 #define LS1X_IRQ(n, x) (LS1X_ 33 34 #define LS1X_UART0_IRQ LS1X_I 35 #if defined(CONFIG_LOONGSON1_LS1B) 36 #define LS1X_UART1_IRQ LS1X_I 37 #define LS1X_UART2_IRQ LS1X_I 38 #define LS1X_UART3_IRQ LS1X_I 39 #elif defined(CONFIG_LOONGSON1_LS1C) 40 #define LS1X_UART1_IRQ LS1X_I 41 #define LS1X_UART2_IRQ LS1X_I 42 #endif 43 #define LS1X_CAN0_IRQ LS1X_I 44 #define LS1X_CAN1_IRQ LS1X_I 45 #define LS1X_SPI0_IRQ LS1X_I 46 #define LS1X_SPI1_IRQ LS1X_I 47 #define LS1X_AC97_IRQ LS1X_I 48 #define LS1X_DMA0_IRQ LS1X_I 49 #define LS1X_DMA1_IRQ LS1X_I 50 #define LS1X_DMA2_IRQ LS1X_I 51 #if defined(CONFIG_LOONGSON1_LS1C) 52 #define LS1X_NAND_IRQ LS1X_I 53 #endif 54 #define LS1X_PWM0_IRQ LS1X_I 55 #define LS1X_PWM1_IRQ LS1X_I 56 #define LS1X_PWM2_IRQ LS1X_I 57 #define LS1X_PWM3_IRQ LS1X_I 58 #define LS1X_RTC_INT0_IRQ LS1X_I 59 #define LS1X_RTC_INT1_IRQ LS1X_I 60 #define LS1X_RTC_INT2_IRQ LS1X_I 61 #if defined(CONFIG_LOONGSON1_LS1B) 62 #define LS1X_TOY_INT0_IRQ LS1X_I 63 #define LS1X_TOY_INT1_IRQ LS1X_I 64 #define LS1X_TOY_INT2_IRQ LS1X_I 65 #define LS1X_RTC_TICK_IRQ LS1X_I 66 #define LS1X_TOY_TICK_IRQ LS1X_I 67 #define LS1X_UART4_IRQ LS1X_I 68 #define LS1X_UART5_IRQ LS1X_I 69 #elif defined(CONFIG_LOONGSON1_LS1C) 70 #define LS1X_UART3_IRQ LS1X_I 71 #define LS1X_ADC_IRQ LS1X_I 72 #define LS1X_SDIO_IRQ LS1X_I 73 #endif 74 75 #define LS1X_EHCI_IRQ LS1X_I 76 #define LS1X_OHCI_IRQ LS1X_I 77 #if defined(CONFIG_LOONGSON1_LS1B) 78 #define LS1X_GMAC0_IRQ LS1X_I 79 #define LS1X_GMAC1_IRQ LS1X_I 80 #elif defined(CONFIG_LOONGSON1_LS1C) 81 #define LS1X_OTG_IRQ LS1X_I 82 #define LS1X_GMAC0_IRQ LS1X_I 83 #define LS1X_CAM_IRQ LS1X_I 84 #define LS1X_UART4_IRQ LS1X_I 85 #define LS1X_UART5_IRQ LS1X_I 86 #define LS1X_UART6_IRQ LS1X_I 87 #define LS1X_UART7_IRQ LS1X_I 88 #define LS1X_UART8_IRQ LS1X_I 89 #define LS1X_UART9_IRQ LS1X_I 90 #define LS1X_UART10_IRQ LS1X_I 91 #define LS1X_UART11_IRQ LS1X_I 92 #define LS1X_I2C0_IRQ LS1X_I 93 #define LS1X_I2C1_IRQ LS1X_I 94 #define LS1X_I2C2_IRQ LS1X_I 95 #endif 96 97 #if defined(CONFIG_LOONGSON1_LS1B) 98 #define INTN 4 99 #elif defined(CONFIG_LOONGSON1_LS1C) 100 #define INTN 5 101 #endif 102 103 #define LS1X_IRQS (LS1X_IRQ(INTN 104 105 #define NR_IRQS (MIPS_CPU_IRQS 106 107 #endif /* __ASM_MACH_LOONGSON32_IRQ_H */ 108
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