1 // SPDX-License-Identifier: GPL-2.0-or-later 1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* 2 /*
3 * Copyright (C) 2000, 2001 Broadcom Corporati 3 * Copyright (C) 2000, 2001 Broadcom Corporation
4 */ 4 */
5 #include <linux/clocksource.h> 5 #include <linux/clocksource.h>
6 #include <linux/sched_clock.h> 6 #include <linux/sched_clock.h>
7 7
8 #include <asm/addrspace.h> 8 #include <asm/addrspace.h>
9 #include <asm/io.h> 9 #include <asm/io.h>
10 #include <asm/time.h> 10 #include <asm/time.h>
11 11
12 #include <asm/sibyte/sb1250.h> 12 #include <asm/sibyte/sb1250.h>
13 #include <asm/sibyte/sb1250_regs.h> 13 #include <asm/sibyte/sb1250_regs.h>
14 #include <asm/sibyte/sb1250_int.h> 14 #include <asm/sibyte/sb1250_int.h>
15 #include <asm/sibyte/sb1250_scd.h> 15 #include <asm/sibyte/sb1250_scd.h>
16 16
17 #define SB1250_HPT_NUM 3 17 #define SB1250_HPT_NUM 3
18 #define SB1250_HPT_VALUE M_SCD_TIMER_CN 18 #define SB1250_HPT_VALUE M_SCD_TIMER_CNT /* max value */
19 19
20 /* 20 /*
21 * The HPT is free running from SB1250_HPT_VAL 21 * The HPT is free running from SB1250_HPT_VALUE down to 0 then starts over
22 * again. 22 * again.
23 */ 23 */
24 static inline u64 sb1250_hpt_get_cycles(void) 24 static inline u64 sb1250_hpt_get_cycles(void)
25 { 25 {
26 unsigned int count; 26 unsigned int count;
27 void __iomem *addr; 27 void __iomem *addr;
28 28
29 addr = IOADDR(A_SCD_TIMER_REGISTER(SB1 29 addr = IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CNT));
30 count = G_SCD_TIMER_CNT(__raw_readq(ad 30 count = G_SCD_TIMER_CNT(__raw_readq(addr));
31 31
32 return SB1250_HPT_VALUE - count; 32 return SB1250_HPT_VALUE - count;
33 } 33 }
34 34
35 static u64 sb1250_hpt_read(struct clocksource 35 static u64 sb1250_hpt_read(struct clocksource *cs)
36 { 36 {
37 return sb1250_hpt_get_cycles(); 37 return sb1250_hpt_get_cycles();
38 } 38 }
39 39
40 struct clocksource bcm1250_clocksource = { 40 struct clocksource bcm1250_clocksource = {
41 .name = "bcm1250-counter-3", 41 .name = "bcm1250-counter-3",
42 .rating = 200, 42 .rating = 200,
43 .read = sb1250_hpt_read, 43 .read = sb1250_hpt_read,
44 .mask = CLOCKSOURCE_MASK(23), 44 .mask = CLOCKSOURCE_MASK(23),
45 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 45 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
46 }; 46 };
47 47
48 static u64 notrace sb1250_read_sched_clock(voi 48 static u64 notrace sb1250_read_sched_clock(void)
49 { 49 {
50 return sb1250_hpt_get_cycles(); 50 return sb1250_hpt_get_cycles();
51 } 51 }
52 52
53 void __init sb1250_clocksource_init(void) 53 void __init sb1250_clocksource_init(void)
54 { 54 {
55 struct clocksource *cs = &bcm1250_cloc 55 struct clocksource *cs = &bcm1250_clocksource;
56 56
57 /* Setup hpt using timer #3 but do not 57 /* Setup hpt using timer #3 but do not enable irq for it */
58 __raw_writeq(0, 58 __raw_writeq(0,
59 IOADDR(A_SCD_TIMER_REGIST 59 IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM,
60 60 R_SCD_TIMER_CFG)));
61 __raw_writeq(SB1250_HPT_VALUE, 61 __raw_writeq(SB1250_HPT_VALUE,
62 IOADDR(A_SCD_TIMER_REGIST 62 IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM,
63 63 R_SCD_TIMER_INIT)));
64 __raw_writeq(M_SCD_TIMER_ENABLE | M_SC 64 __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
65 IOADDR(A_SCD_TIMER_REGIST 65 IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM,
66 66 R_SCD_TIMER_CFG)));
67 67
68 clocksource_register_hz(cs, V_SCD_TIME 68 clocksource_register_hz(cs, V_SCD_TIMER_FREQ);
69 69
70 sched_clock_register(sb1250_read_sched 70 sched_clock_register(sb1250_read_sched_clock, 23, V_SCD_TIMER_FREQ);
71 } 71 }
72 72
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