1 // SPDX-License-Identifier: GPL-2.0-or-later <<
2 /* 1 /*
3 * Copyright (C) 2014 Imagination Technologies 2 * Copyright (C) 2014 Imagination Technologies
4 * Author: Paul Burton <paul.burton@mips.com> 3 * Author: Paul Burton <paul.burton@mips.com>
>> 4 *
>> 5 * This program is free software; you can redistribute it and/or modify it
>> 6 * under the terms of the GNU General Public License as published by the
>> 7 * Free Software Foundation; either version 2 of the License, or (at your
>> 8 * option) any later version.
5 */ 9 */
6 10
7 #include <linux/binfmts.h> 11 #include <linux/binfmts.h>
8 #include <linux/elf.h> 12 #include <linux/elf.h>
9 #include <linux/export.h> 13 #include <linux/export.h>
10 #include <linux/sched.h> 14 #include <linux/sched.h>
11 15
12 #include <asm/cpu-features.h> 16 #include <asm/cpu-features.h>
13 #include <asm/cpu-info.h> 17 #include <asm/cpu-info.h>
14 #include <asm/fpu.h> 18 #include <asm/fpu.h>
15 19
16 #ifdef CONFIG_MIPS_FP_SUPPORT <<
17 <<
18 /* Whether to accept legacy-NaN and 2008-NaN u 20 /* Whether to accept legacy-NaN and 2008-NaN user binaries. */
19 bool mips_use_nan_legacy; 21 bool mips_use_nan_legacy;
20 bool mips_use_nan_2008; 22 bool mips_use_nan_2008;
21 23
22 /* FPU modes */ 24 /* FPU modes */
23 enum { 25 enum {
24 FP_FRE, 26 FP_FRE,
25 FP_FR0, 27 FP_FR0,
26 FP_FR1, 28 FP_FR1,
27 }; 29 };
28 30
29 /** 31 /**
30 * struct mode_req - ABI FPU mode requirements 32 * struct mode_req - ABI FPU mode requirements
31 * @single: The program being loaded needs 33 * @single: The program being loaded needs an FPU but it will only issue
32 * single precision instructions 34 * single precision instructions meaning that it can execute in
33 * either FR0 or FR1. 35 * either FR0 or FR1.
34 * @soft: The soft(-float) requirement m 36 * @soft: The soft(-float) requirement means that the program being
35 * loaded needs has no FPU depend 37 * loaded needs has no FPU dependency at all (i.e. it has no
36 * FPU instructions). 38 * FPU instructions).
37 * @fr1: The program being loaded depen 39 * @fr1: The program being loaded depends on FPU being in FR=1 mode.
38 * @frdefault: The program being loaded depen 40 * @frdefault: The program being loaded depends on the default FPU mode.
39 * That is FR0 for O32 and FR1 fo 41 * That is FR0 for O32 and FR1 for N32/N64.
40 * @fre: The program being loaded depen 42 * @fre: The program being loaded depends on FPU with FRE=1. This mode is
41 * a bridge which uses FR=1 whils 43 * a bridge which uses FR=1 whilst still being able to maintain
42 * full compatibility with pre-ex 44 * full compatibility with pre-existing code using the O32 FP32
43 * ABI. 45 * ABI.
44 * 46 *
45 * More information about the FP ABIs can be f 47 * More information about the FP ABIs can be found here:
46 * 48 *
47 * https://dmz-portal.mips.com/wiki/MIPS_O32_A 49 * https://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking#10.4.1._Basic_mode_set-up
48 * 50 *
49 */ 51 */
50 52
51 struct mode_req { 53 struct mode_req {
52 bool single; 54 bool single;
53 bool soft; 55 bool soft;
54 bool fr1; 56 bool fr1;
55 bool frdefault; 57 bool frdefault;
56 bool fre; 58 bool fre;
57 }; 59 };
58 60
59 static const struct mode_req fpu_reqs[] = { 61 static const struct mode_req fpu_reqs[] = {
60 [MIPS_ABI_FP_ANY] = { true, true, 62 [MIPS_ABI_FP_ANY] = { true, true, true, true, true },
61 [MIPS_ABI_FP_DOUBLE] = { false, false, 63 [MIPS_ABI_FP_DOUBLE] = { false, false, false, true, true },
62 [MIPS_ABI_FP_SINGLE] = { true, false, 64 [MIPS_ABI_FP_SINGLE] = { true, false, false, false, false },
63 [MIPS_ABI_FP_SOFT] = { false, true, 65 [MIPS_ABI_FP_SOFT] = { false, true, false, false, false },
64 [MIPS_ABI_FP_OLD_64] = { false, false, 66 [MIPS_ABI_FP_OLD_64] = { false, false, false, false, false },
65 [MIPS_ABI_FP_XX] = { false, false, 67 [MIPS_ABI_FP_XX] = { false, false, true, true, true },
66 [MIPS_ABI_FP_64] = { false, false, 68 [MIPS_ABI_FP_64] = { false, false, true, false, false },
67 [MIPS_ABI_FP_64A] = { false, false, 69 [MIPS_ABI_FP_64A] = { false, false, true, false, true }
68 }; 70 };
69 71
70 /* 72 /*
71 * Mode requirements when .MIPS.abiflags is no 73 * Mode requirements when .MIPS.abiflags is not present in the ELF.
72 * Not present means that everything is accept 74 * Not present means that everything is acceptable except FR1.
73 */ 75 */
74 static struct mode_req none_req = { true, true 76 static struct mode_req none_req = { true, true, false, true, true };
75 77
76 int arch_elf_pt_proc(void *_ehdr, void *_phdr, 78 int arch_elf_pt_proc(void *_ehdr, void *_phdr, struct file *elf,
77 bool is_interp, struct ar 79 bool is_interp, struct arch_elf_state *state)
78 { 80 {
79 union { 81 union {
80 struct elf32_hdr e32; 82 struct elf32_hdr e32;
81 struct elf64_hdr e64; 83 struct elf64_hdr e64;
82 } *ehdr = _ehdr; 84 } *ehdr = _ehdr;
83 struct elf32_phdr *phdr32 = _phdr; 85 struct elf32_phdr *phdr32 = _phdr;
84 struct elf64_phdr *phdr64 = _phdr; 86 struct elf64_phdr *phdr64 = _phdr;
85 struct mips_elf_abiflags_v0 abiflags; 87 struct mips_elf_abiflags_v0 abiflags;
86 bool elf32; 88 bool elf32;
87 u32 flags; 89 u32 flags;
88 int ret; 90 int ret;
89 loff_t pos; 91 loff_t pos;
90 92
91 elf32 = ehdr->e32.e_ident[EI_CLASS] == 93 elf32 = ehdr->e32.e_ident[EI_CLASS] == ELFCLASS32;
92 flags = elf32 ? ehdr->e32.e_flags : eh 94 flags = elf32 ? ehdr->e32.e_flags : ehdr->e64.e_flags;
93 95
94 /* Let's see if this is an O32 ELF */ 96 /* Let's see if this is an O32 ELF */
95 if (elf32) { 97 if (elf32) {
96 if (flags & EF_MIPS_FP64) { 98 if (flags & EF_MIPS_FP64) {
97 /* 99 /*
98 * Set MIPS_ABI_FP_OLD 100 * Set MIPS_ABI_FP_OLD_64 for EF_MIPS_FP64. We will override it
99 * later if needed 101 * later if needed
100 */ 102 */
101 if (is_interp) 103 if (is_interp)
102 state->interp_ 104 state->interp_fp_abi = MIPS_ABI_FP_OLD_64;
103 else 105 else
104 state->fp_abi 106 state->fp_abi = MIPS_ABI_FP_OLD_64;
105 } 107 }
106 if (phdr32->p_type != PT_MIPS_ 108 if (phdr32->p_type != PT_MIPS_ABIFLAGS)
107 return 0; 109 return 0;
108 110
109 if (phdr32->p_filesz < sizeof( 111 if (phdr32->p_filesz < sizeof(abiflags))
110 return -EINVAL; 112 return -EINVAL;
111 pos = phdr32->p_offset; 113 pos = phdr32->p_offset;
112 } else { 114 } else {
113 if (phdr64->p_type != PT_MIPS_ 115 if (phdr64->p_type != PT_MIPS_ABIFLAGS)
114 return 0; 116 return 0;
115 if (phdr64->p_filesz < sizeof( 117 if (phdr64->p_filesz < sizeof(abiflags))
116 return -EINVAL; 118 return -EINVAL;
117 pos = phdr64->p_offset; 119 pos = phdr64->p_offset;
118 } 120 }
119 121
120 ret = kernel_read(elf, &abiflags, size 122 ret = kernel_read(elf, &abiflags, sizeof(abiflags), &pos);
121 if (ret < 0) 123 if (ret < 0)
122 return ret; 124 return ret;
123 if (ret != sizeof(abiflags)) 125 if (ret != sizeof(abiflags))
124 return -EIO; 126 return -EIO;
125 127
126 /* Record the required FP ABIs for use 128 /* Record the required FP ABIs for use by mips_check_elf */
127 if (is_interp) 129 if (is_interp)
128 state->interp_fp_abi = abiflag 130 state->interp_fp_abi = abiflags.fp_abi;
129 else 131 else
130 state->fp_abi = abiflags.fp_ab 132 state->fp_abi = abiflags.fp_abi;
131 133
132 return 0; 134 return 0;
133 } 135 }
134 136
135 int arch_check_elf(void *_ehdr, bool has_inter 137 int arch_check_elf(void *_ehdr, bool has_interpreter, void *_interp_ehdr,
136 struct arch_elf_state *stat 138 struct arch_elf_state *state)
137 { 139 {
138 union { 140 union {
139 struct elf32_hdr e32; 141 struct elf32_hdr e32;
140 struct elf64_hdr e64; 142 struct elf64_hdr e64;
141 } *ehdr = _ehdr; 143 } *ehdr = _ehdr;
142 union { 144 union {
143 struct elf32_hdr e32; 145 struct elf32_hdr e32;
144 struct elf64_hdr e64; 146 struct elf64_hdr e64;
145 } *iehdr = _interp_ehdr; 147 } *iehdr = _interp_ehdr;
146 struct mode_req prog_req, interp_req; 148 struct mode_req prog_req, interp_req;
147 int fp_abi, interp_fp_abi, abi0, abi1, 149 int fp_abi, interp_fp_abi, abi0, abi1, max_abi;
148 bool elf32; 150 bool elf32;
149 u32 flags; 151 u32 flags;
150 152
151 elf32 = ehdr->e32.e_ident[EI_CLASS] == 153 elf32 = ehdr->e32.e_ident[EI_CLASS] == ELFCLASS32;
152 flags = elf32 ? ehdr->e32.e_flags : eh 154 flags = elf32 ? ehdr->e32.e_flags : ehdr->e64.e_flags;
153 155
154 /* 156 /*
155 * Determine the NaN personality, reje 157 * Determine the NaN personality, reject the binary if not allowed.
156 * Also ensure that any interpreter ma 158 * Also ensure that any interpreter matches the executable.
157 */ 159 */
158 if (flags & EF_MIPS_NAN2008) { 160 if (flags & EF_MIPS_NAN2008) {
159 if (mips_use_nan_2008) 161 if (mips_use_nan_2008)
160 state->nan_2008 = 1; 162 state->nan_2008 = 1;
161 else 163 else
162 return -ENOEXEC; 164 return -ENOEXEC;
163 } else { 165 } else {
164 if (mips_use_nan_legacy) 166 if (mips_use_nan_legacy)
165 state->nan_2008 = 0; 167 state->nan_2008 = 0;
166 else 168 else
167 return -ENOEXEC; 169 return -ENOEXEC;
168 } 170 }
169 if (has_interpreter) { 171 if (has_interpreter) {
170 bool ielf32; 172 bool ielf32;
171 u32 iflags; 173 u32 iflags;
172 174
173 ielf32 = iehdr->e32.e_ident[EI 175 ielf32 = iehdr->e32.e_ident[EI_CLASS] == ELFCLASS32;
174 iflags = ielf32 ? iehdr->e32.e 176 iflags = ielf32 ? iehdr->e32.e_flags : iehdr->e64.e_flags;
175 177
176 if ((flags ^ iflags) & EF_MIPS 178 if ((flags ^ iflags) & EF_MIPS_NAN2008)
177 return -ELIBBAD; 179 return -ELIBBAD;
178 } 180 }
179 181
180 if (!IS_ENABLED(CONFIG_MIPS_O32_FP64_S 182 if (!IS_ENABLED(CONFIG_MIPS_O32_FP64_SUPPORT))
181 return 0; 183 return 0;
182 184
183 fp_abi = state->fp_abi; 185 fp_abi = state->fp_abi;
184 186
185 if (has_interpreter) { 187 if (has_interpreter) {
186 interp_fp_abi = state->interp_ 188 interp_fp_abi = state->interp_fp_abi;
187 189
188 abi0 = min(fp_abi, interp_fp_a 190 abi0 = min(fp_abi, interp_fp_abi);
189 abi1 = max(fp_abi, interp_fp_a 191 abi1 = max(fp_abi, interp_fp_abi);
190 } else { 192 } else {
191 abi0 = abi1 = fp_abi; 193 abi0 = abi1 = fp_abi;
192 } 194 }
193 195
194 if (elf32 && !(flags & EF_MIPS_ABI2)) 196 if (elf32 && !(flags & EF_MIPS_ABI2)) {
195 /* Default to a mode capable o 197 /* Default to a mode capable of running code expecting FR=0 */
196 state->overall_fp_mode = cpu_h 198 state->overall_fp_mode = cpu_has_mips_r6 ? FP_FRE : FP_FR0;
197 199
198 /* Allow all ABIs we know abou 200 /* Allow all ABIs we know about */
199 max_abi = MIPS_ABI_FP_64A; 201 max_abi = MIPS_ABI_FP_64A;
200 } else { 202 } else {
201 /* MIPS64 code always uses FR= 203 /* MIPS64 code always uses FR=1, thus the default is easy */
202 state->overall_fp_mode = FP_FR 204 state->overall_fp_mode = FP_FR1;
203 205
204 /* Disallow access to the vari 206 /* Disallow access to the various FPXX & FP64 ABIs */
205 max_abi = MIPS_ABI_FP_SOFT; 207 max_abi = MIPS_ABI_FP_SOFT;
206 } 208 }
207 209
208 if ((abi0 > max_abi && abi0 != MIPS_AB 210 if ((abi0 > max_abi && abi0 != MIPS_ABI_FP_UNKNOWN) ||
209 (abi1 > max_abi && abi1 != MIPS_AB 211 (abi1 > max_abi && abi1 != MIPS_ABI_FP_UNKNOWN))
210 return -ELIBBAD; 212 return -ELIBBAD;
211 213
212 /* It's time to determine the FPU mode 214 /* It's time to determine the FPU mode requirements */
213 prog_req = (abi0 == MIPS_ABI_FP_UNKNOW 215 prog_req = (abi0 == MIPS_ABI_FP_UNKNOWN) ? none_req : fpu_reqs[abi0];
214 interp_req = (abi1 == MIPS_ABI_FP_UNKN 216 interp_req = (abi1 == MIPS_ABI_FP_UNKNOWN) ? none_req : fpu_reqs[abi1];
215 217
216 /* 218 /*
217 * Check whether the program's and int 219 * Check whether the program's and interp's ABIs have a matching FPU
218 * mode requirement. 220 * mode requirement.
219 */ 221 */
220 prog_req.single = interp_req.single && 222 prog_req.single = interp_req.single && prog_req.single;
221 prog_req.soft = interp_req.soft && pro 223 prog_req.soft = interp_req.soft && prog_req.soft;
222 prog_req.fr1 = interp_req.fr1 && prog_ 224 prog_req.fr1 = interp_req.fr1 && prog_req.fr1;
223 prog_req.frdefault = interp_req.frdefa 225 prog_req.frdefault = interp_req.frdefault && prog_req.frdefault;
224 prog_req.fre = interp_req.fre && prog_ 226 prog_req.fre = interp_req.fre && prog_req.fre;
225 227
226 /* 228 /*
227 * Determine the desired FPU mode 229 * Determine the desired FPU mode
228 * 230 *
229 * Decision making: 231 * Decision making:
230 * 232 *
231 * - We want FR_FRE if FRE=1 and both 233 * - We want FR_FRE if FRE=1 and both FR=1 and FR=0 are false. This
232 * means that we have a combination 234 * means that we have a combination of program and interpreter
233 * that inherently require the hybri 235 * that inherently require the hybrid FP mode.
234 * - If FR1 and FRDEFAULT is true, tha 236 * - If FR1 and FRDEFAULT is true, that means we hit the any-abi or
235 * fpxx case. This is because, in an 237 * fpxx case. This is because, in any-ABI (or no-ABI) we have no FPU
236 * instructions so we don't care abo 238 * instructions so we don't care about the mode. We will simply use
237 * the one preferred by the hardware 239 * the one preferred by the hardware. In fpxx case, that ABI can
238 * handle both FR=1 and FR=0, so, ag 240 * handle both FR=1 and FR=0, so, again, we simply choose the one
239 * preferred by the hardware. Next, 241 * preferred by the hardware. Next, if we only use single-precision
240 * FPU instructions, and the default 242 * FPU instructions, and the default ABI FPU mode is not good
241 * (ie single + any ABI combination) 243 * (ie single + any ABI combination), we set again the FPU mode to the
242 * one is preferred by the hardware. 244 * one is preferred by the hardware. Next, if we know that the code
243 * will only use single-precision in 245 * will only use single-precision instructions, shown by single being
244 * true but frdefault being false, t 246 * true but frdefault being false, then we again set the FPU mode to
245 * the one that is preferred by the 247 * the one that is preferred by the hardware.
246 * - We want FP_FR1 if that's the only 248 * - We want FP_FR1 if that's the only matching mode and the default one
247 * is not good. 249 * is not good.
248 * - Return with -ELIBADD if we can't 250 * - Return with -ELIBADD if we can't find a matching FPU mode.
249 */ 251 */
250 if (prog_req.fre && !prog_req.frdefaul 252 if (prog_req.fre && !prog_req.frdefault && !prog_req.fr1)
251 state->overall_fp_mode = FP_FR 253 state->overall_fp_mode = FP_FRE;
252 else if ((prog_req.fr1 && prog_req.frd 254 else if ((prog_req.fr1 && prog_req.frdefault) ||
253 (prog_req.single && !prog_req 255 (prog_req.single && !prog_req.frdefault))
254 /* Make sure 64-bit MIPS III/I 256 /* Make sure 64-bit MIPS III/IV/64R1 will not pick FR1 */
255 state->overall_fp_mode = ((raw 257 state->overall_fp_mode = ((raw_current_cpu_data.fpu_id & MIPS_FPIR_F64) &&
256 cpu_ 258 cpu_has_mips_r2_r6) ?
257 FP_F 259 FP_FR1 : FP_FR0;
258 else if (prog_req.fr1) 260 else if (prog_req.fr1)
259 state->overall_fp_mode = FP_FR 261 state->overall_fp_mode = FP_FR1;
260 else if (!prog_req.fre && !prog_req.f 262 else if (!prog_req.fre && !prog_req.frdefault &&
261 !prog_req.fr1 && !prog_req.s 263 !prog_req.fr1 && !prog_req.single && !prog_req.soft)
262 return -ELIBBAD; 264 return -ELIBBAD;
263 265
264 return 0; 266 return 0;
265 } 267 }
266 268
267 static inline void set_thread_fp_mode(int hybr 269 static inline void set_thread_fp_mode(int hybrid, int regs32)
268 { 270 {
269 if (hybrid) 271 if (hybrid)
270 set_thread_flag(TIF_HYBRID_FPR 272 set_thread_flag(TIF_HYBRID_FPREGS);
271 else 273 else
272 clear_thread_flag(TIF_HYBRID_F 274 clear_thread_flag(TIF_HYBRID_FPREGS);
273 if (regs32) 275 if (regs32)
274 set_thread_flag(TIF_32BIT_FPRE 276 set_thread_flag(TIF_32BIT_FPREGS);
275 else 277 else
276 clear_thread_flag(TIF_32BIT_FP 278 clear_thread_flag(TIF_32BIT_FPREGS);
277 } 279 }
278 280
279 void mips_set_personality_fp(struct arch_elf_s 281 void mips_set_personality_fp(struct arch_elf_state *state)
280 { 282 {
281 /* 283 /*
282 * This function is only ever called f 284 * This function is only ever called for O32 ELFs so we should
283 * not be worried about N32/N64 binari 285 * not be worried about N32/N64 binaries.
284 */ 286 */
285 287
286 if (!IS_ENABLED(CONFIG_MIPS_O32_FP64_S 288 if (!IS_ENABLED(CONFIG_MIPS_O32_FP64_SUPPORT))
287 return; 289 return;
288 290
289 switch (state->overall_fp_mode) { 291 switch (state->overall_fp_mode) {
290 case FP_FRE: 292 case FP_FRE:
291 set_thread_fp_mode(1, 0); 293 set_thread_fp_mode(1, 0);
292 break; 294 break;
293 case FP_FR0: 295 case FP_FR0:
294 set_thread_fp_mode(0, 1); 296 set_thread_fp_mode(0, 1);
295 break; 297 break;
296 case FP_FR1: 298 case FP_FR1:
297 set_thread_fp_mode(0, 0); 299 set_thread_fp_mode(0, 0);
298 break; 300 break;
299 default: 301 default:
300 BUG(); 302 BUG();
301 } 303 }
302 } 304 }
303 305
304 /* 306 /*
305 * Select the IEEE 754 NaN encoding and ABS.fm 307 * Select the IEEE 754 NaN encoding and ABS.fmt/NEG.fmt execution mode
306 * in FCSR according to the ELF NaN personalit 308 * in FCSR according to the ELF NaN personality.
307 */ 309 */
308 void mips_set_personality_nan(struct arch_elf_ 310 void mips_set_personality_nan(struct arch_elf_state *state)
309 { 311 {
310 struct cpuinfo_mips *c = &boot_cpu_dat 312 struct cpuinfo_mips *c = &boot_cpu_data;
311 struct task_struct *t = current; 313 struct task_struct *t = current;
312 314
313 /* Do this early so t->thread.fpu.fcr3 315 /* Do this early so t->thread.fpu.fcr31 won't be clobbered in case
314 * we are preempted before the lose_fp 316 * we are preempted before the lose_fpu(0) in start_thread.
315 */ 317 */
316 lose_fpu(0); 318 lose_fpu(0);
317 319
318 t->thread.fpu.fcr31 = c->fpu_csr31; 320 t->thread.fpu.fcr31 = c->fpu_csr31;
319 switch (state->nan_2008) { 321 switch (state->nan_2008) {
320 case 0: 322 case 0:
321 if (!(c->fpu_msk31 & FPU_CSR_N <<
322 t->thread.fpu.fcr31 &= <<
323 if (!(c->fpu_msk31 & FPU_CSR_A <<
324 t->thread.fpu.fcr31 &= <<
325 break; 323 break;
326 case 1: 324 case 1:
327 if (!(c->fpu_msk31 & FPU_CSR_N 325 if (!(c->fpu_msk31 & FPU_CSR_NAN2008))
328 t->thread.fpu.fcr31 |= 326 t->thread.fpu.fcr31 |= FPU_CSR_NAN2008;
329 if (!(c->fpu_msk31 & FPU_CSR_A 327 if (!(c->fpu_msk31 & FPU_CSR_ABS2008))
330 t->thread.fpu.fcr31 |= 328 t->thread.fpu.fcr31 |= FPU_CSR_ABS2008;
331 break; 329 break;
332 default: 330 default:
333 BUG(); 331 BUG();
334 } 332 }
335 } 333 }
336 334
337 #endif /* CONFIG_MIPS_FP_SUPPORT */ <<
338 <<
339 int mips_elf_read_implies_exec(void *elf_ex, i 335 int mips_elf_read_implies_exec(void *elf_ex, int exstack)
340 { 336 {
341 /* !! 337 if (exstack != EXSTACK_DISABLE_X) {
342 * Set READ_IMPLIES_EXEC only on non-N !! 338 /* The binary doesn't request a non-executable stack */
343 * do not request a specific state via !! 339 return 1;
344 */ !! 340 }
345 return (!cpu_has_rixi && exstack == EX !! 341
>> 342 if (!cpu_has_rixi) {
>> 343 /* The CPU doesn't support non-executable memory */
>> 344 return 1;
>> 345 }
>> 346
>> 347 return 0;
346 } 348 }
347 EXPORT_SYMBOL(mips_elf_read_implies_exec); 349 EXPORT_SYMBOL(mips_elf_read_implies_exec);
348 350
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