1 // SPDX-License-Identifier: GPL-2.0-or-later <<
2 /* 1 /*
3 * Copyright (C) 2014 Imagination Technologies 2 * Copyright (C) 2014 Imagination Technologies
4 * Author: Paul Burton <paul.burton@mips.com> !! 3 * Author: Paul Burton <paul.burton@imgtec.com>
>> 4 *
>> 5 * This program is free software; you can redistribute it and/or modify it
>> 6 * under the terms of the GNU General Public License as published by the
>> 7 * Free Software Foundation; either version 2 of the License, or (at your
>> 8 * option) any later version.
5 */ 9 */
6 10
7 #include <linux/binfmts.h> 11 #include <linux/binfmts.h>
8 #include <linux/elf.h> 12 #include <linux/elf.h>
9 #include <linux/export.h> 13 #include <linux/export.h>
10 #include <linux/sched.h> 14 #include <linux/sched.h>
11 15
12 #include <asm/cpu-features.h> 16 #include <asm/cpu-features.h>
13 #include <asm/cpu-info.h> 17 #include <asm/cpu-info.h>
14 #include <asm/fpu.h> <<
15 <<
16 #ifdef CONFIG_MIPS_FP_SUPPORT <<
17 18
18 /* Whether to accept legacy-NaN and 2008-NaN u 19 /* Whether to accept legacy-NaN and 2008-NaN user binaries. */
19 bool mips_use_nan_legacy; 20 bool mips_use_nan_legacy;
20 bool mips_use_nan_2008; 21 bool mips_use_nan_2008;
21 22
22 /* FPU modes */ 23 /* FPU modes */
23 enum { 24 enum {
24 FP_FRE, 25 FP_FRE,
25 FP_FR0, 26 FP_FR0,
26 FP_FR1, 27 FP_FR1,
27 }; 28 };
28 29
29 /** 30 /**
30 * struct mode_req - ABI FPU mode requirements 31 * struct mode_req - ABI FPU mode requirements
31 * @single: The program being loaded needs 32 * @single: The program being loaded needs an FPU but it will only issue
32 * single precision instructions 33 * single precision instructions meaning that it can execute in
33 * either FR0 or FR1. 34 * either FR0 or FR1.
34 * @soft: The soft(-float) requirement m 35 * @soft: The soft(-float) requirement means that the program being
35 * loaded needs has no FPU depend 36 * loaded needs has no FPU dependency at all (i.e. it has no
36 * FPU instructions). 37 * FPU instructions).
37 * @fr1: The program being loaded depen 38 * @fr1: The program being loaded depends on FPU being in FR=1 mode.
38 * @frdefault: The program being loaded depen 39 * @frdefault: The program being loaded depends on the default FPU mode.
39 * That is FR0 for O32 and FR1 fo 40 * That is FR0 for O32 and FR1 for N32/N64.
40 * @fre: The program being loaded depen 41 * @fre: The program being loaded depends on FPU with FRE=1. This mode is
41 * a bridge which uses FR=1 whils 42 * a bridge which uses FR=1 whilst still being able to maintain
42 * full compatibility with pre-ex 43 * full compatibility with pre-existing code using the O32 FP32
43 * ABI. 44 * ABI.
44 * 45 *
45 * More information about the FP ABIs can be f 46 * More information about the FP ABIs can be found here:
46 * 47 *
47 * https://dmz-portal.mips.com/wiki/MIPS_O32_A 48 * https://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking#10.4.1._Basic_mode_set-up
48 * 49 *
49 */ 50 */
50 51
51 struct mode_req { 52 struct mode_req {
52 bool single; 53 bool single;
53 bool soft; 54 bool soft;
54 bool fr1; 55 bool fr1;
55 bool frdefault; 56 bool frdefault;
56 bool fre; 57 bool fre;
57 }; 58 };
58 59
59 static const struct mode_req fpu_reqs[] = { 60 static const struct mode_req fpu_reqs[] = {
60 [MIPS_ABI_FP_ANY] = { true, true, 61 [MIPS_ABI_FP_ANY] = { true, true, true, true, true },
61 [MIPS_ABI_FP_DOUBLE] = { false, false, 62 [MIPS_ABI_FP_DOUBLE] = { false, false, false, true, true },
62 [MIPS_ABI_FP_SINGLE] = { true, false, 63 [MIPS_ABI_FP_SINGLE] = { true, false, false, false, false },
63 [MIPS_ABI_FP_SOFT] = { false, true, 64 [MIPS_ABI_FP_SOFT] = { false, true, false, false, false },
64 [MIPS_ABI_FP_OLD_64] = { false, false, 65 [MIPS_ABI_FP_OLD_64] = { false, false, false, false, false },
65 [MIPS_ABI_FP_XX] = { false, false, 66 [MIPS_ABI_FP_XX] = { false, false, true, true, true },
66 [MIPS_ABI_FP_64] = { false, false, 67 [MIPS_ABI_FP_64] = { false, false, true, false, false },
67 [MIPS_ABI_FP_64A] = { false, false, 68 [MIPS_ABI_FP_64A] = { false, false, true, false, true }
68 }; 69 };
69 70
70 /* 71 /*
71 * Mode requirements when .MIPS.abiflags is no 72 * Mode requirements when .MIPS.abiflags is not present in the ELF.
72 * Not present means that everything is accept 73 * Not present means that everything is acceptable except FR1.
73 */ 74 */
74 static struct mode_req none_req = { true, true 75 static struct mode_req none_req = { true, true, false, true, true };
75 76
76 int arch_elf_pt_proc(void *_ehdr, void *_phdr, 77 int arch_elf_pt_proc(void *_ehdr, void *_phdr, struct file *elf,
77 bool is_interp, struct ar 78 bool is_interp, struct arch_elf_state *state)
78 { 79 {
79 union { 80 union {
80 struct elf32_hdr e32; 81 struct elf32_hdr e32;
81 struct elf64_hdr e64; 82 struct elf64_hdr e64;
82 } *ehdr = _ehdr; 83 } *ehdr = _ehdr;
83 struct elf32_phdr *phdr32 = _phdr; 84 struct elf32_phdr *phdr32 = _phdr;
84 struct elf64_phdr *phdr64 = _phdr; 85 struct elf64_phdr *phdr64 = _phdr;
85 struct mips_elf_abiflags_v0 abiflags; 86 struct mips_elf_abiflags_v0 abiflags;
86 bool elf32; 87 bool elf32;
87 u32 flags; 88 u32 flags;
88 int ret; 89 int ret;
89 loff_t pos; <<
90 90
91 elf32 = ehdr->e32.e_ident[EI_CLASS] == 91 elf32 = ehdr->e32.e_ident[EI_CLASS] == ELFCLASS32;
92 flags = elf32 ? ehdr->e32.e_flags : eh 92 flags = elf32 ? ehdr->e32.e_flags : ehdr->e64.e_flags;
93 93
94 /* Let's see if this is an O32 ELF */ 94 /* Let's see if this is an O32 ELF */
95 if (elf32) { 95 if (elf32) {
96 if (flags & EF_MIPS_FP64) { 96 if (flags & EF_MIPS_FP64) {
97 /* 97 /*
98 * Set MIPS_ABI_FP_OLD 98 * Set MIPS_ABI_FP_OLD_64 for EF_MIPS_FP64. We will override it
99 * later if needed 99 * later if needed
100 */ 100 */
101 if (is_interp) 101 if (is_interp)
102 state->interp_ 102 state->interp_fp_abi = MIPS_ABI_FP_OLD_64;
103 else 103 else
104 state->fp_abi 104 state->fp_abi = MIPS_ABI_FP_OLD_64;
105 } 105 }
106 if (phdr32->p_type != PT_MIPS_ 106 if (phdr32->p_type != PT_MIPS_ABIFLAGS)
107 return 0; 107 return 0;
108 108
109 if (phdr32->p_filesz < sizeof( 109 if (phdr32->p_filesz < sizeof(abiflags))
110 return -EINVAL; 110 return -EINVAL;
111 pos = phdr32->p_offset; !! 111
>> 112 ret = kernel_read(elf, phdr32->p_offset,
>> 113 (char *)&abiflags,
>> 114 sizeof(abiflags));
112 } else { 115 } else {
113 if (phdr64->p_type != PT_MIPS_ 116 if (phdr64->p_type != PT_MIPS_ABIFLAGS)
114 return 0; 117 return 0;
115 if (phdr64->p_filesz < sizeof( 118 if (phdr64->p_filesz < sizeof(abiflags))
116 return -EINVAL; 119 return -EINVAL;
117 pos = phdr64->p_offset; !! 120
>> 121 ret = kernel_read(elf, phdr64->p_offset,
>> 122 (char *)&abiflags,
>> 123 sizeof(abiflags));
118 } 124 }
119 125
120 ret = kernel_read(elf, &abiflags, size <<
121 if (ret < 0) 126 if (ret < 0)
122 return ret; 127 return ret;
123 if (ret != sizeof(abiflags)) 128 if (ret != sizeof(abiflags))
124 return -EIO; 129 return -EIO;
125 130
126 /* Record the required FP ABIs for use 131 /* Record the required FP ABIs for use by mips_check_elf */
127 if (is_interp) 132 if (is_interp)
128 state->interp_fp_abi = abiflag 133 state->interp_fp_abi = abiflags.fp_abi;
129 else 134 else
130 state->fp_abi = abiflags.fp_ab 135 state->fp_abi = abiflags.fp_abi;
131 136
132 return 0; 137 return 0;
133 } 138 }
134 139
135 int arch_check_elf(void *_ehdr, bool has_inter 140 int arch_check_elf(void *_ehdr, bool has_interpreter, void *_interp_ehdr,
136 struct arch_elf_state *stat 141 struct arch_elf_state *state)
137 { 142 {
138 union { 143 union {
139 struct elf32_hdr e32; 144 struct elf32_hdr e32;
140 struct elf64_hdr e64; 145 struct elf64_hdr e64;
141 } *ehdr = _ehdr; 146 } *ehdr = _ehdr;
142 union { 147 union {
143 struct elf32_hdr e32; 148 struct elf32_hdr e32;
144 struct elf64_hdr e64; 149 struct elf64_hdr e64;
145 } *iehdr = _interp_ehdr; 150 } *iehdr = _interp_ehdr;
146 struct mode_req prog_req, interp_req; 151 struct mode_req prog_req, interp_req;
147 int fp_abi, interp_fp_abi, abi0, abi1, 152 int fp_abi, interp_fp_abi, abi0, abi1, max_abi;
148 bool elf32; 153 bool elf32;
149 u32 flags; 154 u32 flags;
150 155
151 elf32 = ehdr->e32.e_ident[EI_CLASS] == 156 elf32 = ehdr->e32.e_ident[EI_CLASS] == ELFCLASS32;
152 flags = elf32 ? ehdr->e32.e_flags : eh 157 flags = elf32 ? ehdr->e32.e_flags : ehdr->e64.e_flags;
153 158
154 /* 159 /*
155 * Determine the NaN personality, reje 160 * Determine the NaN personality, reject the binary if not allowed.
156 * Also ensure that any interpreter ma 161 * Also ensure that any interpreter matches the executable.
157 */ 162 */
158 if (flags & EF_MIPS_NAN2008) { 163 if (flags & EF_MIPS_NAN2008) {
159 if (mips_use_nan_2008) 164 if (mips_use_nan_2008)
160 state->nan_2008 = 1; 165 state->nan_2008 = 1;
161 else 166 else
162 return -ENOEXEC; 167 return -ENOEXEC;
163 } else { 168 } else {
164 if (mips_use_nan_legacy) 169 if (mips_use_nan_legacy)
165 state->nan_2008 = 0; 170 state->nan_2008 = 0;
166 else 171 else
167 return -ENOEXEC; 172 return -ENOEXEC;
168 } 173 }
169 if (has_interpreter) { 174 if (has_interpreter) {
170 bool ielf32; 175 bool ielf32;
171 u32 iflags; 176 u32 iflags;
172 177
173 ielf32 = iehdr->e32.e_ident[EI 178 ielf32 = iehdr->e32.e_ident[EI_CLASS] == ELFCLASS32;
174 iflags = ielf32 ? iehdr->e32.e 179 iflags = ielf32 ? iehdr->e32.e_flags : iehdr->e64.e_flags;
175 180
176 if ((flags ^ iflags) & EF_MIPS 181 if ((flags ^ iflags) & EF_MIPS_NAN2008)
177 return -ELIBBAD; 182 return -ELIBBAD;
178 } 183 }
179 184
180 if (!IS_ENABLED(CONFIG_MIPS_O32_FP64_S 185 if (!IS_ENABLED(CONFIG_MIPS_O32_FP64_SUPPORT))
181 return 0; 186 return 0;
182 187
183 fp_abi = state->fp_abi; 188 fp_abi = state->fp_abi;
184 189
185 if (has_interpreter) { 190 if (has_interpreter) {
186 interp_fp_abi = state->interp_ 191 interp_fp_abi = state->interp_fp_abi;
187 192
188 abi0 = min(fp_abi, interp_fp_a 193 abi0 = min(fp_abi, interp_fp_abi);
189 abi1 = max(fp_abi, interp_fp_a 194 abi1 = max(fp_abi, interp_fp_abi);
190 } else { 195 } else {
191 abi0 = abi1 = fp_abi; 196 abi0 = abi1 = fp_abi;
192 } 197 }
193 198
194 if (elf32 && !(flags & EF_MIPS_ABI2)) 199 if (elf32 && !(flags & EF_MIPS_ABI2)) {
195 /* Default to a mode capable o 200 /* Default to a mode capable of running code expecting FR=0 */
196 state->overall_fp_mode = cpu_h 201 state->overall_fp_mode = cpu_has_mips_r6 ? FP_FRE : FP_FR0;
197 202
198 /* Allow all ABIs we know abou 203 /* Allow all ABIs we know about */
199 max_abi = MIPS_ABI_FP_64A; 204 max_abi = MIPS_ABI_FP_64A;
200 } else { 205 } else {
201 /* MIPS64 code always uses FR= 206 /* MIPS64 code always uses FR=1, thus the default is easy */
202 state->overall_fp_mode = FP_FR 207 state->overall_fp_mode = FP_FR1;
203 208
204 /* Disallow access to the vari 209 /* Disallow access to the various FPXX & FP64 ABIs */
205 max_abi = MIPS_ABI_FP_SOFT; 210 max_abi = MIPS_ABI_FP_SOFT;
206 } 211 }
207 212
208 if ((abi0 > max_abi && abi0 != MIPS_AB 213 if ((abi0 > max_abi && abi0 != MIPS_ABI_FP_UNKNOWN) ||
209 (abi1 > max_abi && abi1 != MIPS_AB 214 (abi1 > max_abi && abi1 != MIPS_ABI_FP_UNKNOWN))
210 return -ELIBBAD; 215 return -ELIBBAD;
211 216
212 /* It's time to determine the FPU mode 217 /* It's time to determine the FPU mode requirements */
213 prog_req = (abi0 == MIPS_ABI_FP_UNKNOW 218 prog_req = (abi0 == MIPS_ABI_FP_UNKNOWN) ? none_req : fpu_reqs[abi0];
214 interp_req = (abi1 == MIPS_ABI_FP_UNKN 219 interp_req = (abi1 == MIPS_ABI_FP_UNKNOWN) ? none_req : fpu_reqs[abi1];
215 220
216 /* 221 /*
217 * Check whether the program's and int 222 * Check whether the program's and interp's ABIs have a matching FPU
218 * mode requirement. 223 * mode requirement.
219 */ 224 */
220 prog_req.single = interp_req.single && 225 prog_req.single = interp_req.single && prog_req.single;
221 prog_req.soft = interp_req.soft && pro 226 prog_req.soft = interp_req.soft && prog_req.soft;
222 prog_req.fr1 = interp_req.fr1 && prog_ 227 prog_req.fr1 = interp_req.fr1 && prog_req.fr1;
223 prog_req.frdefault = interp_req.frdefa 228 prog_req.frdefault = interp_req.frdefault && prog_req.frdefault;
224 prog_req.fre = interp_req.fre && prog_ 229 prog_req.fre = interp_req.fre && prog_req.fre;
225 230
226 /* 231 /*
227 * Determine the desired FPU mode 232 * Determine the desired FPU mode
228 * 233 *
229 * Decision making: 234 * Decision making:
230 * 235 *
231 * - We want FR_FRE if FRE=1 and both 236 * - We want FR_FRE if FRE=1 and both FR=1 and FR=0 are false. This
232 * means that we have a combination 237 * means that we have a combination of program and interpreter
233 * that inherently require the hybri 238 * that inherently require the hybrid FP mode.
234 * - If FR1 and FRDEFAULT is true, tha 239 * - If FR1 and FRDEFAULT is true, that means we hit the any-abi or
235 * fpxx case. This is because, in an 240 * fpxx case. This is because, in any-ABI (or no-ABI) we have no FPU
236 * instructions so we don't care abo 241 * instructions so we don't care about the mode. We will simply use
237 * the one preferred by the hardware 242 * the one preferred by the hardware. In fpxx case, that ABI can
238 * handle both FR=1 and FR=0, so, ag 243 * handle both FR=1 and FR=0, so, again, we simply choose the one
239 * preferred by the hardware. Next, 244 * preferred by the hardware. Next, if we only use single-precision
240 * FPU instructions, and the default 245 * FPU instructions, and the default ABI FPU mode is not good
241 * (ie single + any ABI combination) 246 * (ie single + any ABI combination), we set again the FPU mode to the
242 * one is preferred by the hardware. 247 * one is preferred by the hardware. Next, if we know that the code
243 * will only use single-precision in 248 * will only use single-precision instructions, shown by single being
244 * true but frdefault being false, t 249 * true but frdefault being false, then we again set the FPU mode to
245 * the one that is preferred by the 250 * the one that is preferred by the hardware.
246 * - We want FP_FR1 if that's the only 251 * - We want FP_FR1 if that's the only matching mode and the default one
247 * is not good. 252 * is not good.
248 * - Return with -ELIBADD if we can't 253 * - Return with -ELIBADD if we can't find a matching FPU mode.
249 */ 254 */
250 if (prog_req.fre && !prog_req.frdefaul 255 if (prog_req.fre && !prog_req.frdefault && !prog_req.fr1)
251 state->overall_fp_mode = FP_FR 256 state->overall_fp_mode = FP_FRE;
252 else if ((prog_req.fr1 && prog_req.frd 257 else if ((prog_req.fr1 && prog_req.frdefault) ||
253 (prog_req.single && !prog_req 258 (prog_req.single && !prog_req.frdefault))
254 /* Make sure 64-bit MIPS III/I 259 /* Make sure 64-bit MIPS III/IV/64R1 will not pick FR1 */
255 state->overall_fp_mode = ((raw 260 state->overall_fp_mode = ((raw_current_cpu_data.fpu_id & MIPS_FPIR_F64) &&
256 cpu_ 261 cpu_has_mips_r2_r6) ?
257 FP_F 262 FP_FR1 : FP_FR0;
258 else if (prog_req.fr1) 263 else if (prog_req.fr1)
259 state->overall_fp_mode = FP_FR 264 state->overall_fp_mode = FP_FR1;
260 else if (!prog_req.fre && !prog_req.f 265 else if (!prog_req.fre && !prog_req.frdefault &&
261 !prog_req.fr1 && !prog_req.s 266 !prog_req.fr1 && !prog_req.single && !prog_req.soft)
262 return -ELIBBAD; 267 return -ELIBBAD;
263 268
264 return 0; 269 return 0;
265 } 270 }
266 271
267 static inline void set_thread_fp_mode(int hybr 272 static inline void set_thread_fp_mode(int hybrid, int regs32)
268 { 273 {
269 if (hybrid) 274 if (hybrid)
270 set_thread_flag(TIF_HYBRID_FPR 275 set_thread_flag(TIF_HYBRID_FPREGS);
271 else 276 else
272 clear_thread_flag(TIF_HYBRID_F 277 clear_thread_flag(TIF_HYBRID_FPREGS);
273 if (regs32) 278 if (regs32)
274 set_thread_flag(TIF_32BIT_FPRE 279 set_thread_flag(TIF_32BIT_FPREGS);
275 else 280 else
276 clear_thread_flag(TIF_32BIT_FP 281 clear_thread_flag(TIF_32BIT_FPREGS);
277 } 282 }
278 283
279 void mips_set_personality_fp(struct arch_elf_s 284 void mips_set_personality_fp(struct arch_elf_state *state)
280 { 285 {
281 /* 286 /*
282 * This function is only ever called f 287 * This function is only ever called for O32 ELFs so we should
283 * not be worried about N32/N64 binari 288 * not be worried about N32/N64 binaries.
284 */ 289 */
285 290
286 if (!IS_ENABLED(CONFIG_MIPS_O32_FP64_S 291 if (!IS_ENABLED(CONFIG_MIPS_O32_FP64_SUPPORT))
287 return; 292 return;
288 293
289 switch (state->overall_fp_mode) { 294 switch (state->overall_fp_mode) {
290 case FP_FRE: 295 case FP_FRE:
291 set_thread_fp_mode(1, 0); 296 set_thread_fp_mode(1, 0);
292 break; 297 break;
293 case FP_FR0: 298 case FP_FR0:
294 set_thread_fp_mode(0, 1); 299 set_thread_fp_mode(0, 1);
295 break; 300 break;
296 case FP_FR1: 301 case FP_FR1:
297 set_thread_fp_mode(0, 0); 302 set_thread_fp_mode(0, 0);
298 break; 303 break;
299 default: 304 default:
300 BUG(); 305 BUG();
301 } 306 }
302 } 307 }
303 308
304 /* 309 /*
305 * Select the IEEE 754 NaN encoding and ABS.fm 310 * Select the IEEE 754 NaN encoding and ABS.fmt/NEG.fmt execution mode
306 * in FCSR according to the ELF NaN personalit 311 * in FCSR according to the ELF NaN personality.
307 */ 312 */
308 void mips_set_personality_nan(struct arch_elf_ 313 void mips_set_personality_nan(struct arch_elf_state *state)
309 { 314 {
310 struct cpuinfo_mips *c = &boot_cpu_dat 315 struct cpuinfo_mips *c = &boot_cpu_data;
311 struct task_struct *t = current; 316 struct task_struct *t = current;
312 317
313 /* Do this early so t->thread.fpu.fcr3 <<
314 * we are preempted before the lose_fp <<
315 */ <<
316 lose_fpu(0); <<
317 <<
318 t->thread.fpu.fcr31 = c->fpu_csr31; 318 t->thread.fpu.fcr31 = c->fpu_csr31;
319 switch (state->nan_2008) { 319 switch (state->nan_2008) {
320 case 0: 320 case 0:
321 if (!(c->fpu_msk31 & FPU_CSR_N <<
322 t->thread.fpu.fcr31 &= <<
323 if (!(c->fpu_msk31 & FPU_CSR_A <<
324 t->thread.fpu.fcr31 &= <<
325 break; 321 break;
326 case 1: 322 case 1:
327 if (!(c->fpu_msk31 & FPU_CSR_N 323 if (!(c->fpu_msk31 & FPU_CSR_NAN2008))
328 t->thread.fpu.fcr31 |= 324 t->thread.fpu.fcr31 |= FPU_CSR_NAN2008;
329 if (!(c->fpu_msk31 & FPU_CSR_A 325 if (!(c->fpu_msk31 & FPU_CSR_ABS2008))
330 t->thread.fpu.fcr31 |= 326 t->thread.fpu.fcr31 |= FPU_CSR_ABS2008;
331 break; 327 break;
332 default: 328 default:
333 BUG(); 329 BUG();
334 } 330 }
335 } 331 }
336 332
337 #endif /* CONFIG_MIPS_FP_SUPPORT */ <<
338 <<
339 int mips_elf_read_implies_exec(void *elf_ex, i 333 int mips_elf_read_implies_exec(void *elf_ex, int exstack)
340 { 334 {
341 /* !! 335 if (exstack != EXSTACK_DISABLE_X) {
342 * Set READ_IMPLIES_EXEC only on non-N !! 336 /* The binary doesn't request a non-executable stack */
343 * do not request a specific state via !! 337 return 1;
344 */ !! 338 }
345 return (!cpu_has_rixi && exstack == EX !! 339
>> 340 if (!cpu_has_rixi) {
>> 341 /* The CPU doesn't support non-executable memory */
>> 342 return 1;
>> 343 }
>> 344
>> 345 return 0;
346 } 346 }
347 EXPORT_SYMBOL(mips_elf_read_implies_exec); 347 EXPORT_SYMBOL(mips_elf_read_implies_exec);
348 348
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