Linux/arch/mips/kernel/head.S

Version: ~ [ linux-6.12-rc7 ] ~ [ linux-6.11.7 ] ~ [ linux-6.10.14 ] ~ [ linux-6.9.12 ] ~ [ linux-6.8.12 ] ~ [ linux-6.7.12 ] ~ [ linux-6.6.60 ] ~ [ linux-6.5.13 ] ~ [ linux-6.4.16 ] ~ [ linux-6.3.13 ] ~ [ linux-6.2.16 ] ~ [ linux-6.1.116 ] ~ [ linux-6.0.19 ] ~ [ linux-5.19.17 ] ~ [ linux-5.18.19 ] ~ [ linux-5.17.15 ] ~ [ linux-5.16.20 ] ~ [ linux-5.15.171 ] ~ [ linux-5.14.21 ] ~ [ linux-5.13.19 ] ~ [ linux-5.12.19 ] ~ [ linux-5.11.22 ] ~ [ linux-5.10.229 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.285 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.323 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.336 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.337 ] ~ [ linux-4.4.302 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.12 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

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1 /* 1 /* 2 * This file is subject to the terms and condi !! 2 * arch/alpha/kernel/head.S 3 * License. See the file "COPYING" in the mai << 4 * for more details. << 5 * 3 * 6 * Copyright (C) 1994, 1995 Waldorf Electronic !! 4 * initial boot stuff.. At this point, the bootloader has already 7 * Written by Ralf Baechle and Andreas Busse !! 5 * switched into OSF/1 PAL-code, and loaded us at the correct address 8 * Copyright (C) 1994 - 99, 2003, 06 Ralf Baec !! 6 * (START_ADDR). So there isn't much left for us to do: just set up 9 * Copyright (C) 1996 Paul M. Antoine !! 7 * the kernel global pointer and jump to the kernel entry-point. 10 * Modified for DECStation and hence R3000 sup << 11 * Further modifications by David S. Miller an << 12 * Copyright (C) 1999 Silicon Graphics, Inc. << 13 * Kevin Kissell, kevink@mips.com and Carsten << 14 * Copyright (C) 2000 MIPS Technologies, Inc. << 15 */ 8 */ 16 #include <linux/init.h> << 17 #include <linux/threads.h> << 18 9 19 #include <asm/addrspace.h> !! 10 #include <linux/init.h> 20 #include <asm/asm.h> !! 11 #include <asm/asm-offsets.h> 21 #include <asm/asmmacro.h> !! 12 #include <asm/pal.h> 22 #include <asm/irqflags.h> !! 13 #include <asm/setup.h> 23 #include <asm/regdef.h> !! 14 24 #include <asm/mipsregs.h> !! 15 __HEAD 25 #include <asm/stackframe.h> !! 16 .globl _stext 26 !! 17 .set noreorder 27 #include <kernel-entry-init.h> !! 18 .globl __start 28 !! 19 .ent __start 29 /* !! 20 _stext: 30 * For the moment disable interrupts, !! 21 __start: 31 * set ST0_KX so that the CPU does not !! 22 .prologue 0 32 * 64-bit addresses. A full initializ !! 23 br $27,1f 33 * register is done later in per_cpu_t !! 24 1: ldgp $29,0($27) 34 */ !! 25 /* We need to get current_task_info loaded up... */ 35 .macro setup_c0_status set clr !! 26 lda $8,init_thread_union 36 .set push !! 27 /* ... and find our stack ... */ 37 mfc0 t0, CP0_STATUS !! 28 lda $30,0x4000 - SIZEOF_PT_REGS($8) 38 or t0, ST0_KERNEL_CUMASK|\set|0x1 !! 29 /* ... and then we can start the kernel. */ 39 xor t0, 0x1f|\clr !! 30 jsr $26,start_kernel 40 mtc0 t0, CP0_STATUS !! 31 call_pal PAL_halt 41 .set noreorder !! 32 .end __start 42 sll zero,3 << 43 .set pop << 44 .endm << 45 << 46 .macro setup_c0_status_pri << 47 #ifdef CONFIG_64BIT << 48 setup_c0_status ST0_KX 0 << 49 #else << 50 setup_c0_status 0 0 << 51 #endif << 52 .endm << 53 << 54 .macro setup_c0_status_sec << 55 #ifdef CONFIG_64BIT << 56 setup_c0_status ST0_KX ST0_BEV << 57 #else << 58 setup_c0_status 0 ST0_BEV << 59 #endif << 60 .endm << 61 << 62 #ifndef CONFIG_NO_EXCEPT_FILL << 63 /* << 64 * Reserved space for exception handle << 65 * Necessary for machines which link t << 66 */ << 67 .fill 0x400 << 68 #endif << 69 << 70 EXPORT(_stext) << 71 << 72 #ifdef CONFIG_BOOT_RAW << 73 /* << 74 * Give us a fighting chance of runnin << 75 * kernel load address. This is neede << 76 * not have a ELF loader yet. << 77 */ << 78 FEXPORT(__kernel_entry) << 79 j kernel_entry << 80 #endif /* CONFIG_BOOT_RAW */ << 81 << 82 __REF << 83 << 84 NESTED(kernel_entry, 16, sp) << 85 << 86 kernel_entry_setup << 87 << 88 setup_c0_status_pri << 89 << 90 /* We might not get launched at the ad << 91 so we jump there. */ << 92 PTR_LA t0, 0f << 93 jr t0 << 94 0: << 95 << 96 PTR_LA t0, __bss_start << 97 LONG_S zero, (t0) << 98 PTR_LA t1, __bss_stop - LONGS << 99 1: << 100 PTR_ADDIU t0, LONGSIZE << 101 LONG_S zero, (t0) << 102 bne t0, t1, 1b << 103 << 104 LONG_S a0, fw_arg0 << 105 LONG_S a1, fw_arg1 << 106 LONG_S a2, fw_arg2 << 107 LONG_S a3, fw_arg3 << 108 << 109 MTC0 zero, CP0_CONTEXT << 110 #ifdef CONFIG_64BIT << 111 MTC0 zero, CP0_XCONTEXT << 112 #endif << 113 PTR_LA $28, init_thread_union << 114 /* Set the SP after an empty pt_regs. << 115 PTR_LI sp, _THREAD_SIZE - 32 << 116 PTR_ADDU sp, $28 << 117 back_to_back_c0_hazard << 118 set_saved_sp sp, t0, t1 << 119 PTR_SUBU sp, 4 * SZREG << 120 << 121 #ifdef CONFIG_RELOCATABLE << 122 /* Copy kernel and apply the relocatio << 123 jal relocate_kernel << 124 << 125 /* Repoint the sp into the new kernel << 126 PTR_LI sp, _THREAD_SIZE - 32 << 127 PTR_ADDU sp, $28 << 128 set_saved_sp sp, t0, t1 << 129 PTR_SUBU sp, 4 * SZREG << 130 << 131 /* << 132 * relocate_kernel returns the entry p << 133 * in the relocated kernel or the orig << 134 * some reason relocation failed - jum << 135 * with instruction hazard barrier bec << 136 * newly sync'd icache. << 137 */ << 138 jr.hb v0 << 139 #else /* !CONFIG_RELOCATABLE */ << 140 j start_kernel << 141 #endif /* !CONFIG_RELOCATABLE */ << 142 END(kernel_entry) << 143 33 144 #ifdef CONFIG_SMP 34 #ifdef CONFIG_SMP 145 /* !! 35 .align 3 146 * SMP slave cpus entry point. Board specific !! 36 .globl __smp_callin 147 * function after setting up the stack and gp !! 37 .ent __smp_callin 148 */ !! 38 /* On entry here from SRM console, the HWPCB of the per-cpu 149 NESTED(smp_bootstrap, 16, sp) !! 39 slot for this processor has been loaded. We've arranged 150 smp_slave_setup !! 40 for the UNIQUE value for this process to contain the PCBB 151 setup_c0_status_sec !! 41 of the target idle task. */ 152 j start_secondary !! 42 __smp_callin: 153 END(smp_bootstrap) !! 43 .prologue 1 >> 44 ldgp $29,0($27) # First order of business, load the GP. >> 45 >> 46 call_pal PAL_rduniq # Grab the target PCBB. >> 47 mov $0,$16 # Install it. >> 48 call_pal PAL_swpctx >> 49 >> 50 lda $8,0x3fff # Find "current". >> 51 bic $30,$8,$8 >> 52 >> 53 jsr $26,smp_callin >> 54 call_pal PAL_halt >> 55 .end __smp_callin 154 #endif /* CONFIG_SMP */ 56 #endif /* CONFIG_SMP */ >> 57 >> 58 # >> 59 # The following two functions are needed for supporting SRM PALcode >> 60 # on the PC164 (at least), since that PALcode manages the interrupt >> 61 # masking, and we cannot duplicate the effort without causing problems >> 62 # >> 63 >> 64 .align 3 >> 65 .globl cserve_ena >> 66 .ent cserve_ena >> 67 cserve_ena: >> 68 .prologue 0 >> 69 bis $16,$16,$17 >> 70 lda $16,52($31) >> 71 call_pal PAL_cserve >> 72 ret ($26) >> 73 .end cserve_ena >> 74 >> 75 .align 3 >> 76 .globl cserve_dis >> 77 .ent cserve_dis >> 78 cserve_dis: >> 79 .prologue 0 >> 80 bis $16,$16,$17 >> 81 lda $16,53($31) >> 82 call_pal PAL_cserve >> 83 ret ($26) >> 84 .end cserve_dis >> 85 >> 86 # >> 87 # It is handy, on occasion, to make halt actually just loop. >> 88 # Putting it here means we dont have to recompile the whole >> 89 # kernel. >> 90 # >> 91 >> 92 .align 3 >> 93 .globl halt >> 94 .ent halt >> 95 halt: >> 96 .prologue 0 >> 97 call_pal PAL_halt >> 98 .end halt

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TOMOYO Linux Cross Reference
Linux/arch/mips/kernel/head.S

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Differences between /arch/mips/kernel/head.S (Version linux-6.12-rc7) and /arch/alpha/kernel/head.S (Version linux-4.4.302)

TOMOYO Linux Cross Reference Linux/arch/mips/kernel/head.S

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Differences between /arch/mips/kernel/head.S (Version linux-6.12-rc7) and /arch/alpha/kernel/head.S (Version linux-4.4.302)

TOMOYO Linux Cross Reference
Linux/arch/mips/kernel/head.S