1 /* 1 /*
2 * This file is subject to the terms and condi 2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the mai 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 1994, 1995 Waldorf Electronic 6 * Copyright (C) 1994, 1995 Waldorf Electronics
7 * Written by Ralf Baechle and Andreas Busse 7 * Written by Ralf Baechle and Andreas Busse
8 * Copyright (C) 1994 - 99, 2003, 06 Ralf Baec 8 * Copyright (C) 1994 - 99, 2003, 06 Ralf Baechle
9 * Copyright (C) 1996 Paul M. Antoine 9 * Copyright (C) 1996 Paul M. Antoine
10 * Modified for DECStation and hence R3000 sup 10 * Modified for DECStation and hence R3000 support by Paul M. Antoine
11 * Further modifications by David S. Miller an 11 * Further modifications by David S. Miller and Harald Koerfgen
12 * Copyright (C) 1999 Silicon Graphics, Inc. 12 * Copyright (C) 1999 Silicon Graphics, Inc.
13 * Kevin Kissell, kevink@mips.com and Carsten 13 * Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
14 * Copyright (C) 2000 MIPS Technologies, Inc. 14 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
15 */ 15 */
16 #include <linux/init.h> 16 #include <linux/init.h>
17 #include <linux/threads.h> 17 #include <linux/threads.h>
18 18
19 #include <asm/addrspace.h> 19 #include <asm/addrspace.h>
20 #include <asm/asm.h> 20 #include <asm/asm.h>
21 #include <asm/asmmacro.h> 21 #include <asm/asmmacro.h>
22 #include <asm/irqflags.h> 22 #include <asm/irqflags.h>
23 #include <asm/regdef.h> 23 #include <asm/regdef.h>
24 #include <asm/mipsregs.h> 24 #include <asm/mipsregs.h>
25 #include <asm/stackframe.h> 25 #include <asm/stackframe.h>
26 26
27 #include <kernel-entry-init.h> 27 #include <kernel-entry-init.h>
28 28
29 /* 29 /*
30 * For the moment disable interrupts, 30 * For the moment disable interrupts, mark the kernel mode and
31 * set ST0_KX so that the CPU does not 31 * set ST0_KX so that the CPU does not spit fire when using
32 * 64-bit addresses. A full initializ 32 * 64-bit addresses. A full initialization of the CPU's status
33 * register is done later in per_cpu_t 33 * register is done later in per_cpu_trap_init().
34 */ 34 */
35 .macro setup_c0_status set clr 35 .macro setup_c0_status set clr
36 .set push 36 .set push
37 mfc0 t0, CP0_STATUS 37 mfc0 t0, CP0_STATUS
38 or t0, ST0_KERNEL_CUMASK|\set|0x1 38 or t0, ST0_KERNEL_CUMASK|\set|0x1f|\clr
39 xor t0, 0x1f|\clr 39 xor t0, 0x1f|\clr
40 mtc0 t0, CP0_STATUS 40 mtc0 t0, CP0_STATUS
41 .set noreorder 41 .set noreorder
42 sll zero,3 42 sll zero,3 # ehb
43 .set pop 43 .set pop
44 .endm 44 .endm
45 45
46 .macro setup_c0_status_pri 46 .macro setup_c0_status_pri
47 #ifdef CONFIG_64BIT 47 #ifdef CONFIG_64BIT
48 setup_c0_status ST0_KX 0 48 setup_c0_status ST0_KX 0
49 #else 49 #else
50 setup_c0_status 0 0 50 setup_c0_status 0 0
51 #endif 51 #endif
52 .endm 52 .endm
53 53
54 .macro setup_c0_status_sec 54 .macro setup_c0_status_sec
55 #ifdef CONFIG_64BIT 55 #ifdef CONFIG_64BIT
56 setup_c0_status ST0_KX ST0_BEV 56 setup_c0_status ST0_KX ST0_BEV
57 #else 57 #else
58 setup_c0_status 0 ST0_BEV 58 setup_c0_status 0 ST0_BEV
59 #endif 59 #endif
60 .endm 60 .endm
61 61
62 #ifndef CONFIG_NO_EXCEPT_FILL 62 #ifndef CONFIG_NO_EXCEPT_FILL
63 /* 63 /*
64 * Reserved space for exception handle 64 * Reserved space for exception handlers.
65 * Necessary for machines which link t 65 * Necessary for machines which link their kernels at KSEG0.
66 */ 66 */
67 .fill 0x400 67 .fill 0x400
68 #endif 68 #endif
69 69
70 EXPORT(_stext) 70 EXPORT(_stext)
71 71
72 #ifdef CONFIG_BOOT_RAW 72 #ifdef CONFIG_BOOT_RAW
73 /* 73 /*
74 * Give us a fighting chance of runnin 74 * Give us a fighting chance of running if execution beings at the
75 * kernel load address. This is neede 75 * kernel load address. This is needed because this platform does
76 * not have a ELF loader yet. 76 * not have a ELF loader yet.
77 */ 77 */
78 FEXPORT(__kernel_entry) 78 FEXPORT(__kernel_entry)
79 j kernel_entry 79 j kernel_entry
80 #endif /* CONFIG_BOOT_RAW */ 80 #endif /* CONFIG_BOOT_RAW */
81 81
82 __REF 82 __REF
83 83
84 NESTED(kernel_entry, 16, sp) 84 NESTED(kernel_entry, 16, sp) # kernel entry point
85 85
86 kernel_entry_setup 86 kernel_entry_setup # cpu specific setup
87 87
88 setup_c0_status_pri 88 setup_c0_status_pri
89 89
90 /* We might not get launched at the ad 90 /* We might not get launched at the address the kernel is linked to,
91 so we jump there. */ 91 so we jump there. */
92 PTR_LA t0, 0f 92 PTR_LA t0, 0f
93 jr t0 93 jr t0
94 0: 94 0:
95 95
96 PTR_LA t0, __bss_start 96 PTR_LA t0, __bss_start # clear .bss
97 LONG_S zero, (t0) 97 LONG_S zero, (t0)
98 PTR_LA t1, __bss_stop - LONGS 98 PTR_LA t1, __bss_stop - LONGSIZE
99 1: 99 1:
100 PTR_ADDIU t0, LONGSIZE 100 PTR_ADDIU t0, LONGSIZE
101 LONG_S zero, (t0) 101 LONG_S zero, (t0)
102 bne t0, t1, 1b 102 bne t0, t1, 1b
103 103
104 LONG_S a0, fw_arg0 104 LONG_S a0, fw_arg0 # firmware arguments
105 LONG_S a1, fw_arg1 105 LONG_S a1, fw_arg1
106 LONG_S a2, fw_arg2 106 LONG_S a2, fw_arg2
107 LONG_S a3, fw_arg3 107 LONG_S a3, fw_arg3
108 108
109 MTC0 zero, CP0_CONTEXT 109 MTC0 zero, CP0_CONTEXT # clear context register
110 #ifdef CONFIG_64BIT 110 #ifdef CONFIG_64BIT
111 MTC0 zero, CP0_XCONTEXT 111 MTC0 zero, CP0_XCONTEXT
112 #endif 112 #endif
113 PTR_LA $28, init_thread_union 113 PTR_LA $28, init_thread_union
114 /* Set the SP after an empty pt_regs. 114 /* Set the SP after an empty pt_regs. */
115 PTR_LI sp, _THREAD_SIZE - 32 115 PTR_LI sp, _THREAD_SIZE - 32 - PT_SIZE
116 PTR_ADDU sp, $28 116 PTR_ADDU sp, $28
117 back_to_back_c0_hazard 117 back_to_back_c0_hazard
118 set_saved_sp sp, t0, t1 118 set_saved_sp sp, t0, t1
119 PTR_SUBU sp, 4 * SZREG 119 PTR_SUBU sp, 4 * SZREG # init stack pointer
120 120
121 #ifdef CONFIG_RELOCATABLE 121 #ifdef CONFIG_RELOCATABLE
122 /* Copy kernel and apply the relocatio 122 /* Copy kernel and apply the relocations */
123 jal relocate_kernel 123 jal relocate_kernel
124 124
125 /* Repoint the sp into the new kernel 125 /* Repoint the sp into the new kernel image */
126 PTR_LI sp, _THREAD_SIZE - 32 126 PTR_LI sp, _THREAD_SIZE - 32 - PT_SIZE
127 PTR_ADDU sp, $28 127 PTR_ADDU sp, $28
128 set_saved_sp sp, t0, t1 128 set_saved_sp sp, t0, t1
129 PTR_SUBU sp, 4 * SZREG 129 PTR_SUBU sp, 4 * SZREG # init stack pointer
130 130
131 /* 131 /*
132 * relocate_kernel returns the entry p 132 * relocate_kernel returns the entry point either
133 * in the relocated kernel or the orig 133 * in the relocated kernel or the original if for
134 * some reason relocation failed - jum 134 * some reason relocation failed - jump there now
135 * with instruction hazard barrier bec 135 * with instruction hazard barrier because of the
136 * newly sync'd icache. 136 * newly sync'd icache.
137 */ 137 */
138 jr.hb v0 138 jr.hb v0
139 #else /* !CONFIG_RELOCATABLE */ 139 #else /* !CONFIG_RELOCATABLE */
140 j start_kernel 140 j start_kernel
141 #endif /* !CONFIG_RELOCATABLE */ 141 #endif /* !CONFIG_RELOCATABLE */
142 END(kernel_entry) 142 END(kernel_entry)
143 143
144 #ifdef CONFIG_SMP 144 #ifdef CONFIG_SMP
145 /* 145 /*
146 * SMP slave cpus entry point. Board specific 146 * SMP slave cpus entry point. Board specific code for bootstrap calls this
147 * function after setting up the stack and gp 147 * function after setting up the stack and gp registers.
148 */ 148 */
149 NESTED(smp_bootstrap, 16, sp) 149 NESTED(smp_bootstrap, 16, sp)
150 smp_slave_setup 150 smp_slave_setup
151 setup_c0_status_sec 151 setup_c0_status_sec
152 j start_secondary 152 j start_secondary
153 END(smp_bootstrap) 153 END(smp_bootstrap)
154 #endif /* CONFIG_SMP */ 154 #endif /* CONFIG_SMP */
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