1 /* SPDX-License-Identifier: GPL-2.0 */ 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* 2 /*
3 * r2300_switch.S: R2300 specific task switchi 3 * r2300_switch.S: R2300 specific task switching code.
4 * 4 *
5 * Copyright (C) 1994, 1995, 1996, 1999 by Ral 5 * Copyright (C) 1994, 1995, 1996, 1999 by Ralf Baechle
6 * Copyright (C) 1994, 1995, 1996 by Andreas B 6 * Copyright (C) 1994, 1995, 1996 by Andreas Busse
7 * 7 *
8 * Multi-cpu abstraction and macros for easier 8 * Multi-cpu abstraction and macros for easier reading:
9 * Copyright (C) 1996 David S. Miller (davem@d 9 * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
10 * 10 *
11 * Further modifications to make this work: 11 * Further modifications to make this work:
12 * Copyright (c) 1998-2000 Harald Koerfgen 12 * Copyright (c) 1998-2000 Harald Koerfgen
13 */ 13 */
14 #include <asm/asm.h> 14 #include <asm/asm.h>
15 #include <asm/cachectl.h> 15 #include <asm/cachectl.h>
16 #include <asm/fpregdef.h> 16 #include <asm/fpregdef.h>
17 #include <asm/mipsregs.h> 17 #include <asm/mipsregs.h>
18 #include <asm/asm-offsets.h> 18 #include <asm/asm-offsets.h>
19 #include <asm/regdef.h> 19 #include <asm/regdef.h>
20 #include <asm/stackframe.h> 20 #include <asm/stackframe.h>
21 #include <asm/thread_info.h> 21 #include <asm/thread_info.h>
22 22
23 #include <asm/asmmacro.h> 23 #include <asm/asmmacro.h>
24 24
25 .set mips1 25 .set mips1
26 .align 5 26 .align 5
27 27
28 /* 28 /*
29 * task_struct *resume(task_struct *prev, task 29 * task_struct *resume(task_struct *prev, task_struct *next,
30 * struct thread_info *nex 30 * struct thread_info *next_ti)
31 */ 31 */
32 LEAF(resume) 32 LEAF(resume)
33 mfc0 t1, CP0_STATUS 33 mfc0 t1, CP0_STATUS
34 sw t1, THREAD_STATUS(a0) 34 sw t1, THREAD_STATUS(a0)
35 cpu_save_nonscratch a0 35 cpu_save_nonscratch a0
36 sw ra, THREAD_REG31(a0) 36 sw ra, THREAD_REG31(a0)
37 37
38 #if defined(CONFIG_STACKPROTECTOR) && !defined 38 #if defined(CONFIG_STACKPROTECTOR) && !defined(CONFIG_SMP)
39 PTR_LA t8, __stack_chk_guard 39 PTR_LA t8, __stack_chk_guard
40 LONG_L t9, TASK_STACK_CANARY(a1) 40 LONG_L t9, TASK_STACK_CANARY(a1)
41 LONG_S t9, 0(t8) 41 LONG_S t9, 0(t8)
42 #endif 42 #endif
43 43
44 /* 44 /*
45 * The order of restoring the register 45 * The order of restoring the registers takes care of the race
46 * updating $28, $29 and kernelsp with 46 * updating $28, $29 and kernelsp without disabling ints.
47 */ 47 */
48 move $28, a2 48 move $28, a2
49 cpu_restore_nonscratch a1 49 cpu_restore_nonscratch a1
50 50
51 addiu t1, $28, _THREAD_SIZE - 32 51 addiu t1, $28, _THREAD_SIZE - 32
52 sw t1, kernelsp 52 sw t1, kernelsp
53 53
54 mfc0 t1, CP0_STATUS /* Do 54 mfc0 t1, CP0_STATUS /* Do we really need this? */
55 li a3, 0xff01 55 li a3, 0xff01
56 and t1, a3 56 and t1, a3
57 lw a2, THREAD_STATUS(a1) 57 lw a2, THREAD_STATUS(a1)
58 nor a3, $0, a3 58 nor a3, $0, a3
59 and a2, a3 59 and a2, a3
60 or a2, t1 60 or a2, t1
61 mtc0 a2, CP0_STATUS 61 mtc0 a2, CP0_STATUS
62 move v0, a0 62 move v0, a0
63 jr ra 63 jr ra
64 END(resume) 64 END(resume)
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