1 /* SPDX-License-Identifier: GPL-2.0 */ 1 /* SPDX-License-Identifier: GPL-2.0 */
2 #include <asm/asm-offsets.h> 2 #include <asm/asm-offsets.h>
3 #include <asm/thread_info.h> 3 #include <asm/thread_info.h>
4 4
5 #define PAGE_SIZE _PAGE_SIZE 5 #define PAGE_SIZE _PAGE_SIZE
6 6
7 /* 7 /*
8 * Put .bss..swapper_pg_dir as the first thing 8 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
9 * ensure that it has .bss alignment (64K). 9 * ensure that it has .bss alignment (64K).
10 */ 10 */
11 #define BSS_FIRST_SECTIONS *(.bss..swapper_pg_ 11 #define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
12 12
13 /* Cavium Octeon should not have a separate PT <<
14 #ifndef CONFIG_CAVIUM_OCTEON_SOC <<
15 #define EMITS_PT_NOTE <<
16 #endif <<
17 <<
18 #define RUNTIME_DISCARD_EXIT <<
19 <<
20 #include <asm-generic/vmlinux.lds.h> 13 #include <asm-generic/vmlinux.lds.h>
21 14
22 #undef mips 15 #undef mips
23 #define mips mips 16 #define mips mips
24 OUTPUT_ARCH(mips) 17 OUTPUT_ARCH(mips)
25 ENTRY(kernel_entry) 18 ENTRY(kernel_entry)
26 PHDRS { 19 PHDRS {
27 text PT_LOAD FLAGS(7); /* RWX */ 20 text PT_LOAD FLAGS(7); /* RWX */
28 #ifndef CONFIG_CAVIUM_OCTEON_SOC 21 #ifndef CONFIG_CAVIUM_OCTEON_SOC
29 note PT_NOTE FLAGS(4); /* R__ */ 22 note PT_NOTE FLAGS(4); /* R__ */
30 #endif /* CAVIUM_OCTEON_SOC */ 23 #endif /* CAVIUM_OCTEON_SOC */
31 } 24 }
32 25
33 #ifdef CONFIG_32BIT 26 #ifdef CONFIG_32BIT
34 #ifdef CONFIG_CPU_LITTLE_ENDIAN 27 #ifdef CONFIG_CPU_LITTLE_ENDIAN
35 jiffies = jiffies_64; 28 jiffies = jiffies_64;
36 #else 29 #else
37 jiffies = jiffies_64 + 4; 30 jiffies = jiffies_64 + 4;
38 #endif 31 #endif
39 #else 32 #else
40 jiffies = jiffies_64; 33 jiffies = jiffies_64;
41 #endif 34 #endif
42 35
43 SECTIONS 36 SECTIONS
44 { 37 {
45 #ifdef CONFIG_BOOT_ELF64 38 #ifdef CONFIG_BOOT_ELF64
46 /* Read-only sections, merged into tex 39 /* Read-only sections, merged into text segment: */
47 /* . = 0xc000000000000000; */ 40 /* . = 0xc000000000000000; */
48 41
49 /* This is the value for an Origin ker 42 /* This is the value for an Origin kernel, taken from an IRIX kernel. */
50 /* . = 0xc00000000001c000; */ 43 /* . = 0xc00000000001c000; */
51 44
52 /* Set the vaddr for the text segment 45 /* Set the vaddr for the text segment to a value
53 * >= 0xa800 0000 0001 9000 if no sy 46 * >= 0xa800 0000 0001 9000 if no symmon is going to configured
54 * >= 0xa800 0000 0030 0000 otherwis 47 * >= 0xa800 0000 0030 0000 otherwise
55 */ 48 */
56 49
57 /* . = 0xa800000000300000; */ 50 /* . = 0xa800000000300000; */
58 . = 0xffffffff80300000; 51 . = 0xffffffff80300000;
59 #endif 52 #endif
60 . = LINKER_LOAD_ADDRESS; !! 53 . = VMLINUX_LOAD_ADDRESS;
61 /* read-only */ 54 /* read-only */
62 _text = .; /* Text and read-only 55 _text = .; /* Text and read-only data */
63 .text : { 56 .text : {
64 TEXT_TEXT 57 TEXT_TEXT
65 SCHED_TEXT 58 SCHED_TEXT
>> 59 CPUIDLE_TEXT
66 LOCK_TEXT 60 LOCK_TEXT
67 KPROBES_TEXT 61 KPROBES_TEXT
68 IRQENTRY_TEXT 62 IRQENTRY_TEXT
69 SOFTIRQENTRY_TEXT 63 SOFTIRQENTRY_TEXT
>> 64 *(.text.*)
70 *(.fixup) 65 *(.fixup)
71 *(.gnu.warning) 66 *(.gnu.warning)
72 . = ALIGN(16); <<
73 *(.got) /* Global offset table <<
74 } :text = 0 67 } :text = 0
75 _etext = .; /* End of text section 68 _etext = .; /* End of text section */
76 69
77 EXCEPTION_TABLE(16) 70 EXCEPTION_TABLE(16)
78 71
79 /* Exception table for data bus errors 72 /* Exception table for data bus errors */
80 __dbe_table : { 73 __dbe_table : {
81 __start___dbe_table = .; 74 __start___dbe_table = .;
82 KEEP(*(__dbe_table)) !! 75 *(__dbe_table)
83 __stop___dbe_table = .; 76 __stop___dbe_table = .;
84 } 77 }
85 78
>> 79 #ifdef CONFIG_CAVIUM_OCTEON_SOC
>> 80 #define NOTES_HEADER
>> 81 #else /* CONFIG_CAVIUM_OCTEON_SOC */
>> 82 #define NOTES_HEADER :note
>> 83 #endif /* CONFIG_CAVIUM_OCTEON_SOC */
>> 84 NOTES :text NOTES_HEADER
>> 85 .dummy : { *(.dummy) } :text
>> 86
86 _sdata = .; /* Sta 87 _sdata = .; /* Start of data section */
87 RO_DATA(4096) !! 88 RODATA
88 89
89 /* writeable */ 90 /* writeable */
90 .data : { /* Data */ 91 .data : { /* Data */
91 . = . + DATAOFFSET; 92 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
92 93
93 INIT_TASK_DATA(THREAD_SIZE) 94 INIT_TASK_DATA(THREAD_SIZE)
94 NOSAVE_DATA 95 NOSAVE_DATA
95 PAGE_ALIGNED_DATA(PAGE_SIZE) <<
96 CACHELINE_ALIGNED_DATA(1 << CO 96 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
97 READ_MOSTLY_DATA(1 << CONFIG_M 97 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
98 DATA_DATA 98 DATA_DATA
99 CONSTRUCTORS 99 CONSTRUCTORS
100 } 100 }
101 BUG_TABLE 101 BUG_TABLE
102 _gp = . + 0x8000; 102 _gp = . + 0x8000;
103 .lit8 : { 103 .lit8 : {
104 *(.lit8) 104 *(.lit8)
105 } 105 }
106 .lit4 : { 106 .lit4 : {
107 *(.lit4) 107 *(.lit4)
108 } 108 }
109 /* We want the small data sections tog 109 /* We want the small data sections together, so single-instruction offsets
110 can access them all, and initialize 110 can access them all, and initialized data all before uninitialized, so
111 we can shorten the on-disk segment 111 we can shorten the on-disk segment size. */
112 .sdata : { 112 .sdata : {
113 *(.sdata) 113 *(.sdata)
114 } 114 }
115 _edata = .; /* End 115 _edata = .; /* End of data section */
116 116
117 /* will be freed after init */ 117 /* will be freed after init */
118 . = ALIGN(PAGE_SIZE); /* Ini 118 . = ALIGN(PAGE_SIZE); /* Init code and data */
119 __init_begin = .; 119 __init_begin = .;
120 INIT_TEXT_SECTION(PAGE_SIZE) 120 INIT_TEXT_SECTION(PAGE_SIZE)
121 INIT_DATA_SECTION(16) 121 INIT_DATA_SECTION(16)
122 122
123 . = ALIGN(4); 123 . = ALIGN(4);
124 .mips.machines.init : AT(ADDR(.mips.ma 124 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
125 __mips_machines_start = .; 125 __mips_machines_start = .;
126 KEEP(*(.mips.machines.init)) !! 126 *(.mips.machines.init)
127 __mips_machines_end = .; 127 __mips_machines_end = .;
128 } 128 }
129 129
130 /* .exit.text is discarded at runtime, 130 /* .exit.text is discarded at runtime, not link time, to deal with
131 * references from .rodata 131 * references from .rodata
132 */ 132 */
133 .exit.text : { 133 .exit.text : {
134 EXIT_TEXT 134 EXIT_TEXT
135 } 135 }
136 .exit.data : { 136 .exit.data : {
137 EXIT_DATA 137 EXIT_DATA
138 } 138 }
139 #ifdef CONFIG_SMP 139 #ifdef CONFIG_SMP
140 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CAC 140 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
141 #endif 141 #endif
142 142
143 .rel.dyn : ALIGN(8) { <<
144 *(.rel) <<
145 *(.rel*) <<
146 } <<
147 <<
148 #ifdef CONFIG_MIPS_ELF_APPENDED_DTB <<
149 STRUCT_ALIGN(); <<
150 .appended_dtb : AT(ADDR(.appended_dtb) <<
151 *(.appended_dtb) <<
152 KEEP(*(.appended_dtb)) <<
153 } <<
154 #endif <<
155 <<
156 #ifdef CONFIG_RELOCATABLE 143 #ifdef CONFIG_RELOCATABLE
157 . = ALIGN(4); 144 . = ALIGN(4);
158 145
159 .data.reloc : { 146 .data.reloc : {
160 _relocation_start = .; 147 _relocation_start = .;
161 /* 148 /*
162 * Space for relocation table 149 * Space for relocation table
163 * This needs to be filled so 150 * This needs to be filled so that the
164 * relocs tool can overwrite t 151 * relocs tool can overwrite the content.
165 * An invalid value is left at 152 * An invalid value is left at the start of the
166 * section to abort relocation 153 * section to abort relocation if the table
167 * has not been filled in. 154 * has not been filled in.
168 */ 155 */
169 LONG(0xFFFFFFFF); 156 LONG(0xFFFFFFFF);
170 FILL(0); 157 FILL(0);
171 . += CONFIG_RELOCATION_TABLE_S 158 . += CONFIG_RELOCATION_TABLE_SIZE - 4;
172 _relocation_end = .; 159 _relocation_end = .;
173 } 160 }
174 #endif 161 #endif
175 162
176 #ifdef CONFIG_MIPS_RAW_APPENDED_DTB 163 #ifdef CONFIG_MIPS_RAW_APPENDED_DTB
177 .fill : { <<
178 FILL(0); <<
179 BYTE(0); <<
180 STRUCT_ALIGN(); <<
181 } <<
182 __appended_dtb = .; 164 __appended_dtb = .;
183 /* leave space for appended DTB */ 165 /* leave space for appended DTB */
184 . += 0x100000; 166 . += 0x100000;
>> 167 #elif defined(CONFIG_MIPS_ELF_APPENDED_DTB)
>> 168 .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
>> 169 *(.appended_dtb)
>> 170 KEEP(*(.appended_dtb))
>> 171 }
185 #endif 172 #endif
186 /* 173 /*
187 * Align to 64K in attempt to eliminat 174 * Align to 64K in attempt to eliminate holes before the
188 * .bss..swapper_pg_dir section at the 175 * .bss..swapper_pg_dir section at the start of .bss. This
189 * also satisfies PAGE_SIZE alignment 176 * also satisfies PAGE_SIZE alignment as the largest page size
190 * allowed is 64K. 177 * allowed is 64K.
191 */ 178 */
192 . = ALIGN(0x10000); 179 . = ALIGN(0x10000);
193 __init_end = .; 180 __init_end = .;
194 /* freed after init ends here */ 181 /* freed after init ends here */
195 182
196 /* 183 /*
197 * Force .bss to 64K alignment so that 184 * Force .bss to 64K alignment so that .bss..swapper_pg_dir
198 * gets that alignment. .sbss should 185 * gets that alignment. .sbss should be empty, so there will be
199 * no holes after __init_end. */ 186 * no holes after __init_end. */
200 BSS_SECTION(0, 0x10000, 8) 187 BSS_SECTION(0, 0x10000, 8)
201 188
202 _end = . ; 189 _end = . ;
203 190
204 /* These mark the ABI of the kernel fo 191 /* These mark the ABI of the kernel for debuggers. */
205 .mdebug.abi32 : { 192 .mdebug.abi32 : {
206 KEEP(*(.mdebug.abi32)) 193 KEEP(*(.mdebug.abi32))
207 } 194 }
208 .mdebug.abi64 : { 195 .mdebug.abi64 : {
209 KEEP(*(.mdebug.abi64)) 196 KEEP(*(.mdebug.abi64))
210 } 197 }
211 198
212 /* This is the MIPS specific mdebug se 199 /* This is the MIPS specific mdebug section. */
213 .mdebug : { 200 .mdebug : {
214 *(.mdebug) 201 *(.mdebug)
215 } 202 }
216 203
217 STABS_DEBUG 204 STABS_DEBUG
218 DWARF_DEBUG 205 DWARF_DEBUG
219 ELF_DETAILS <<
220 206
221 /* These must appear regardless of . 207 /* These must appear regardless of . */
222 .gptab.sdata : { 208 .gptab.sdata : {
223 *(.gptab.data) 209 *(.gptab.data)
224 *(.gptab.sdata) 210 *(.gptab.sdata)
225 } 211 }
226 .gptab.sbss : { 212 .gptab.sbss : {
227 *(.gptab.bss) 213 *(.gptab.bss)
228 *(.gptab.sbss) 214 *(.gptab.sbss)
229 } 215 }
230 216
231 /* Sections to be discarded */ 217 /* Sections to be discarded */
232 DISCARDS 218 DISCARDS
233 /DISCARD/ : { 219 /DISCARD/ : {
234 /* ABI crap starts here */ 220 /* ABI crap starts here */
235 *(.MIPS.abiflags) 221 *(.MIPS.abiflags)
236 *(.MIPS.options) 222 *(.MIPS.options)
237 *(.gnu.attributes) <<
238 *(.options) 223 *(.options)
239 *(.pdr) 224 *(.pdr)
240 *(.reginfo) 225 *(.reginfo)
>> 226 *(.eh_frame)
241 } 227 }
242 } 228 }
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