1 /* SPDX-License-Identifier: GPL-2.0 */ 1 /* SPDX-License-Identifier: GPL-2.0 */
2 #include <asm/asm-offsets.h> 2 #include <asm/asm-offsets.h>
3 #include <asm/thread_info.h> 3 #include <asm/thread_info.h>
4 4
5 #define PAGE_SIZE _PAGE_SIZE 5 #define PAGE_SIZE _PAGE_SIZE
6 6
7 /* 7 /*
8 * Put .bss..swapper_pg_dir as the first thing 8 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
9 * ensure that it has .bss alignment (64K). 9 * ensure that it has .bss alignment (64K).
10 */ 10 */
11 #define BSS_FIRST_SECTIONS *(.bss..swapper_pg_ 11 #define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
12 12
13 /* Cavium Octeon should not have a separate PT 13 /* Cavium Octeon should not have a separate PT_NOTE Program Header. */
14 #ifndef CONFIG_CAVIUM_OCTEON_SOC 14 #ifndef CONFIG_CAVIUM_OCTEON_SOC
15 #define EMITS_PT_NOTE 15 #define EMITS_PT_NOTE
16 #endif 16 #endif
17 17
18 #define RUNTIME_DISCARD_EXIT <<
19 <<
20 #include <asm-generic/vmlinux.lds.h> 18 #include <asm-generic/vmlinux.lds.h>
21 19
22 #undef mips 20 #undef mips
23 #define mips mips 21 #define mips mips
24 OUTPUT_ARCH(mips) 22 OUTPUT_ARCH(mips)
25 ENTRY(kernel_entry) 23 ENTRY(kernel_entry)
26 PHDRS { 24 PHDRS {
27 text PT_LOAD FLAGS(7); /* RWX */ 25 text PT_LOAD FLAGS(7); /* RWX */
28 #ifndef CONFIG_CAVIUM_OCTEON_SOC 26 #ifndef CONFIG_CAVIUM_OCTEON_SOC
29 note PT_NOTE FLAGS(4); /* R__ */ 27 note PT_NOTE FLAGS(4); /* R__ */
30 #endif /* CAVIUM_OCTEON_SOC */ 28 #endif /* CAVIUM_OCTEON_SOC */
31 } 29 }
32 30
33 #ifdef CONFIG_32BIT 31 #ifdef CONFIG_32BIT
34 #ifdef CONFIG_CPU_LITTLE_ENDIAN 32 #ifdef CONFIG_CPU_LITTLE_ENDIAN
35 jiffies = jiffies_64; 33 jiffies = jiffies_64;
36 #else 34 #else
37 jiffies = jiffies_64 + 4; 35 jiffies = jiffies_64 + 4;
38 #endif 36 #endif
39 #else 37 #else
40 jiffies = jiffies_64; 38 jiffies = jiffies_64;
41 #endif 39 #endif
42 40
43 SECTIONS 41 SECTIONS
44 { 42 {
45 #ifdef CONFIG_BOOT_ELF64 43 #ifdef CONFIG_BOOT_ELF64
46 /* Read-only sections, merged into tex 44 /* Read-only sections, merged into text segment: */
47 /* . = 0xc000000000000000; */ 45 /* . = 0xc000000000000000; */
48 46
49 /* This is the value for an Origin ker 47 /* This is the value for an Origin kernel, taken from an IRIX kernel. */
50 /* . = 0xc00000000001c000; */ 48 /* . = 0xc00000000001c000; */
51 49
52 /* Set the vaddr for the text segment 50 /* Set the vaddr for the text segment to a value
53 * >= 0xa800 0000 0001 9000 if no sy 51 * >= 0xa800 0000 0001 9000 if no symmon is going to configured
54 * >= 0xa800 0000 0030 0000 otherwis 52 * >= 0xa800 0000 0030 0000 otherwise
55 */ 53 */
56 54
57 /* . = 0xa800000000300000; */ 55 /* . = 0xa800000000300000; */
58 . = 0xffffffff80300000; 56 . = 0xffffffff80300000;
59 #endif 57 #endif
60 . = LINKER_LOAD_ADDRESS; 58 . = LINKER_LOAD_ADDRESS;
61 /* read-only */ 59 /* read-only */
62 _text = .; /* Text and read-only 60 _text = .; /* Text and read-only data */
63 .text : { 61 .text : {
64 TEXT_TEXT 62 TEXT_TEXT
65 SCHED_TEXT 63 SCHED_TEXT
>> 64 CPUIDLE_TEXT
66 LOCK_TEXT 65 LOCK_TEXT
67 KPROBES_TEXT 66 KPROBES_TEXT
68 IRQENTRY_TEXT 67 IRQENTRY_TEXT
69 SOFTIRQENTRY_TEXT 68 SOFTIRQENTRY_TEXT
70 *(.fixup) 69 *(.fixup)
71 *(.gnu.warning) 70 *(.gnu.warning)
72 . = ALIGN(16); 71 . = ALIGN(16);
73 *(.got) /* Global offset table 72 *(.got) /* Global offset table */
74 } :text = 0 73 } :text = 0
75 _etext = .; /* End of text section 74 _etext = .; /* End of text section */
76 75
77 EXCEPTION_TABLE(16) 76 EXCEPTION_TABLE(16)
78 77
79 /* Exception table for data bus errors 78 /* Exception table for data bus errors */
80 __dbe_table : { 79 __dbe_table : {
81 __start___dbe_table = .; 80 __start___dbe_table = .;
82 KEEP(*(__dbe_table)) 81 KEEP(*(__dbe_table))
83 __stop___dbe_table = .; 82 __stop___dbe_table = .;
84 } 83 }
85 84
86 _sdata = .; /* Sta 85 _sdata = .; /* Start of data section */
87 RO_DATA(4096) 86 RO_DATA(4096)
88 87
89 /* writeable */ 88 /* writeable */
90 .data : { /* Data */ 89 .data : { /* Data */
91 . = . + DATAOFFSET; 90 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
92 91
93 INIT_TASK_DATA(THREAD_SIZE) 92 INIT_TASK_DATA(THREAD_SIZE)
94 NOSAVE_DATA 93 NOSAVE_DATA
95 PAGE_ALIGNED_DATA(PAGE_SIZE) 94 PAGE_ALIGNED_DATA(PAGE_SIZE)
96 CACHELINE_ALIGNED_DATA(1 << CO 95 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
97 READ_MOSTLY_DATA(1 << CONFIG_M 96 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
98 DATA_DATA 97 DATA_DATA
99 CONSTRUCTORS 98 CONSTRUCTORS
100 } 99 }
101 BUG_TABLE 100 BUG_TABLE
102 _gp = . + 0x8000; 101 _gp = . + 0x8000;
103 .lit8 : { 102 .lit8 : {
104 *(.lit8) 103 *(.lit8)
105 } 104 }
106 .lit4 : { 105 .lit4 : {
107 *(.lit4) 106 *(.lit4)
108 } 107 }
109 /* We want the small data sections tog 108 /* We want the small data sections together, so single-instruction offsets
110 can access them all, and initialize 109 can access them all, and initialized data all before uninitialized, so
111 we can shorten the on-disk segment 110 we can shorten the on-disk segment size. */
112 .sdata : { 111 .sdata : {
113 *(.sdata) 112 *(.sdata)
114 } 113 }
115 _edata = .; /* End 114 _edata = .; /* End of data section */
116 115
117 /* will be freed after init */ 116 /* will be freed after init */
118 . = ALIGN(PAGE_SIZE); /* Ini 117 . = ALIGN(PAGE_SIZE); /* Init code and data */
119 __init_begin = .; 118 __init_begin = .;
120 INIT_TEXT_SECTION(PAGE_SIZE) 119 INIT_TEXT_SECTION(PAGE_SIZE)
121 INIT_DATA_SECTION(16) 120 INIT_DATA_SECTION(16)
122 121
123 . = ALIGN(4); 122 . = ALIGN(4);
124 .mips.machines.init : AT(ADDR(.mips.ma 123 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
125 __mips_machines_start = .; 124 __mips_machines_start = .;
126 KEEP(*(.mips.machines.init)) 125 KEEP(*(.mips.machines.init))
127 __mips_machines_end = .; 126 __mips_machines_end = .;
128 } 127 }
129 128
130 /* .exit.text is discarded at runtime, 129 /* .exit.text is discarded at runtime, not link time, to deal with
131 * references from .rodata 130 * references from .rodata
132 */ 131 */
133 .exit.text : { 132 .exit.text : {
134 EXIT_TEXT 133 EXIT_TEXT
135 } 134 }
136 .exit.data : { 135 .exit.data : {
137 EXIT_DATA 136 EXIT_DATA
138 } 137 }
139 #ifdef CONFIG_SMP 138 #ifdef CONFIG_SMP
140 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CAC 139 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
141 #endif 140 #endif
142 141
143 .rel.dyn : ALIGN(8) { 142 .rel.dyn : ALIGN(8) {
144 *(.rel) 143 *(.rel)
145 *(.rel*) 144 *(.rel*)
146 } 145 }
147 146
148 #ifdef CONFIG_MIPS_ELF_APPENDED_DTB 147 #ifdef CONFIG_MIPS_ELF_APPENDED_DTB
149 STRUCT_ALIGN(); 148 STRUCT_ALIGN();
150 .appended_dtb : AT(ADDR(.appended_dtb) 149 .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
151 *(.appended_dtb) 150 *(.appended_dtb)
152 KEEP(*(.appended_dtb)) 151 KEEP(*(.appended_dtb))
153 } 152 }
154 #endif 153 #endif
155 154
156 #ifdef CONFIG_RELOCATABLE 155 #ifdef CONFIG_RELOCATABLE
157 . = ALIGN(4); 156 . = ALIGN(4);
158 157
159 .data.reloc : { 158 .data.reloc : {
160 _relocation_start = .; 159 _relocation_start = .;
161 /* 160 /*
162 * Space for relocation table 161 * Space for relocation table
163 * This needs to be filled so 162 * This needs to be filled so that the
164 * relocs tool can overwrite t 163 * relocs tool can overwrite the content.
165 * An invalid value is left at 164 * An invalid value is left at the start of the
166 * section to abort relocation 165 * section to abort relocation if the table
167 * has not been filled in. 166 * has not been filled in.
168 */ 167 */
169 LONG(0xFFFFFFFF); 168 LONG(0xFFFFFFFF);
170 FILL(0); 169 FILL(0);
171 . += CONFIG_RELOCATION_TABLE_S 170 . += CONFIG_RELOCATION_TABLE_SIZE - 4;
172 _relocation_end = .; 171 _relocation_end = .;
173 } 172 }
174 #endif 173 #endif
175 174
176 #ifdef CONFIG_MIPS_RAW_APPENDED_DTB 175 #ifdef CONFIG_MIPS_RAW_APPENDED_DTB
177 .fill : { 176 .fill : {
178 FILL(0); 177 FILL(0);
179 BYTE(0); 178 BYTE(0);
180 STRUCT_ALIGN(); 179 STRUCT_ALIGN();
181 } 180 }
182 __appended_dtb = .; 181 __appended_dtb = .;
183 /* leave space for appended DTB */ 182 /* leave space for appended DTB */
184 . += 0x100000; 183 . += 0x100000;
185 #endif 184 #endif
186 /* 185 /*
187 * Align to 64K in attempt to eliminat 186 * Align to 64K in attempt to eliminate holes before the
188 * .bss..swapper_pg_dir section at the 187 * .bss..swapper_pg_dir section at the start of .bss. This
189 * also satisfies PAGE_SIZE alignment 188 * also satisfies PAGE_SIZE alignment as the largest page size
190 * allowed is 64K. 189 * allowed is 64K.
191 */ 190 */
192 . = ALIGN(0x10000); 191 . = ALIGN(0x10000);
193 __init_end = .; 192 __init_end = .;
194 /* freed after init ends here */ 193 /* freed after init ends here */
195 194
196 /* 195 /*
197 * Force .bss to 64K alignment so that 196 * Force .bss to 64K alignment so that .bss..swapper_pg_dir
198 * gets that alignment. .sbss should 197 * gets that alignment. .sbss should be empty, so there will be
199 * no holes after __init_end. */ 198 * no holes after __init_end. */
200 BSS_SECTION(0, 0x10000, 8) 199 BSS_SECTION(0, 0x10000, 8)
201 200
202 _end = . ; 201 _end = . ;
203 202
204 /* These mark the ABI of the kernel fo 203 /* These mark the ABI of the kernel for debuggers. */
205 .mdebug.abi32 : { 204 .mdebug.abi32 : {
206 KEEP(*(.mdebug.abi32)) 205 KEEP(*(.mdebug.abi32))
207 } 206 }
208 .mdebug.abi64 : { 207 .mdebug.abi64 : {
209 KEEP(*(.mdebug.abi64)) 208 KEEP(*(.mdebug.abi64))
210 } 209 }
211 210
212 /* This is the MIPS specific mdebug se 211 /* This is the MIPS specific mdebug section. */
213 .mdebug : { 212 .mdebug : {
214 *(.mdebug) 213 *(.mdebug)
215 } 214 }
216 215
217 STABS_DEBUG 216 STABS_DEBUG
218 DWARF_DEBUG 217 DWARF_DEBUG
219 ELF_DETAILS 218 ELF_DETAILS
220 219
221 /* These must appear regardless of . 220 /* These must appear regardless of . */
222 .gptab.sdata : { 221 .gptab.sdata : {
223 *(.gptab.data) 222 *(.gptab.data)
224 *(.gptab.sdata) 223 *(.gptab.sdata)
225 } 224 }
226 .gptab.sbss : { 225 .gptab.sbss : {
227 *(.gptab.bss) 226 *(.gptab.bss)
228 *(.gptab.sbss) 227 *(.gptab.sbss)
229 } 228 }
230 229
231 /* Sections to be discarded */ 230 /* Sections to be discarded */
232 DISCARDS 231 DISCARDS
233 /DISCARD/ : { 232 /DISCARD/ : {
234 /* ABI crap starts here */ 233 /* ABI crap starts here */
235 *(.MIPS.abiflags) 234 *(.MIPS.abiflags)
236 *(.MIPS.options) 235 *(.MIPS.options)
237 *(.gnu.attributes) 236 *(.gnu.attributes)
238 *(.options) 237 *(.options)
239 *(.pdr) 238 *(.pdr)
240 *(.reginfo) 239 *(.reginfo)
241 } 240 }
242 } 241 }
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