1 /* SPDX-License-Identifier: GPL-2.0 */ !! 1 /* ld script for sparc32/sparc64 kernel */
2 #include <asm/asm-offsets.h> !! 2
>> 3 #include <asm-generic/vmlinux.lds.h>
>> 4
>> 5 #include <asm/page.h>
3 #include <asm/thread_info.h> 6 #include <asm/thread_info.h>
4 7
5 #define PAGE_SIZE _PAGE_SIZE !! 8 #ifdef CONFIG_SPARC32
>> 9 #define INITIAL_ADDRESS 0x10000 + SIZEOF_HEADERS
>> 10 #define TEXTSTART 0xf0004000
6 11
7 /* !! 12 #define SMP_CACHE_BYTES_SHIFT 5
8 * Put .bss..swapper_pg_dir as the first thing !! 13
9 * ensure that it has .bss alignment (64K). !! 14 #else
10 */ !! 15 #define SMP_CACHE_BYTES_SHIFT 6
11 #define BSS_FIRST_SECTIONS *(.bss..swapper_pg_ !! 16 #define INITIAL_ADDRESS 0x4000
12 !! 17 #define TEXTSTART 0x0000000000404000
13 /* Cavium Octeon should not have a separate PT <<
14 #ifndef CONFIG_CAVIUM_OCTEON_SOC <<
15 #define EMITS_PT_NOTE <<
16 #endif <<
17 18
18 #define RUNTIME_DISCARD_EXIT !! 19 #endif
19 20
20 #include <asm-generic/vmlinux.lds.h> !! 21 #define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT)
21 22
22 #undef mips !! 23 #ifdef CONFIG_SPARC32
23 #define mips mips !! 24 OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc")
24 OUTPUT_ARCH(mips) !! 25 OUTPUT_ARCH(sparc)
25 ENTRY(kernel_entry) !! 26 ENTRY(_start)
26 PHDRS { !! 27 jiffies = jiffies_64 + 4;
27 text PT_LOAD FLAGS(7); /* RWX */ <<
28 #ifndef CONFIG_CAVIUM_OCTEON_SOC <<
29 note PT_NOTE FLAGS(4); /* R__ */ <<
30 #endif /* CAVIUM_OCTEON_SOC */ <<
31 } <<
32 <<
33 #ifdef CONFIG_32BIT <<
34 #ifdef CONFIG_CPU_LITTLE_ENDIAN <<
35 jiffies = jiffies_64; <<
36 #else <<
37 jiffies = jiffies_64 + 4; <<
38 #endif <<
39 #else 28 #else
40 jiffies = jiffies_64; !! 29 /* sparc64 */
>> 30 OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "elf64-sparc")
>> 31 OUTPUT_ARCH(sparc:v9a)
>> 32 ENTRY(_start)
>> 33 jiffies = jiffies_64;
41 #endif 34 #endif
42 35
43 SECTIONS 36 SECTIONS
44 { 37 {
45 #ifdef CONFIG_BOOT_ELF64 !! 38 /* swapper_low_pmd_dir is sparc64 only */
46 /* Read-only sections, merged into tex !! 39 swapper_low_pmd_dir = 0x0000000000402000;
47 /* . = 0xc000000000000000; */ !! 40 . = INITIAL_ADDRESS;
48 !! 41 .text TEXTSTART :
49 /* This is the value for an Origin ker !! 42 {
50 /* . = 0xc00000000001c000; */ !! 43 _text = .;
51 !! 44 HEAD_TEXT
52 /* Set the vaddr for the text segment <<
53 * >= 0xa800 0000 0001 9000 if no sy <<
54 * >= 0xa800 0000 0030 0000 otherwis <<
55 */ <<
56 <<
57 /* . = 0xa800000000300000; */ <<
58 . = 0xffffffff80300000; <<
59 #endif <<
60 . = LINKER_LOAD_ADDRESS; <<
61 /* read-only */ <<
62 _text = .; /* Text and read-only <<
63 .text : { <<
64 TEXT_TEXT 45 TEXT_TEXT
65 SCHED_TEXT 46 SCHED_TEXT
66 LOCK_TEXT 47 LOCK_TEXT
67 KPROBES_TEXT 48 KPROBES_TEXT
68 IRQENTRY_TEXT 49 IRQENTRY_TEXT
69 SOFTIRQENTRY_TEXT <<
70 *(.fixup) <<
71 *(.gnu.warning) 50 *(.gnu.warning)
72 . = ALIGN(16); !! 51 } = 0
73 *(.got) /* Global offset table !! 52 _etext = .;
74 } :text = 0 <<
75 _etext = .; /* End of text section <<
76 53
77 EXCEPTION_TABLE(16) !! 54 RO_DATA(PAGE_SIZE)
78 55
79 /* Exception table for data bus errors !! 56 /* Start of data section */
80 __dbe_table : { !! 57 _sdata = .;
81 __start___dbe_table = .; <<
82 KEEP(*(__dbe_table)) <<
83 __stop___dbe_table = .; <<
84 } <<
85 <<
86 _sdata = .; /* Sta <<
87 RO_DATA(4096) <<
88 <<
89 /* writeable */ <<
90 .data : { /* Data */ <<
91 . = . + DATAOFFSET; <<
92 <<
93 INIT_TASK_DATA(THREAD_SIZE) <<
94 NOSAVE_DATA <<
95 PAGE_ALIGNED_DATA(PAGE_SIZE) <<
96 CACHELINE_ALIGNED_DATA(1 << CO <<
97 READ_MOSTLY_DATA(1 << CONFIG_M <<
98 DATA_DATA <<
99 CONSTRUCTORS <<
100 } <<
101 BUG_TABLE <<
102 _gp = . + 0x8000; <<
103 .lit8 : { <<
104 *(.lit8) <<
105 } <<
106 .lit4 : { <<
107 *(.lit4) <<
108 } <<
109 /* We want the small data sections tog <<
110 can access them all, and initialize <<
111 we can shorten the on-disk segment <<
112 .sdata : { <<
113 *(.sdata) <<
114 } <<
115 _edata = .; /* End <<
116 <<
117 /* will be freed after init */ <<
118 . = ALIGN(PAGE_SIZE); /* Ini <<
119 __init_begin = .; <<
120 INIT_TEXT_SECTION(PAGE_SIZE) <<
121 INIT_DATA_SECTION(16) <<
122 58
123 . = ALIGN(4); !! 59 .data1 : {
124 .mips.machines.init : AT(ADDR(.mips.ma !! 60 *(.data1)
125 __mips_machines_start = .; <<
126 KEEP(*(.mips.machines.init)) <<
127 __mips_machines_end = .; <<
128 } <<
129 <<
130 /* .exit.text is discarded at runtime, <<
131 * references from .rodata <<
132 */ <<
133 .exit.text : { <<
134 EXIT_TEXT <<
135 } 61 }
136 .exit.data : { !! 62 RW_DATA_SECTION(SMP_CACHE_BYTES, 0, THREAD_SIZE)
137 EXIT_DATA <<
138 } <<
139 #ifdef CONFIG_SMP <<
140 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CAC <<
141 #endif <<
142 63
143 .rel.dyn : ALIGN(8) { !! 64 /* End of data section */
144 *(.rel) !! 65 _edata = .;
145 *(.rel*) <<
146 } <<
147 66
148 #ifdef CONFIG_MIPS_ELF_APPENDED_DTB !! 67 .fixup : {
149 STRUCT_ALIGN(); !! 68 __start___fixup = .;
150 .appended_dtb : AT(ADDR(.appended_dtb) !! 69 *(.fixup)
151 *(.appended_dtb) !! 70 __stop___fixup = .;
152 KEEP(*(.appended_dtb)) <<
153 } 71 }
154 #endif !! 72 EXCEPTION_TABLE(16)
>> 73 NOTES
155 74
156 #ifdef CONFIG_RELOCATABLE !! 75 . = ALIGN(PAGE_SIZE);
157 . = ALIGN(4); !! 76 __init_begin = ALIGN(PAGE_SIZE);
>> 77 INIT_TEXT_SECTION(PAGE_SIZE)
>> 78 __init_text_end = .;
>> 79 INIT_DATA_SECTION(16)
158 80
159 .data.reloc : { !! 81 . = ALIGN(4);
160 _relocation_start = .; !! 82 .tsb_ldquad_phys_patch : {
161 /* !! 83 __tsb_ldquad_phys_patch = .;
162 * Space for relocation table !! 84 *(.tsb_ldquad_phys_patch)
163 * This needs to be filled so !! 85 __tsb_ldquad_phys_patch_end = .;
164 * relocs tool can overwrite t !! 86 }
165 * An invalid value is left at !! 87
166 * section to abort relocation !! 88 .tsb_phys_patch : {
167 * has not been filled in. !! 89 __tsb_phys_patch = .;
168 */ !! 90 *(.tsb_phys_patch)
169 LONG(0xFFFFFFFF); !! 91 __tsb_phys_patch_end = .;
170 FILL(0); !! 92 }
171 . += CONFIG_RELOCATION_TABLE_S !! 93
172 _relocation_end = .; !! 94 .cpuid_patch : {
>> 95 __cpuid_patch = .;
>> 96 *(.cpuid_patch)
>> 97 __cpuid_patch_end = .;
>> 98 }
>> 99
>> 100 .sun4v_1insn_patch : {
>> 101 __sun4v_1insn_patch = .;
>> 102 *(.sun4v_1insn_patch)
>> 103 __sun4v_1insn_patch_end = .;
>> 104 }
>> 105 .sun4v_2insn_patch : {
>> 106 __sun4v_2insn_patch = .;
>> 107 *(.sun4v_2insn_patch)
>> 108 __sun4v_2insn_patch_end = .;
>> 109 }
>> 110 .leon_1insn_patch : {
>> 111 __leon_1insn_patch = .;
>> 112 *(.leon_1insn_patch)
>> 113 __leon_1insn_patch_end = .;
>> 114 }
>> 115 .swapper_tsb_phys_patch : {
>> 116 __swapper_tsb_phys_patch = .;
>> 117 *(.swapper_tsb_phys_patch)
>> 118 __swapper_tsb_phys_patch_end = .;
>> 119 }
>> 120 .swapper_4m_tsb_phys_patch : {
>> 121 __swapper_4m_tsb_phys_patch = .;
>> 122 *(.swapper_4m_tsb_phys_patch)
>> 123 __swapper_4m_tsb_phys_patch_end = .;
>> 124 }
>> 125 .popc_3insn_patch : {
>> 126 __popc_3insn_patch = .;
>> 127 *(.popc_3insn_patch)
>> 128 __popc_3insn_patch_end = .;
>> 129 }
>> 130 .popc_6insn_patch : {
>> 131 __popc_6insn_patch = .;
>> 132 *(.popc_6insn_patch)
>> 133 __popc_6insn_patch_end = .;
>> 134 }
>> 135 .pause_3insn_patch : {
>> 136 __pause_3insn_patch = .;
>> 137 *(.pause_3insn_patch)
>> 138 __pause_3insn_patch_end = .;
173 } 139 }
174 #endif !! 140 PERCPU_SECTION(SMP_CACHE_BYTES)
175 141
176 #ifdef CONFIG_MIPS_RAW_APPENDED_DTB !! 142 . = ALIGN(PAGE_SIZE);
177 .fill : { <<
178 FILL(0); <<
179 BYTE(0); <<
180 STRUCT_ALIGN(); <<
181 } <<
182 __appended_dtb = .; <<
183 /* leave space for appended DTB */ <<
184 . += 0x100000; <<
185 #endif <<
186 /* <<
187 * Align to 64K in attempt to eliminat <<
188 * .bss..swapper_pg_dir section at the <<
189 * also satisfies PAGE_SIZE alignment <<
190 * allowed is 64K. <<
191 */ <<
192 . = ALIGN(0x10000); <<
193 __init_end = .; 143 __init_end = .;
194 /* freed after init ends here */ !! 144 BSS_SECTION(0, 0, 0)
195 <<
196 /* <<
197 * Force .bss to 64K alignment so that <<
198 * gets that alignment. .sbss should <<
199 * no holes after __init_end. */ <<
200 BSS_SECTION(0, 0x10000, 8) <<
201 <<
202 _end = . ; 145 _end = . ;
203 146
204 /* These mark the ABI of the kernel fo <<
205 .mdebug.abi32 : { <<
206 KEEP(*(.mdebug.abi32)) <<
207 } <<
208 .mdebug.abi64 : { <<
209 KEEP(*(.mdebug.abi64)) <<
210 } <<
211 <<
212 /* This is the MIPS specific mdebug se <<
213 .mdebug : { <<
214 *(.mdebug) <<
215 } <<
216 <<
217 STABS_DEBUG 147 STABS_DEBUG
218 DWARF_DEBUG 148 DWARF_DEBUG
219 ELF_DETAILS <<
220 149
221 /* These must appear regardless of . <<
222 .gptab.sdata : { <<
223 *(.gptab.data) <<
224 *(.gptab.sdata) <<
225 } <<
226 .gptab.sbss : { <<
227 *(.gptab.bss) <<
228 *(.gptab.sbss) <<
229 } <<
230 <<
231 /* Sections to be discarded */ <<
232 DISCARDS 150 DISCARDS
233 /DISCARD/ : { <<
234 /* ABI crap starts here */ <<
235 *(.MIPS.abiflags) <<
236 *(.MIPS.options) <<
237 *(.gnu.attributes) <<
238 *(.options) <<
239 *(.pdr) <<
240 *(.reginfo) <<
241 } <<
242 } 151 }
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