1 /* 1 /*
2 * Copyright (C) 2006 - 2008 Lemote Inc. & Ins 2 * Copyright (C) 2006 - 2008 Lemote Inc. & Institute of Computing Technology
3 * Author: Yanhua, yanh@lemote.com 3 * Author: Yanhua, yanh@lemote.com
4 * 4 *
5 * This file is subject to the terms and condi 5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the mai 6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details. 7 * for more details.
8 */ 8 */
9 #include <linux/cpufreq.h> 9 #include <linux/cpufreq.h>
10 #include <linux/errno.h> 10 #include <linux/errno.h>
11 #include <linux/export.h> 11 #include <linux/export.h>
12 12
13 #include <asm/mach-loongson2ef/loongson.h> 13 #include <asm/mach-loongson2ef/loongson.h>
14 14
15 enum { 15 enum {
16 DC_ZERO, DC_25PT = 2, DC_37PT, DC_50PT 16 DC_ZERO, DC_25PT = 2, DC_37PT, DC_50PT, DC_62PT, DC_75PT,
17 DC_87PT, DC_DISABLE, DC_RESV 17 DC_87PT, DC_DISABLE, DC_RESV
18 }; 18 };
19 19
20 struct cpufreq_frequency_table loongson2_clock 20 struct cpufreq_frequency_table loongson2_clockmod_table[] = {
21 {0, DC_RESV, CPUFREQ_ENTRY_INVALID}, 21 {0, DC_RESV, CPUFREQ_ENTRY_INVALID},
22 {0, DC_ZERO, CPUFREQ_ENTRY_INVALID}, 22 {0, DC_ZERO, CPUFREQ_ENTRY_INVALID},
23 {0, DC_25PT, 0}, 23 {0, DC_25PT, 0},
24 {0, DC_37PT, 0}, 24 {0, DC_37PT, 0},
25 {0, DC_50PT, 0}, 25 {0, DC_50PT, 0},
26 {0, DC_62PT, 0}, 26 {0, DC_62PT, 0},
27 {0, DC_75PT, 0}, 27 {0, DC_75PT, 0},
28 {0, DC_87PT, 0}, 28 {0, DC_87PT, 0},
29 {0, DC_DISABLE, 0}, 29 {0, DC_DISABLE, 0},
30 {0, DC_RESV, CPUFREQ_TABLE_END}, 30 {0, DC_RESV, CPUFREQ_TABLE_END},
31 }; 31 };
32 EXPORT_SYMBOL_GPL(loongson2_clockmod_table); 32 EXPORT_SYMBOL_GPL(loongson2_clockmod_table);
33 33
34 int loongson2_cpu_set_rate(unsigned long rate_ 34 int loongson2_cpu_set_rate(unsigned long rate_khz)
35 { 35 {
36 struct cpufreq_frequency_table *pos; 36 struct cpufreq_frequency_table *pos;
37 int regval; 37 int regval;
38 38
39 cpufreq_for_each_valid_entry(pos, loon 39 cpufreq_for_each_valid_entry(pos, loongson2_clockmod_table)
40 if (rate_khz == pos->frequency 40 if (rate_khz == pos->frequency)
41 break; 41 break;
42 if (rate_khz != pos->frequency) 42 if (rate_khz != pos->frequency)
43 return -ENOTSUPP; 43 return -ENOTSUPP;
44 44
45 regval = readl(LOONGSON_CHIPCFG); 45 regval = readl(LOONGSON_CHIPCFG);
46 regval = (regval & ~0x7) | (pos->drive 46 regval = (regval & ~0x7) | (pos->driver_data - 1);
47 writel(regval, LOONGSON_CHIPCFG); 47 writel(regval, LOONGSON_CHIPCFG);
48 48
49 return 0; 49 return 0;
50 } 50 }
51 EXPORT_SYMBOL_GPL(loongson2_cpu_set_rate); 51 EXPORT_SYMBOL_GPL(loongson2_cpu_set_rate);
52 52
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