1 // SPDX-License-Identifier: GPL-2.0-or-later 1
2 /*
3 * Based on Ocelot Linux port, which is
4 * Copyright 2001 MontaVista Software Inc.
5 * Author: jsun@mvista.com or jsun@junsun.net
6 *
7 * Copyright 2003 ICT CAS
8 * Author: Michael Guo <guoyi@ict.ac.cn>
9 *
10 * Copyright (C) 2007 Lemote Inc. & Institute
11 * Author: Fuxin Zhang, zhangfx@lemote.com
12 *
13 * Copyright (C) 2009 Lemote Inc.
14 * Author: Wu Zhangjin, wuzhangjin@gmail.com
15 */
16
17 #include <linux/dma-map-ops.h>
18 #include <linux/export.h>
19 #include <linux/pci_ids.h>
20 #include <asm/bootinfo.h>
21 #include <loongson.h>
22 #include <boot_param.h>
23 #include <builtin_dtbs.h>
24 #include <workarounds.h>
25
26 #define HOST_BRIDGE_CONFIG_ADDR ((void __iomem
27
28 u32 cpu_clock_freq;
29 EXPORT_SYMBOL(cpu_clock_freq);
30 struct efi_memory_map_loongson *loongson_memma
31 struct loongson_system_configuration loongson_
32
33 struct board_devices *eboard;
34 struct interface_info *einter;
35 struct loongson_special_attribute *especial;
36
37 u64 loongson_chipcfg[MAX_PACKAGES] = {0xffffff
38 u64 loongson_chiptemp[MAX_PACKAGES];
39 u64 loongson_freqctrl[MAX_PACKAGES];
40
41 unsigned long long smp_group[4];
42
43 const char *get_system_type(void)
44 {
45 return "Generic Loongson64 System";
46 }
47
48
49 void __init prom_dtb_init_env(void)
50 {
51 if ((fw_arg2 < CKSEG0 || fw_arg2 > CKS
52 && (fw_arg2 < XKPHYS || fw_arg
53
54 loongson_fdt_blob = __dtb_loon
55 else
56 loongson_fdt_blob = (void *)fw
57 }
58
59 void __init prom_lefi_init_env(void)
60 {
61 struct boot_params *boot_p;
62 struct loongson_params *loongson_p;
63 struct system_loongson *esys;
64 struct efi_cpuinfo_loongson *ecpu;
65 struct irq_source_routing_table *eirq_
66 u32 id;
67 u16 vendor;
68
69 /* firmware arguments are initialized
70 boot_p = (struct boot_params *)fw_arg2
71 loongson_p = &(boot_p->efi.smbios.lp);
72
73 esys = (struct system_loongson *)
74 ((u64)loongson_p + loongson_p-
75 ecpu = (struct efi_cpuinfo_loongson *)
76 ((u64)loongson_p + loongson_p-
77 eboard = (struct board_devices *)
78 ((u64)loongson_p + loongson_p-
79 einter = (struct interface_info *)
80 ((u64)loongson_p + loongson_p-
81 especial = (struct loongson_special_at
82 ((u64)loongson_p + loongson_p-
83 eirq_source = (struct irq_source_routi
84 ((u64)loongson_p + loongson_p-
85 loongson_memmap = (struct efi_memory_m
86 ((u64)loongson_p + loongson_p-
87
88 cpu_clock_freq = ecpu->cpu_clock_freq;
89 loongson_sysconf.cputype = ecpu->cputy
90 switch (ecpu->cputype) {
91 case Legacy_2K:
92 case Loongson_2K:
93 smp_group[0] = 0x900000001fe11
94 loongson_sysconf.cores_per_nod
95 loongson_sysconf.cores_per_pac
96 break;
97 case Legacy_3A:
98 case Loongson_3A:
99 loongson_sysconf.cores_per_nod
100 loongson_sysconf.cores_per_pac
101 smp_group[0] = 0x900000003ff01
102 smp_group[1] = 0x900010003ff01
103 smp_group[2] = 0x900020003ff01
104 smp_group[3] = 0x900030003ff01
105 loongson_chipcfg[0] = 0x900000
106 loongson_chipcfg[1] = 0x900010
107 loongson_chipcfg[2] = 0x900020
108 loongson_chipcfg[3] = 0x900030
109 loongson_chiptemp[0] = 0x90000
110 loongson_chiptemp[1] = 0x90001
111 loongson_chiptemp[2] = 0x90002
112 loongson_chiptemp[3] = 0x90003
113 loongson_freqctrl[0] = 0x90000
114 loongson_freqctrl[1] = 0x90001
115 loongson_freqctrl[2] = 0x90002
116 loongson_freqctrl[3] = 0x90003
117 loongson_sysconf.workarounds =
118 break;
119 case Legacy_3B:
120 case Loongson_3B:
121 loongson_sysconf.cores_per_nod
122 loongson_sysconf.cores_per_pac
123 smp_group[0] = 0x900000003ff01
124 smp_group[1] = 0x900010003ff05
125 smp_group[2] = 0x900020003ff09
126 smp_group[3] = 0x900030003ff0d
127 loongson_chipcfg[0] = 0x900000
128 loongson_chipcfg[1] = 0x900020
129 loongson_chipcfg[2] = 0x900040
130 loongson_chipcfg[3] = 0x900060
131 loongson_chiptemp[0] = 0x90000
132 loongson_chiptemp[1] = 0x90002
133 loongson_chiptemp[2] = 0x90004
134 loongson_chiptemp[3] = 0x90006
135 loongson_freqctrl[0] = 0x90000
136 loongson_freqctrl[1] = 0x90002
137 loongson_freqctrl[2] = 0x90004
138 loongson_freqctrl[3] = 0x90006
139 loongson_sysconf.workarounds =
140 break;
141 default:
142 loongson_sysconf.cores_per_nod
143 loongson_sysconf.cores_per_pac
144 loongson_chipcfg[0] = 0x900000
145 }
146
147 loongson_sysconf.nr_cpus = ecpu->nr_cp
148 loongson_sysconf.boot_cpu_id = ecpu->c
149 loongson_sysconf.reserved_cpus_mask =
150 if (ecpu->nr_cpus > NR_CPUS || ecpu->n
151 loongson_sysconf.nr_cpus = NR_
152 loongson_sysconf.nr_nodes = (loongson_
153 loongson_sysconf.cores_per_nod
154 loongson_sysconf.cores_per_nod
155
156 loongson_sysconf.dma_mask_bits = eirq_
157 if (loongson_sysconf.dma_mask_bits < 3
158 loongson_sysconf.dma_m
159 loongson_sysconf.dma_mask_bits
160 dma_default_coherent = true;
161 } else {
162 dma_default_coherent = !eirq_s
163 }
164
165 pr_info("Firmware: Coherent DMA: %s\n"
166
167 loongson_sysconf.restart_addr = boot_p
168 loongson_sysconf.poweroff_addr = boot_
169 loongson_sysconf.suspend_addr = boot_p
170
171 loongson_sysconf.vgabios_addr = boot_p
172 pr_debug("Shutdown Addr: %llx, Restart
173 loongson_sysconf.poweroff_addr
174 loongson_sysconf.vgabios_addr)
175
176 loongson_sysconf.workarounds |= esys->
177
178 pr_info("CpuClock = %u\n", cpu_clock_f
179
180 /* Read the ID of PCI host bridge to d
181 id = readl(HOST_BRIDGE_CONFIG_ADDR);
182 vendor = id & 0xffff;
183
184 switch (vendor) {
185 case PCI_VENDOR_ID_LOONGSON:
186 pr_info("The bridge chip is LS
187 loongson_sysconf.bridgetype =
188 loongson_sysconf.early_config
189 break;
190 case PCI_VENDOR_ID_AMD:
191 case PCI_VENDOR_ID_ATI:
192 pr_info("The bridge chip is RS
193 loongson_sysconf.bridgetype =
194 loongson_sysconf.early_config
195 break;
196 default:
197 pr_info("The bridge chip is VI
198 loongson_sysconf.bridgetype =
199 loongson_sysconf.early_config
200 loongson_fdt_blob = __dtb_loon
201 break;
202 }
203
204 if ((read_c0_prid() & PRID_IMP_MASK) =
205 switch (read_c0_prid() & PRID_
206 case PRID_REV_LOONGSON3A_R1:
207 case PRID_REV_LOONGSON3A_R2_0:
208 case PRID_REV_LOONGSON3A_R2_1:
209 case PRID_REV_LOONGSON3A_R3_0:
210 case PRID_REV_LOONGSON3A_R3_1:
211 switch (loongson_sysco
212 case LS7A:
213 loongson_fdt_b
214 break;
215 case RS780E:
216 loongson_fdt_b
217 break;
218 default:
219 break;
220 }
221 break;
222 case PRID_REV_LOONGSON3B_R1:
223 case PRID_REV_LOONGSON3B_R2:
224 if (loongson_sysconf.b
225 loongson_fdt_b
226 break;
227 default:
228 break;
229 }
230 } else if ((read_c0_prid() & PRID_IMP_
231 loongson_fdt_blob = __dtb_loon
232 } else if ((read_c0_prid() & PRID_IMP_
233 if (loongson_sysconf.bridgetyp
234 loongson_fdt_blob = __
235 }
236
237 if (!loongson_fdt_blob)
238 pr_err("Failed to determine bu
239 }
240
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