1 // SPDX-License-Identifier: GPL-2.0 1
2 /*
3 * ip22-int.c: Routines for generic manipulati
4 * found on INDY and Indigo2 works
5 *
6 * Copyright (C) 1996 David S. Miller (davem@d
7 * Copyright (C) 1997, 1998 Ralf Baechle (ralf
8 * Copyright (C) 1999 Andrew R. Baker (andrewb
9 * - Indigo2 changes
10 * - Interrupt handling fix
11 * Copyright (C) 2001, 2003 Ladislav Michl (la
12 */
13 #include <linux/types.h>
14 #include <linux/init.h>
15 #include <linux/kernel_stat.h>
16 #include <linux/interrupt.h>
17 #include <linux/ftrace.h>
18
19 #include <asm/irq_cpu.h>
20 #include <asm/sgi/hpc3.h>
21 #include <asm/sgi/ip22.h>
22
23 /* So far nothing hangs here */
24 #undef USE_LIO3_IRQ
25
26 struct sgint_regs *sgint;
27
28 static char lc0msk_to_irqnr[256];
29 static char lc1msk_to_irqnr[256];
30 static char lc2msk_to_irqnr[256];
31 static char lc3msk_to_irqnr[256];
32
33 extern int ip22_eisa_init(void);
34
35 static void enable_local0_irq(struct irq_data
36 {
37 /* don't allow mappable interrupt to b
38 * we have our own way to do so */
39 if (d->irq != SGI_MAP_0_IRQ)
40 sgint->imask0 |= (1 << (d->irq
41 }
42
43 static void disable_local0_irq(struct irq_data
44 {
45 sgint->imask0 &= ~(1 << (d->irq - SGIN
46 }
47
48 static struct irq_chip ip22_local0_irq_type =
49 .name = "IP22 local 0",
50 .irq_mask = disable_local0_irq,
51 .irq_unmask = enable_local0_irq,
52 };
53
54 static void enable_local1_irq(struct irq_data
55 {
56 /* don't allow mappable interrupt to b
57 * we have our own way to do so */
58 if (d->irq != SGI_MAP_1_IRQ)
59 sgint->imask1 |= (1 << (d->irq
60 }
61
62 static void disable_local1_irq(struct irq_data
63 {
64 sgint->imask1 &= ~(1 << (d->irq - SGIN
65 }
66
67 static struct irq_chip ip22_local1_irq_type =
68 .name = "IP22 local 1",
69 .irq_mask = disable_local1_irq,
70 .irq_unmask = enable_local1_irq,
71 };
72
73 static void enable_local2_irq(struct irq_data
74 {
75 sgint->imask0 |= (1 << (SGI_MAP_0_IRQ
76 sgint->cmeimask0 |= (1 << (d->irq - SG
77 }
78
79 static void disable_local2_irq(struct irq_data
80 {
81 sgint->cmeimask0 &= ~(1 << (d->irq - S
82 if (!sgint->cmeimask0)
83 sgint->imask0 &= ~(1 << (SGI_M
84 }
85
86 static struct irq_chip ip22_local2_irq_type =
87 .name = "IP22 local 2",
88 .irq_mask = disable_local2_irq,
89 .irq_unmask = enable_local2_irq,
90 };
91
92 static void enable_local3_irq(struct irq_data
93 {
94 sgint->imask1 |= (1 << (SGI_MAP_1_IRQ
95 sgint->cmeimask1 |= (1 << (d->irq - SG
96 }
97
98 static void disable_local3_irq(struct irq_data
99 {
100 sgint->cmeimask1 &= ~(1 << (d->irq - S
101 if (!sgint->cmeimask1)
102 sgint->imask1 &= ~(1 << (SGI_M
103 }
104
105 static struct irq_chip ip22_local3_irq_type =
106 .name = "IP22 local 3",
107 .irq_mask = disable_local3_irq,
108 .irq_unmask = enable_local3_irq,
109 };
110
111 static void indy_local0_irqdispatch(void)
112 {
113 u8 mask = sgint->istat0 & sgint->imask
114 u8 mask2;
115 int irq;
116
117 if (mask & SGINT_ISTAT0_LIO2) {
118 mask2 = sgint->vmeistat & sgin
119 irq = lc2msk_to_irqnr[mask2];
120 } else
121 irq = lc0msk_to_irqnr[mask];
122
123 /*
124 * workaround for INT2 bug; if irq ==
125 * irq, but failed to latch it into st
126 */
127 if (irq)
128 do_IRQ(irq);
129 else
130 do_IRQ(SGINT_LOCAL0 + 0);
131 }
132
133 static void indy_local1_irqdispatch(void)
134 {
135 u8 mask = sgint->istat1 & sgint->imask
136 u8 mask2;
137 int irq;
138
139 if (mask & SGINT_ISTAT1_LIO3) {
140 mask2 = sgint->vmeistat & sgin
141 irq = lc3msk_to_irqnr[mask2];
142 } else
143 irq = lc1msk_to_irqnr[mask];
144
145 /* if irq == 0, then the interrupt has
146 if (irq)
147 do_IRQ(irq);
148 }
149
150 extern void ip22_be_interrupt(int irq);
151
152 static void __irq_entry indy_buserror_irq(void
153 {
154 int irq = SGI_BUSERR_IRQ;
155
156 irq_enter();
157 kstat_incr_irq_this_cpu(irq);
158 ip22_be_interrupt(irq);
159 irq_exit();
160 }
161
162 #ifdef USE_LIO3_IRQ
163 #define SGI_INTERRUPTS SGINT_END
164 #else
165 #define SGI_INTERRUPTS SGINT_LOCAL3
166 #endif
167
168 /*
169 * IRQs on the INDY look basically (barring so
170 * at all) like:
171 *
172 * MIPS IRQ Source
173 * -------- ------
174 * 0 Software (ignored)
175 * 1 Software (ignored)
176 * 2 Local IRQ level zero
177 * 3 Local IRQ level one
178 * 4 8254 Timer zero
179 * 5 8254 Timer one
180 * 6 Bus Error
181 * 7 R4k timer (what we use
182 *
183 * We handle the IRQ according to _our_ priori
184 *
185 * Highest ---- R4k Timer
186 * Local IRQ zero
187 * Local IRQ one
188 * Bus Error
189 * 8254 Timer zero
190 * Lowest ---- 8254 Timer one
191 *
192 * then we just return, if multiple IRQs are p
193 * another exception, big deal.
194 */
195
196 asmlinkage void plat_irq_dispatch(void)
197 {
198 unsigned int pending = read_c0_status(
199
200 /*
201 * First we check for r4k counter/time
202 */
203 if (pending & CAUSEF_IP7)
204 do_IRQ(SGI_TIMER_IRQ);
205 else if (pending & CAUSEF_IP2)
206 indy_local0_irqdispatch();
207 else if (pending & CAUSEF_IP3)
208 indy_local1_irqdispatch();
209 else if (pending & CAUSEF_IP6)
210 indy_buserror_irq();
211 else if (pending & (CAUSEF_IP4 | CAUSE
212 indy_8254timer_irq();
213 }
214
215 void __init arch_init_irq(void)
216 {
217 int i;
218
219 /* Init local mask --> irq tables. */
220 for (i = 0; i < 256; i++) {
221 if (i & 0x80) {
222 lc0msk_to_irqnr[i] = S
223 lc1msk_to_irqnr[i] = S
224 lc2msk_to_irqnr[i] = S
225 lc3msk_to_irqnr[i] = S
226 } else if (i & 0x40) {
227 lc0msk_to_irqnr[i] = S
228 lc1msk_to_irqnr[i] = S
229 lc2msk_to_irqnr[i] = S
230 lc3msk_to_irqnr[i] = S
231 } else if (i & 0x20) {
232 lc0msk_to_irqnr[i] = S
233 lc1msk_to_irqnr[i] = S
234 lc2msk_to_irqnr[i] = S
235 lc3msk_to_irqnr[i] = S
236 } else if (i & 0x10) {
237 lc0msk_to_irqnr[i] = S
238 lc1msk_to_irqnr[i] = S
239 lc2msk_to_irqnr[i] = S
240 lc3msk_to_irqnr[i] = S
241 } else if (i & 0x08) {
242 lc0msk_to_irqnr[i] = S
243 lc1msk_to_irqnr[i] = S
244 lc2msk_to_irqnr[i] = S
245 lc3msk_to_irqnr[i] = S
246 } else if (i & 0x04) {
247 lc0msk_to_irqnr[i] = S
248 lc1msk_to_irqnr[i] = S
249 lc2msk_to_irqnr[i] = S
250 lc3msk_to_irqnr[i] = S
251 } else if (i & 0x02) {
252 lc0msk_to_irqnr[i] = S
253 lc1msk_to_irqnr[i] = S
254 lc2msk_to_irqnr[i] = S
255 lc3msk_to_irqnr[i] = S
256 } else if (i & 0x01) {
257 lc0msk_to_irqnr[i] = S
258 lc1msk_to_irqnr[i] = S
259 lc2msk_to_irqnr[i] = S
260 lc3msk_to_irqnr[i] = S
261 } else {
262 lc0msk_to_irqnr[i] = 0
263 lc1msk_to_irqnr[i] = 0
264 lc2msk_to_irqnr[i] = 0
265 lc3msk_to_irqnr[i] = 0
266 }
267 }
268
269 /* Mask out all interrupts. */
270 sgint->imask0 = 0;
271 sgint->imask1 = 0;
272 sgint->cmeimask0 = 0;
273 sgint->cmeimask1 = 0;
274
275 /* init CPU irqs */
276 mips_cpu_irq_init();
277
278 for (i = SGINT_LOCAL0; i < SGI_INTERRU
279 struct irq_chip *handler;
280
281 if (i < SGINT_LOCAL1)
282 handler = &ip2
283 else if (i < SGINT_LOCAL2)
284 handler = &ip2
285 else if (i < SGINT_LOCAL3)
286 handler = &ip2
287 else
288 handler = &ip2
289
290 irq_set_chip_and_handler(i, ha
291 }
292
293 /* vector handler. this register the I
294 if (request_irq(SGI_LOCAL_0_IRQ, no_ac
295 "local0 cascade", NULL
296 pr_err("Failed to register loc
297 if (request_irq(SGI_LOCAL_1_IRQ, no_ac
298 "local1 cascade", NULL
299 pr_err("Failed to register loc
300 if (request_irq(SGI_BUSERR_IRQ, no_act
301 "Bus Error", NULL))
302 pr_err("Failed to register Bus
303
304 /* cascade in cascade. i love Indy ;-)
305 if (request_irq(SGI_MAP_0_IRQ, no_acti
306 "mapable0 cascade", NU
307 pr_err("Failed to register map
308 #ifdef USE_LIO3_IRQ
309 if (request_irq(SGI_MAP_1_IRQ, no_acti
310 "mapable1 cascade", NU
311 pr_err("Failed to register map
312 #endif
313
314 #ifdef CONFIG_EISA
315 if (ip22_is_fullhouse()) /* Onl
316 ip22_eisa_init();
317 #endif
318 }
319
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