1 /* 1 /*
2 * This file is subject to the terms and condi 2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the mai 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Time operations for IP22 machines. Original 6 * Time operations for IP22 machines. Original code may come from
7 * Ralf Baechle or David S. Miller (sorry guys 7 * Ralf Baechle or David S. Miller (sorry guys, i'm really not sure)
8 * 8 *
9 * Copyright (C) 2001 by Ladislav Michl 9 * Copyright (C) 2001 by Ladislav Michl
10 * Copyright (C) 2003, 06 Ralf Baechle (ralf@l <<
11 */ 10 */
>> 11
12 #include <linux/bcd.h> 12 #include <linux/bcd.h>
13 #include <linux/i8253.h> <<
14 #include <linux/init.h> 13 #include <linux/init.h>
15 #include <linux/irq.h> <<
16 #include <linux/kernel.h> 14 #include <linux/kernel.h>
17 #include <linux/interrupt.h> 15 #include <linux/interrupt.h>
18 #include <linux/kernel_stat.h> 16 #include <linux/kernel_stat.h>
19 #include <linux/time.h> 17 #include <linux/time.h>
20 #include <linux/ftrace.h> <<
21 18
22 #include <asm/cpu.h> 19 #include <asm/cpu.h>
23 #include <asm/mipsregs.h> 20 #include <asm/mipsregs.h>
24 #include <asm/io.h> 21 #include <asm/io.h>
25 #include <asm/irq.h> 22 #include <asm/irq.h>
26 #include <asm/time.h> 23 #include <asm/time.h>
>> 24 #include <asm/ds1286.h>
27 #include <asm/sgialib.h> 25 #include <asm/sgialib.h>
28 #include <asm/sgi/ioc.h> 26 #include <asm/sgi/ioc.h>
29 #include <asm/sgi/hpc3.h> 27 #include <asm/sgi/hpc3.h>
30 #include <asm/sgi/ip22.h> 28 #include <asm/sgi/ip22.h>
31 29
>> 30 /*
>> 31 * note that mktime uses month from 1 to 12 while to_tm
>> 32 * uses 0 to 11.
>> 33 */
>> 34 static unsigned long indy_rtc_get_time(void)
>> 35 {
>> 36 unsigned int yrs, mon, day, hrs, min, sec;
>> 37 unsigned int save_control;
>> 38
>> 39 save_control = hpc3c0->rtcregs[RTC_CMD] & 0xff;
>> 40 hpc3c0->rtcregs[RTC_CMD] = save_control | RTC_TE;
>> 41
>> 42 sec = BCD2BIN(hpc3c0->rtcregs[RTC_SECONDS] & 0xff);
>> 43 min = BCD2BIN(hpc3c0->rtcregs[RTC_MINUTES] & 0xff);
>> 44 hrs = BCD2BIN(hpc3c0->rtcregs[RTC_HOURS] & 0x1f);
>> 45 day = BCD2BIN(hpc3c0->rtcregs[RTC_DATE] & 0xff);
>> 46 mon = BCD2BIN(hpc3c0->rtcregs[RTC_MONTH] & 0x1f);
>> 47 yrs = BCD2BIN(hpc3c0->rtcregs[RTC_YEAR] & 0xff);
>> 48
>> 49 hpc3c0->rtcregs[RTC_CMD] = save_control;
>> 50
>> 51 if (yrs < 45)
>> 52 yrs += 30;
>> 53 if ((yrs += 40) < 70)
>> 54 yrs += 100;
>> 55
>> 56 return mktime(yrs + 1900, mon, day, hrs, min, sec);
>> 57 }
>> 58
>> 59 static int indy_rtc_set_time(unsigned long tim)
>> 60 {
>> 61 struct rtc_time tm;
>> 62 unsigned int save_control;
>> 63
>> 64 to_tm(tim, &tm);
>> 65
>> 66 tm.tm_mon += 1; /* tm_mon starts at zero */
>> 67 tm.tm_year -= 1940;
>> 68 if (tm.tm_year >= 100)
>> 69 tm.tm_year -= 100;
>> 70
>> 71 save_control = hpc3c0->rtcregs[RTC_CMD] & 0xff;
>> 72 hpc3c0->rtcregs[RTC_CMD] = save_control | RTC_TE;
>> 73
>> 74 hpc3c0->rtcregs[RTC_YEAR] = BIN2BCD(tm.tm_sec);
>> 75 hpc3c0->rtcregs[RTC_MONTH] = BIN2BCD(tm.tm_mon);
>> 76 hpc3c0->rtcregs[RTC_DATE] = BIN2BCD(tm.tm_mday);
>> 77 hpc3c0->rtcregs[RTC_HOURS] = BIN2BCD(tm.tm_hour);
>> 78 hpc3c0->rtcregs[RTC_MINUTES] = BIN2BCD(tm.tm_min);
>> 79 hpc3c0->rtcregs[RTC_SECONDS] = BIN2BCD(tm.tm_sec);
>> 80 hpc3c0->rtcregs[RTC_HUNDREDTH_SECOND] = 0;
>> 81
>> 82 hpc3c0->rtcregs[RTC_CMD] = save_control;
>> 83
>> 84 return 0;
>> 85 }
>> 86
32 static unsigned long dosample(void) 87 static unsigned long dosample(void)
33 { 88 {
34 u32 ct0, ct1; 89 u32 ct0, ct1;
35 u8 msb; !! 90 volatile u8 msb, lsb;
36 91
37 /* Start the counter. */ 92 /* Start the counter. */
38 sgint->tcword = (SGINT_TCWORD_CNT2 | S 93 sgint->tcword = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL |
39 SGINT_TCWORD_MRGEN); 94 SGINT_TCWORD_MRGEN);
40 sgint->tcnt2 = SGINT_TCSAMP_COUNTER & 95 sgint->tcnt2 = SGINT_TCSAMP_COUNTER & 0xff;
41 sgint->tcnt2 = SGINT_TCSAMP_COUNTER >> 96 sgint->tcnt2 = SGINT_TCSAMP_COUNTER >> 8;
42 97
43 /* Get initial counter invariant */ 98 /* Get initial counter invariant */
44 ct0 = read_c0_count(); 99 ct0 = read_c0_count();
45 100
46 /* Latch and spin until top byte of co 101 /* Latch and spin until top byte of counter2 is zero */
47 do { 102 do {
48 writeb(SGINT_TCWORD_CNT2 | SGI !! 103 sgint->tcword = SGINT_TCWORD_CNT2 | SGINT_TCWORD_CLAT;
49 (void) readb(&sgint->tcnt2); !! 104 lsb = sgint->tcnt2;
50 msb = readb(&sgint->tcnt2); !! 105 msb = sgint->tcnt2;
51 ct1 = read_c0_count(); 106 ct1 = read_c0_count();
52 } while (msb); 107 } while (msb);
53 108
54 /* Stop the counter. */ 109 /* Stop the counter. */
55 writeb(SGINT_TCWORD_CNT2 | SGINT_TCWOR !! 110 sgint->tcword = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL |
56 &sgint->tcword); !! 111 SGINT_TCWORD_MSWST);
57 /* 112 /*
58 * Return the difference, this is how 113 * Return the difference, this is how far the r4k counter increments
59 * for every 1/HZ seconds. We round of 114 * for every 1/HZ seconds. We round off the nearest 1 MHz of master
60 * clock (= 1000000 / HZ / 2). 115 * clock (= 1000000 / HZ / 2).
61 */ 116 */
62 !! 117 //return (ct1 - ct0 + (500000/HZ/2)) / (500000/HZ) * (500000/HZ);
63 return (ct1 - ct0) / (500000/HZ) * (50 118 return (ct1 - ct0) / (500000/HZ) * (500000/HZ);
64 } 119 }
65 120
66 /* 121 /*
67 * Here we need to calibrate the cycle counter 122 * Here we need to calibrate the cycle counter to at least be close.
68 */ 123 */
69 __init void plat_time_init(void) !! 124 static __init void indy_time_init(void)
70 { 125 {
71 unsigned long r4k_ticks[3]; 126 unsigned long r4k_ticks[3];
72 unsigned long r4k_tick; 127 unsigned long r4k_tick;
73 128
74 /* !! 129 /*
75 * Figure out the r4k offset, the algo 130 * Figure out the r4k offset, the algorithm is very simple and works in
76 * _all_ cases as long as the 8254 cou 131 * _all_ cases as long as the 8254 counter register itself works ok (as
77 * an interrupt driving timer it does 132 * an interrupt driving timer it does not because of bug, this is why
78 * we are using the onchip r4k counter 133 * we are using the onchip r4k counter/compare register to serve this
79 * purpose, but for r4k_offset calcula 134 * purpose, but for r4k_offset calculation it will work ok for us).
80 * There are other very complicated wa 135 * There are other very complicated ways of performing this calculation
81 * but this one works just fine so I a 136 * but this one works just fine so I am not going to futz around. ;-)
82 */ 137 */
83 printk(KERN_INFO "Calibrating system t 138 printk(KERN_INFO "Calibrating system timer... ");
84 dosample(); /* Prime cache. */ 139 dosample(); /* Prime cache. */
85 dosample(); /* Prime cache. */ 140 dosample(); /* Prime cache. */
86 /* Zero is NOT an option. */ 141 /* Zero is NOT an option. */
87 do { 142 do {
88 r4k_ticks[0] = dosample(); 143 r4k_ticks[0] = dosample();
89 } while (!r4k_ticks[0]); 144 } while (!r4k_ticks[0]);
90 do { 145 do {
91 r4k_ticks[1] = dosample(); 146 r4k_ticks[1] = dosample();
92 } while (!r4k_ticks[1]); 147 } while (!r4k_ticks[1]);
93 148
94 if (r4k_ticks[0] != r4k_ticks[1]) { 149 if (r4k_ticks[0] != r4k_ticks[1]) {
95 printk("warning: timer counts 150 printk("warning: timer counts differ, retrying... ");
96 r4k_ticks[2] = dosample(); 151 r4k_ticks[2] = dosample();
97 if (r4k_ticks[2] == r4k_ticks[ 152 if (r4k_ticks[2] == r4k_ticks[0]
98 || r4k_ticks[2] == r4k_tic 153 || r4k_ticks[2] == r4k_ticks[1])
99 r4k_tick = r4k_ticks[2 154 r4k_tick = r4k_ticks[2];
100 else { 155 else {
101 printk("disagreement, 156 printk("disagreement, using average... ");
102 r4k_tick = (r4k_ticks[ 157 r4k_tick = (r4k_ticks[0] + r4k_ticks[1]
103 + r4k_ticks 158 + r4k_ticks[2]) / 3;
104 } 159 }
105 } else 160 } else
106 r4k_tick = r4k_ticks[0]; 161 r4k_tick = r4k_ticks[0];
107 162
108 printk("%d [%d.%04d MHz CPU]\n", (int) 163 printk("%d [%d.%04d MHz CPU]\n", (int) r4k_tick,
109 (int) (r4k_tick / (500000 / HZ 164 (int) (r4k_tick / (500000 / HZ)),
110 (int) (r4k_tick % (500000 / HZ 165 (int) (r4k_tick % (500000 / HZ)));
111 166
112 mips_hpt_frequency = r4k_tick * HZ; !! 167 mips_counter_frequency = r4k_tick * HZ;
113 <<
114 if (ip22_is_fullhouse()) <<
115 setup_pit_timer(); <<
116 } 168 }
117 169
118 /* Generic SGI handler for (spurious) 8254 int 170 /* Generic SGI handler for (spurious) 8254 interrupts */
119 void __irq_entry indy_8254timer_irq(void) !! 171 void indy_8254timer_irq(struct pt_regs *regs)
120 { 172 {
121 int irq = SGI_8254_0_IRQ; 173 int irq = SGI_8254_0_IRQ;
122 ULONG cnt; 174 ULONG cnt;
123 char c; 175 char c;
124 176
125 irq_enter(); 177 irq_enter();
126 kstat_incr_irq_this_cpu(irq); !! 178 kstat_this_cpu.irqs[irq]++;
127 printk(KERN_ALERT "Oops, got 8254 inte 179 printk(KERN_ALERT "Oops, got 8254 interrupt.\n");
128 ArcRead(0, &c, 1, &cnt); 180 ArcRead(0, &c, 1, &cnt);
129 ArcEnterInteractiveMode(); 181 ArcEnterInteractiveMode();
130 irq_exit(); 182 irq_exit();
>> 183 }
>> 184
>> 185 void indy_r4k_timer_interrupt(struct pt_regs *regs)
>> 186 {
>> 187 int irq = SGI_TIMER_IRQ;
>> 188
>> 189 irq_enter();
>> 190 kstat_this_cpu.irqs[irq]++;
>> 191 timer_interrupt(irq, NULL, regs);
>> 192 irq_exit();
>> 193 }
>> 194
>> 195 extern int setup_irq(unsigned int irq, struct irqaction *irqaction);
>> 196
>> 197 static void indy_timer_setup(struct irqaction *irq)
>> 198 {
>> 199 /* over-write the handler, we use our own way */
>> 200 irq->handler = no_action;
>> 201
>> 202 /* setup irqaction */
>> 203 setup_irq(SGI_TIMER_IRQ, irq);
>> 204 }
>> 205
>> 206 void __init ip22_time_init(void)
>> 207 {
>> 208 /* setup hookup functions */
>> 209 rtc_get_time = indy_rtc_get_time;
>> 210 rtc_set_time = indy_rtc_set_time;
>> 211
>> 212 board_time_init = indy_time_init;
>> 213 board_timer_setup = indy_timer_setup;
131 } 214 }
132 215
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