1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 config SIBYTE_SB1250 2 config SIBYTE_SB1250
3 bool 3 bool
4 select CEVT_SB1250 4 select CEVT_SB1250
5 select CSRC_SB1250 5 select CSRC_SB1250
6 select HAVE_PCI !! 6 select HW_HAS_PCI
7 select IRQ_MIPS_CPU 7 select IRQ_MIPS_CPU
8 select SIBYTE_ENABLE_LDT_IF_PCI 8 select SIBYTE_ENABLE_LDT_IF_PCI
9 select SIBYTE_HAS_ZBUS_PROFILING 9 select SIBYTE_HAS_ZBUS_PROFILING
10 select SIBYTE_SB1xxx_SOC 10 select SIBYTE_SB1xxx_SOC
11 select SYS_SUPPORTS_SMP 11 select SYS_SUPPORTS_SMP
12 12
>> 13 config SIBYTE_BCM1120
>> 14 bool
>> 15 select CEVT_SB1250
>> 16 select CSRC_SB1250
>> 17 select IRQ_MIPS_CPU
>> 18 select SIBYTE_BCM112X
>> 19 select SIBYTE_HAS_ZBUS_PROFILING
>> 20 select SIBYTE_SB1xxx_SOC
>> 21
13 config SIBYTE_BCM1125 22 config SIBYTE_BCM1125
14 bool 23 bool
15 select CEVT_SB1250 24 select CEVT_SB1250
16 select CSRC_SB1250 25 select CSRC_SB1250
17 select HAVE_PCI !! 26 select HW_HAS_PCI
18 select IRQ_MIPS_CPU 27 select IRQ_MIPS_CPU
19 select SIBYTE_BCM112X 28 select SIBYTE_BCM112X
20 select SIBYTE_HAS_ZBUS_PROFILING 29 select SIBYTE_HAS_ZBUS_PROFILING
21 select SIBYTE_SB1xxx_SOC 30 select SIBYTE_SB1xxx_SOC
22 31
>> 32 config SIBYTE_BCM1125H
>> 33 bool
>> 34 select CEVT_SB1250
>> 35 select CSRC_SB1250
>> 36 select HW_HAS_PCI
>> 37 select IRQ_MIPS_CPU
>> 38 select SIBYTE_BCM112X
>> 39 select SIBYTE_ENABLE_LDT_IF_PCI
>> 40 select SIBYTE_HAS_ZBUS_PROFILING
>> 41 select SIBYTE_SB1xxx_SOC
>> 42
23 config SIBYTE_BCM112X 43 config SIBYTE_BCM112X
24 bool 44 bool
25 select CEVT_SB1250 45 select CEVT_SB1250
26 select CSRC_SB1250 46 select CSRC_SB1250
27 select IRQ_MIPS_CPU 47 select IRQ_MIPS_CPU
28 select SIBYTE_SB1xxx_SOC 48 select SIBYTE_SB1xxx_SOC
29 select SIBYTE_HAS_ZBUS_PROFILING 49 select SIBYTE_HAS_ZBUS_PROFILING
30 50
31 config SIBYTE_BCM1x80 51 config SIBYTE_BCM1x80
32 bool 52 bool
33 select CEVT_BCM1480 53 select CEVT_BCM1480
34 select CSRC_BCM1480 54 select CSRC_BCM1480
35 select HAVE_PCI !! 55 select HW_HAS_PCI
36 select IRQ_MIPS_CPU 56 select IRQ_MIPS_CPU
37 select SIBYTE_HAS_ZBUS_PROFILING 57 select SIBYTE_HAS_ZBUS_PROFILING
38 select SIBYTE_SB1xxx_SOC 58 select SIBYTE_SB1xxx_SOC
39 select SYS_SUPPORTS_SMP 59 select SYS_SUPPORTS_SMP
40 60
>> 61 config SIBYTE_BCM1x55
>> 62 bool
>> 63 select CEVT_BCM1480
>> 64 select CSRC_BCM1480
>> 65 select HW_HAS_PCI
>> 66 select IRQ_MIPS_CPU
>> 67 select SIBYTE_SB1xxx_SOC
>> 68 select SIBYTE_HAS_ZBUS_PROFILING
>> 69 select SYS_SUPPORTS_SMP
>> 70
41 config SIBYTE_SB1xxx_SOC 71 config SIBYTE_SB1xxx_SOC
42 bool 72 bool
>> 73 select DMA_COHERENT
43 select IRQ_MIPS_CPU 74 select IRQ_MIPS_CPU
44 select SWAP_IO_SPACE 75 select SWAP_IO_SPACE
45 select SYS_SUPPORTS_32BIT_KERNEL 76 select SYS_SUPPORTS_32BIT_KERNEL
46 select SYS_SUPPORTS_64BIT_KERNEL 77 select SYS_SUPPORTS_64BIT_KERNEL
47 select FW_CFE 78 select FW_CFE
48 select SYS_HAS_EARLY_PRINTK 79 select SYS_HAS_EARLY_PRINTK
49 80
50 choice 81 choice
51 prompt "SiByte SOC Stepping" 82 prompt "SiByte SOC Stepping"
52 depends on SIBYTE_SB1xxx_SOC 83 depends on SIBYTE_SB1xxx_SOC
53 84
54 config CPU_SB1_PASS_2_1250 85 config CPU_SB1_PASS_2_1250
55 bool "1250 An" 86 bool "1250 An"
56 depends on SIBYTE_SB1250 87 depends on SIBYTE_SB1250
57 select CPU_SB1_PASS_2 88 select CPU_SB1_PASS_2
58 help 89 help
59 Also called BCM1250 Pass 2 90 Also called BCM1250 Pass 2
60 91
61 config CPU_SB1_PASS_2_2 92 config CPU_SB1_PASS_2_2
62 bool "1250 Bn" 93 bool "1250 Bn"
63 depends on SIBYTE_SB1250 94 depends on SIBYTE_SB1250
64 select CPU_HAS_PREFETCH 95 select CPU_HAS_PREFETCH
65 help 96 help
66 Also called BCM1250 Pass 2.2 97 Also called BCM1250 Pass 2.2
67 98
68 config CPU_SB1_PASS_4 99 config CPU_SB1_PASS_4
69 bool "1250 Cn" 100 bool "1250 Cn"
70 depends on SIBYTE_SB1250 101 depends on SIBYTE_SB1250
71 select CPU_HAS_PREFETCH 102 select CPU_HAS_PREFETCH
72 help 103 help
73 Also called BCM1250 Pass 3 104 Also called BCM1250 Pass 3
74 105
75 config CPU_SB1_PASS_2_112x 106 config CPU_SB1_PASS_2_112x
76 bool "112x Hybrid" 107 bool "112x Hybrid"
77 depends on SIBYTE_BCM112X 108 depends on SIBYTE_BCM112X
78 select CPU_SB1_PASS_2 109 select CPU_SB1_PASS_2
79 110
80 config CPU_SB1_PASS_3 111 config CPU_SB1_PASS_3
81 bool "112x An" 112 bool "112x An"
82 depends on SIBYTE_BCM112X 113 depends on SIBYTE_BCM112X
83 select CPU_HAS_PREFETCH 114 select CPU_HAS_PREFETCH
84 115
85 endchoice 116 endchoice
86 117
87 config CPU_SB1_PASS_2 118 config CPU_SB1_PASS_2
88 bool 119 bool
89 120
90 config SIBYTE_HAS_LDT 121 config SIBYTE_HAS_LDT
91 bool 122 bool
92 123
93 config SIBYTE_ENABLE_LDT_IF_PCI 124 config SIBYTE_ENABLE_LDT_IF_PCI
94 bool 125 bool
95 select SIBYTE_HAS_LDT if PCI 126 select SIBYTE_HAS_LDT if PCI
96 127
97 config SB1_CEX_ALWAYS_FATAL 128 config SB1_CEX_ALWAYS_FATAL
98 bool "All cache exceptions considered 129 bool "All cache exceptions considered fatal (no recovery attempted)"
99 depends on SIBYTE_SB1xxx_SOC 130 depends on SIBYTE_SB1xxx_SOC
100 131
101 config SB1_CERR_STALL 132 config SB1_CERR_STALL
102 bool "Stall (rather than panic) on fat 133 bool "Stall (rather than panic) on fatal cache error"
103 depends on SIBYTE_SB1xxx_SOC 134 depends on SIBYTE_SB1xxx_SOC
104 135
105 config SIBYTE_CFE_CONSOLE 136 config SIBYTE_CFE_CONSOLE
106 bool "Use firmware console" 137 bool "Use firmware console"
107 depends on SIBYTE_SB1xxx_SOC 138 depends on SIBYTE_SB1xxx_SOC
108 help 139 help
109 Use the CFE API's console write rout 140 Use the CFE API's console write routines during boot. Other console
110 options (VT console, sb1250 duart co 141 options (VT console, sb1250 duart console, etc.) should not be
111 configured. 142 configured.
112 143
113 config SIBYTE_BUS_WATCHER 144 config SIBYTE_BUS_WATCHER
114 bool "Support for Bus Watcher statisti 145 bool "Support for Bus Watcher statistics"
115 depends on SIBYTE_SB1xxx_SOC && \ 146 depends on SIBYTE_SB1xxx_SOC && \
116 (SIBYTE_BCM112X || SIBYTE_SB12 !! 147 (SIBYTE_BCM112X || SIBYTE_SB1250 || \
>> 148 SIBYTE_BCM1x55 || SIBYTE_BCM1x80)
117 help 149 help
118 Handle and keep statistics on the bu 150 Handle and keep statistics on the bus error interrupts (COR_ECC,
119 BAD_ECC, IO_BUS). 151 BAD_ECC, IO_BUS).
120 152
121 config SIBYTE_BW_TRACE 153 config SIBYTE_BW_TRACE
122 bool "Capture bus trace before bus err 154 bool "Capture bus trace before bus error"
123 depends on SIBYTE_BUS_WATCHER 155 depends on SIBYTE_BUS_WATCHER
124 help 156 help
125 Run a continuous bus trace, dumping 157 Run a continuous bus trace, dumping the raw data as soon as
126 a ZBbus error is detected. Cannot w 158 a ZBbus error is detected. Cannot work if ZBbus profiling
127 is turned on, and also will interfer 159 is turned on, and also will interfere with JTAG-based trace
128 buffer activity. Raw buffer data is 160 buffer activity. Raw buffer data is dumped to console, and
129 must be processed off-line. 161 must be processed off-line.
130 162
131 config SIBYTE_TBPROF 163 config SIBYTE_TBPROF
132 tristate "Support for ZBbus profiling" 164 tristate "Support for ZBbus profiling"
133 depends on SIBYTE_HAS_ZBUS_PROFILING 165 depends on SIBYTE_HAS_ZBUS_PROFILING
134 166
135 config SIBYTE_HAS_ZBUS_PROFILING 167 config SIBYTE_HAS_ZBUS_PROFILING
136 bool 168 bool
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