1 // SPDX-License-Identifier: GPL-2.0-or-later 1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* 2 /*
3 * Copyright (C) 2000, 2001, 2002, 2003, 2004 3 * Copyright (C) 2000, 2001, 2002, 2003, 2004 Broadcom Corporation
4 * Copyright (C) 2004 by Ralf Baechle (ralf@li 4 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
5 */ 5 */
6 6
7 /* 7 /*
8 * Setup code for the SWARM board 8 * Setup code for the SWARM board
9 */ 9 */
10 10
11 #include <linux/spinlock.h> 11 #include <linux/spinlock.h>
12 #include <linux/mm.h> 12 #include <linux/mm.h>
13 #include <linux/memblock.h> 13 #include <linux/memblock.h>
14 #include <linux/init.h> 14 #include <linux/init.h>
15 #include <linux/kernel.h> 15 #include <linux/kernel.h>
16 #include <linux/console.h> 16 #include <linux/console.h>
17 #include <linux/screen_info.h> 17 #include <linux/screen_info.h>
18 #include <linux/initrd.h> 18 #include <linux/initrd.h>
19 19
20 #include <asm/irq.h> 20 #include <asm/irq.h>
21 #include <asm/io.h> 21 #include <asm/io.h>
22 #include <asm/bootinfo.h> 22 #include <asm/bootinfo.h>
23 #include <asm/mipsregs.h> 23 #include <asm/mipsregs.h>
24 #include <asm/reboot.h> 24 #include <asm/reboot.h>
25 #include <asm/time.h> 25 #include <asm/time.h>
26 #include <asm/traps.h> 26 #include <asm/traps.h>
27 #include <asm/sibyte/sb1250.h> 27 #include <asm/sibyte/sb1250.h>
28 #ifdef CONFIG_SIBYTE_BCM1x80 28 #ifdef CONFIG_SIBYTE_BCM1x80
29 #include <asm/sibyte/bcm1480_regs.h> 29 #include <asm/sibyte/bcm1480_regs.h>
30 #elif defined(CONFIG_SIBYTE_SB1250) || defined 30 #elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
31 #include <asm/sibyte/sb1250_regs.h> 31 #include <asm/sibyte/sb1250_regs.h>
32 #else 32 #else
33 #error invalid SiByte board configuration 33 #error invalid SiByte board configuration
34 #endif 34 #endif
35 #include <asm/sibyte/sb1250_genbus.h> 35 #include <asm/sibyte/sb1250_genbus.h>
36 #include <asm/sibyte/board.h> 36 #include <asm/sibyte/board.h>
37 37
38 #ifdef CONFIG_SIBYTE_BCM1x80 38 #ifdef CONFIG_SIBYTE_BCM1x80
39 extern void bcm1480_setup(void); 39 extern void bcm1480_setup(void);
40 #elif defined(CONFIG_SIBYTE_SB1250) || defined 40 #elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
41 extern void sb1250_setup(void); 41 extern void sb1250_setup(void);
42 #else 42 #else
43 #error invalid SiByte board configuration 43 #error invalid SiByte board configuration
44 #endif 44 #endif
45 45
46 extern int xicor_probe(void); 46 extern int xicor_probe(void);
47 extern int xicor_set_time(time64_t); 47 extern int xicor_set_time(time64_t);
48 extern time64_t xicor_get_time(void); 48 extern time64_t xicor_get_time(void);
49 49
50 extern int m41t81_probe(void); 50 extern int m41t81_probe(void);
51 extern int m41t81_set_time(time64_t); 51 extern int m41t81_set_time(time64_t);
52 extern time64_t m41t81_get_time(void); 52 extern time64_t m41t81_get_time(void);
53 53
54 const char *get_system_type(void) 54 const char *get_system_type(void)
55 { 55 {
56 return "SiByte " SIBYTE_BOARD_NAME; 56 return "SiByte " SIBYTE_BOARD_NAME;
57 } 57 }
58 58
59 int swarm_be_handler(struct pt_regs *regs, int 59 int swarm_be_handler(struct pt_regs *regs, int is_fixup)
60 { 60 {
61 if (!is_fixup && (regs->cp0_cause & 4) 61 if (!is_fixup && (regs->cp0_cause & 4)) {
62 /* Data bus error - print PA * 62 /* Data bus error - print PA */
63 printk("DBE physical address: 63 printk("DBE physical address: %010Lx\n",
64 __read_64bit_c0_registe 64 __read_64bit_c0_register($26, 1));
65 } 65 }
66 return is_fixup ? MIPS_BE_FIXUP : MIPS 66 return is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL;
67 } 67 }
68 68
69 enum swarm_rtc_type { 69 enum swarm_rtc_type {
70 RTC_NONE, 70 RTC_NONE,
71 RTC_XICOR, 71 RTC_XICOR,
72 RTC_M41T81, 72 RTC_M41T81,
73 }; 73 };
74 74
75 enum swarm_rtc_type swarm_rtc_type; 75 enum swarm_rtc_type swarm_rtc_type;
76 76
77 void read_persistent_clock64(struct timespec64 77 void read_persistent_clock64(struct timespec64 *ts)
78 { 78 {
79 time64_t sec; 79 time64_t sec;
80 80
81 switch (swarm_rtc_type) { 81 switch (swarm_rtc_type) {
82 case RTC_XICOR: 82 case RTC_XICOR:
83 sec = xicor_get_time(); 83 sec = xicor_get_time();
84 break; 84 break;
85 85
86 case RTC_M41T81: 86 case RTC_M41T81:
87 sec = m41t81_get_time(); 87 sec = m41t81_get_time();
88 break; 88 break;
89 89
90 case RTC_NONE: 90 case RTC_NONE:
91 default: 91 default:
92 sec = mktime64(2000, 1, 1, 0, 92 sec = mktime64(2000, 1, 1, 0, 0, 0);
93 break; 93 break;
94 } 94 }
95 ts->tv_sec = sec; 95 ts->tv_sec = sec;
96 ts->tv_nsec = 0; 96 ts->tv_nsec = 0;
97 } 97 }
98 98
99 int update_persistent_clock64(struct timespec6 99 int update_persistent_clock64(struct timespec64 now)
100 { 100 {
101 time64_t sec = now.tv_sec; 101 time64_t sec = now.tv_sec;
102 102
103 switch (swarm_rtc_type) { 103 switch (swarm_rtc_type) {
104 case RTC_XICOR: 104 case RTC_XICOR:
105 return xicor_set_time(sec); 105 return xicor_set_time(sec);
106 106
107 case RTC_M41T81: 107 case RTC_M41T81:
108 return m41t81_set_time(sec); 108 return m41t81_set_time(sec);
109 109
110 case RTC_NONE: 110 case RTC_NONE:
111 default: 111 default:
112 return -1; 112 return -1;
113 } 113 }
114 } 114 }
115 115
116 #ifdef CONFIG_VGA_CONSOLE 116 #ifdef CONFIG_VGA_CONSOLE
117 static struct screen_info vgacon_screen_info = 117 static struct screen_info vgacon_screen_info = {
118 .orig_video_page = 52, 118 .orig_video_page = 52,
119 .orig_video_mode = 3, 119 .orig_video_mode = 3,
120 .orig_video_cols = 80, 120 .orig_video_cols = 80,
121 .flags = 12, 121 .flags = 12,
122 .orig_video_ega_bx = 3, 122 .orig_video_ega_bx = 3,
123 .orig_video_lines = 25, 123 .orig_video_lines = 25,
124 .orig_video_isVGA = 0x22, 124 .orig_video_isVGA = 0x22,
125 .orig_video_points = 16, 125 .orig_video_points = 16,
126 }; 126 };
127 #endif 127 #endif
128 128
129 void __init plat_mem_setup(void) 129 void __init plat_mem_setup(void)
130 { 130 {
131 #ifdef CONFIG_SIBYTE_BCM1x80 131 #ifdef CONFIG_SIBYTE_BCM1x80
132 bcm1480_setup(); 132 bcm1480_setup();
133 #elif defined(CONFIG_SIBYTE_SB1250) || defined 133 #elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
134 sb1250_setup(); 134 sb1250_setup();
135 #else 135 #else
136 #error invalid SiByte board configuration 136 #error invalid SiByte board configuration
137 #endif 137 #endif
138 138
139 mips_set_be_handler(swarm_be_handler); 139 mips_set_be_handler(swarm_be_handler);
140 140
141 if (xicor_probe()) 141 if (xicor_probe())
142 swarm_rtc_type = RTC_XICOR; 142 swarm_rtc_type = RTC_XICOR;
143 if (m41t81_probe()) 143 if (m41t81_probe())
144 swarm_rtc_type = RTC_M41T81; 144 swarm_rtc_type = RTC_M41T81;
145 145
146 #ifdef CONFIG_VGA_CONSOLE 146 #ifdef CONFIG_VGA_CONSOLE
147 vgacon_register_screen(&vgacon_screen_ 147 vgacon_register_screen(&vgacon_screen_info);
148 /* XXXKW for CFE, get lines/cols from e 148 /* XXXKW for CFE, get lines/cols from environment */
149 #endif 149 #endif
150 } 150 }
151 151
152 #ifdef LEDS_PHYS 152 #ifdef LEDS_PHYS
153 153
154 void setleds(char *str) 154 void setleds(char *str)
155 { 155 {
156 void *reg; 156 void *reg;
157 int i; 157 int i;
158 158
159 for (i = 0; i < 4; i++) { 159 for (i = 0; i < 4; i++) {
160 reg = IOADDR(LEDS_PHYS) + 0x20 160 reg = IOADDR(LEDS_PHYS) + 0x20 + ((3 - i) << 3);
161 161
162 if (!str[i]) 162 if (!str[i])
163 writeb(' ', reg); 163 writeb(' ', reg);
164 else 164 else
165 writeb(str[i], reg); 165 writeb(str[i], reg);
166 } 166 }
167 } 167 }
168 168
169 #endif /* LEDS_PHYS */ 169 #endif /* LEDS_PHYS */
170 170
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