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Linux/arch/nios2/boot/compressed/head.S

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Diff markup

Differences between /arch/nios2/boot/compressed/head.S (Architecture m68k) and /arch/mips/boot/compressed/head.S (Architecture mips)


  1 /*                                                  1 /*
  2  * Copyright (C) 2009 Thomas Chou <thomas@wytro << 
  3  *                                             << 
  4  * Based on arch/nios2/kernel/head.S           << 
  5  *                                             << 
  6  * This file is subject to the terms and condi      2  * This file is subject to the terms and conditions of the GNU General Public
  7  * License. See the file "COPYING" in the main !!   3  * License.  See the file "COPYING" in the main directory of this archive
  8  * for more details.                                4  * for more details.
  9  *                                                  5  *
                                                   >>   6  * Copyright (C) 1994, 1995 Waldorf Electronics
                                                   >>   7  * Written by Ralf Baechle and Andreas Busse
                                                   >>   8  * Copyright (C) 1995 - 1999 Ralf Baechle
                                                   >>   9  * Copyright (C) 1996 Paul M. Antoine
                                                   >>  10  * Modified for DECStation and hence R3000 support by Paul M. Antoine
                                                   >>  11  * Further modifications by David S. Miller and Harald Koerfgen
                                                   >>  12  * Copyright (C) 1999 Silicon Graphics, Inc.
 10  */                                                13  */
 11                                                    14 
 12 /*                                             !!  15 #include <asm/asm.h>
 13  *  This code can be loaded anywhere, eg FLASH !!  16 #include <asm/regdef.h>
 14  *  as long as output does not overlap it.     !!  17 
 15  */                                            !!  18         LEAF(start)
                                                   >>  19         /* Save boot rom start args */
                                                   >>  20         move    s0, a0
                                                   >>  21         move    s1, a1
                                                   >>  22         move    s2, a2
                                                   >>  23         move    s3, a3
                                                   >>  24 
                                                   >>  25         /* Clear BSS */
                                                   >>  26         PTR_LA  a0, _edata
                                                   >>  27         PTR_LA  a2, _end
                                                   >>  28 1:      PTR_S   zero, 0(a0)
                                                   >>  29         PTR_ADDIU a0, a0, PTRSIZE
                                                   >>  30         bne     a2, a0, 1b
                                                   >>  31 
                                                   >>  32         PTR_LA  a0, (.heap)          /* heap address */
                                                   >>  33         PTR_LA  sp, (.stack + 8192)  /* stack address */
                                                   >>  34 
                                                   >>  35         PTR_LA  t9, decompress_kernel
                                                   >>  36         jalr    t9
                                                   >>  37 
                                                   >>  38 2:
                                                   >>  39         move    a0, s0
                                                   >>  40         move    a1, s1
                                                   >>  41         move    a2, s2
                                                   >>  42         move    a3, s3
                                                   >>  43         PTR_LI  t9, KERNEL_ENTRY
                                                   >>  44         jalr    t9
                                                   >>  45 
                                                   >>  46 3:
                                                   >>  47         b       3b
 16                                                    48 
 17 #include <linux/linkage.h>                     !!  49         END(start)
 18 #include <asm/cache.h>                         << 
 19                                                    50 
 20         .text                                  !!  51         .comm .heap,BOOT_HEAP_SIZE,4
 21         .set noat                              !!  52         .comm .stack,4096*2,4
 22 ENTRY(_start)                                  << 
 23         wrctl   status, r0              /* dis << 
 24         /* invalidate all instruction cache */ << 
 25         movia   r1, NIOS2_ICACHE_SIZE          << 
 26         movui   r2, NIOS2_ICACHE_LINE_SIZE     << 
 27 1:      initi   r1                             << 
 28         sub     r1, r1, r2                     << 
 29         bgt     r1, r0, 1b                     << 
 30         /* invalidate all data cache */        << 
 31         movia   r1, NIOS2_DCACHE_SIZE          << 
 32         movui   r2, NIOS2_DCACHE_LINE_SIZE     << 
 33 1:      initd   0(r1)                          << 
 34         sub     r1, r1, r2                     << 
 35         bgt     r1, r0, 1b                     << 
 36                                                << 
 37         nextpc  r1                      /* Fin << 
 38 chkadr:                                        << 
 39         movia   r2, chkadr                     << 
 40         beq     r1, r2, finish_move     /* We  << 
 41                                            don << 
 42         /* move code, r1: src, r2: dest, r3: l << 
 43         addi    r1, r1, (_start - chkadr)      << 
 44         movia   r2, _start              /* Des << 
 45         movia   r3, __bss_start         /* End << 
 46 1:      ldw     r8, 0(r1)               /* loa << 
 47         stw     r8, 0(r2)               /* sto << 
 48         addi    r1, r1, 4               /* inc << 
 49         addi    r2, r2, 4               /* inc << 
 50         blt     r2, r3, 1b                     << 
 51         /* flush the data cache after moving * << 
 52         movia   r1, NIOS2_DCACHE_SIZE          << 
 53         movui   r2, NIOS2_DCACHE_LINE_SIZE     << 
 54 1:      flushd  0(r1)                          << 
 55         sub     r1, r1, r2                     << 
 56         bgt     r1, r0, 1b                     << 
 57         movia   r1, finish_move                << 
 58         jmp     r1                      /* jmp << 
 59                                                << 
 60 finish_move:                                   << 
 61         /* zero out the .bss segment (uninitia << 
 62         movia   r2, __bss_start         /* pre << 
 63         movia   r1, _end                /* the << 
 64 1:      stb     r0, 0(r2)                      << 
 65         addi    r2, r2, 1                      << 
 66         bne     r1, r2, 1b                     << 
 67         /*                                     << 
 68          * set up the stack pointer, some wher << 
 69          * The stack space must be greater tha << 
 70          */                                    << 
 71         movia   sp, 0x10000                    << 
 72         add     sp, sp, r1                     << 
 73         /* save args passed from u-boot, maybe << 
 74         addi    sp, sp, -16                    << 
 75         stw     r4, 0(sp)                      << 
 76         stw     r5, 4(sp)                      << 
 77         stw     r6, 8(sp)                      << 
 78         stw     r7, 12(sp)                     << 
 79         /* decompress the kernel */            << 
 80         call    decompress_kernel              << 
 81         /* pass saved args to kernel */        << 
 82         ldw     r4, 0(sp)                      << 
 83         ldw     r5, 4(sp)                      << 
 84         ldw     r6, 8(sp)                      << 
 85         ldw     r7, 12(sp)                     << 
 86                                                << 
 87         /* flush all data cache after decompre << 
 88         movia   r1, NIOS2_DCACHE_SIZE          << 
 89         movui   r2, NIOS2_DCACHE_LINE_SIZE     << 
 90 1:      flushd  0(r1)                          << 
 91         sub     r1, r1, r2                     << 
 92         bgt     r1, r0, 1b                     << 
 93         /* flush all instruction cache */      << 
 94         movia   r1, NIOS2_ICACHE_SIZE          << 
 95         movui   r2, NIOS2_ICACHE_LINE_SIZE     << 
 96 1:      flushi  r1                             << 
 97         sub     r1, r1, r2                     << 
 98         bgt     r1, r0, 1b                     << 
 99         flushp                                 << 
100         /* jump to start real kernel */        << 
101         movia   r1, (CONFIG_NIOS2_MEM_BASE | C << 
102         jmp     r1                             << 
103                                                << 
104         .balign 512                            << 
105 fake_headers_as_bzImage:                       << 
106         .short  0                              << 
107         .ascii  "HdrS"                         << 
108         .short  0x0202                         << 
109         .short  0                              << 
110         .short  0                              << 
111         .byte   0x00, 0x10                     << 
112         .short  0                              << 
113         .byte   0                              << 
114         .byte   1                              << 
115         .byte   0x00, 0x80                     << 
116         .long   0                              << 
117         .long   0                              << 
                                                      

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