Linux/arch/nios2/kernel/head.S

Version: ~ [ linux-6.12-rc7 ] ~ [ linux-6.11.7 ] ~ [ linux-6.10.14 ] ~ [ linux-6.9.12 ] ~ [ linux-6.8.12 ] ~ [ linux-6.7.12 ] ~ [ linux-6.6.60 ] ~ [ linux-6.5.13 ] ~ [ linux-6.4.16 ] ~ [ linux-6.3.13 ] ~ [ linux-6.2.16 ] ~ [ linux-6.1.116 ] ~ [ linux-6.0.19 ] ~ [ linux-5.19.17 ] ~ [ linux-5.18.19 ] ~ [ linux-5.17.15 ] ~ [ linux-5.16.20 ] ~ [ linux-5.15.171 ] ~ [ linux-5.14.21 ] ~ [ linux-5.13.19 ] ~ [ linux-5.12.19 ] ~ [ linux-5.11.22 ] ~ [ linux-5.10.229 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.285 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.323 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.336 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.337 ] ~ [ linux-4.4.302 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.12 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

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>> 1 /* SPDX-License-Identifier: GPL-2.0 */ 1 /* 2 /* 2 * Copyright (C) 2009 Wind River Systems Inc !! 3 * arch/alpha/kernel/head.S 3 * Implemented by fredrik.markstrom@gmail.co << 4 * Copyright (C) 2004 Microtronix Datacom Ltd << 5 * Copyright (C) 2001 Vic Phillips, Microtroni << 6 * 4 * 7 * Based on head.S for Altera's Excalibur deve !! 5 * initial boot stuff.. At this point, the bootloader has already 8 * !! 6 * switched into OSF/1 PAL-code, and loaded us at the correct address 9 * Based on the following from the Excalibur s !! 7 * (START_ADDR). So there isn't much left for us to do: just set up 10 * NA_MemoryMap.s, NR_JumpToStart.s, NR_S !! 8 * the kernel global pointer and jump to the kernel entry-point. 11 * << 12 * This file is subject to the terms and condi << 13 * License. See the file "COPYING" in the main << 14 * for more details. << 15 */ 9 */ 16 10 17 #include <linux/init.h> 11 #include <linux/init.h> 18 #include <linux/linkage.h> << 19 #include <asm/thread_info.h> << 20 #include <asm/processor.h> << 21 #include <asm/cache.h> << 22 #include <asm/page.h> << 23 #include <asm/asm-offsets.h> 12 #include <asm/asm-offsets.h> 24 #include <asm/asm-macros.h> !! 13 #include <asm/pal.h> 25 !! 14 #include <asm/setup.h> 26 /* << 27 * ZERO_PAGE is a special page that is used fo << 28 * data and COW. << 29 */ << 30 .data << 31 .global empty_zero_page << 32 .align 12 << 33 empty_zero_page: << 34 .space PAGE_SIZE << 35 << 36 /* << 37 * This global variable is used as an extensio << 38 * STATUS register to emulate a user/superviso << 39 */ << 40 .data << 41 .align 2 << 42 .set noat << 43 << 44 .global _current_thread << 45 _current_thread: << 46 .long 0 << 47 /* << 48 * Input(s): passed from u-boot << 49 * r4 - Optional pointer to a board informat << 50 * r5 - Optional pointer to the physical sta << 51 * disk. << 52 * r6 - Optional pointer to the physical end << 53 * disk. << 54 * r7 - Optional pointer to the physical sta << 55 * command-line parameters. << 56 */ << 57 << 58 /* << 59 * First executable code - detected and jumped << 60 * if the code resides in flash (looks for "Ni << 61 * the potential executable image). << 62 */ << 63 __HEAD << 64 ENTRY(_start) << 65 wrctl status, r0 /* Dis << 66 << 67 /* Initialize all cache lines within t << 68 movia r1, NIOS2_ICACHE_SIZE << 69 movui r2, NIOS2_ICACHE_LINE_SIZE << 70 << 71 icache_init: << 72 initi r1 << 73 sub r1, r1, r2 << 74 bgt r1, r0, icache_init << 75 br 1f << 76 << 77 /* << 78 * This is the default location for th << 79 * to our handler << 80 */ << 81 ENTRY(exception_handler_hook) << 82 movia r24, inthandler << 83 jmp r24 << 84 << 85 ENTRY(fast_handler) << 86 nextpc et << 87 helper: << 88 stw r3, r3save - helper(et) << 89 << 90 rdctl r3 , pteaddr << 91 srli r3, r3, 12 << 92 slli r3, r3, 2 << 93 movia et, pgd_current << 94 << 95 ldw et, 0(et) << 96 add r3, et, r3 << 97 ldw et, 0(r3) << 98 << 99 rdctl r3, pteaddr << 100 andi r3, r3, 0xfff << 101 add et, r3, et << 102 ldw et, 0(et) << 103 wrctl tlbacc, et << 104 nextpc et << 105 helper2: << 106 ldw r3, r3save - helper2(et) << 107 subi ea, ea, 4 << 108 eret << 109 r3save: << 110 .word 0x0 << 111 ENTRY(fast_handler_end) << 112 << 113 1: << 114 /* << 115 * After the instruction cache is init << 116 * also be initialized. << 117 */ << 118 movia r1, NIOS2_DCACHE_SIZE << 119 movui r2, NIOS2_DCACHE_LINE_SIZE << 120 << 121 dcache_init: << 122 initd 0(r1) << 123 sub r1, r1, r2 << 124 bgt r1, r0, dcache_init << 125 << 126 nextpc r1 /* Fin << 127 chkadr: << 128 movia r2, chkadr << 129 beq r1, r2,finish_move /* We << 130 addi r1, r1,(_start - chkadr) << 131 movia r2, _start /* Des << 132 movia r3, __bss_start /* End << 133 << 134 loop_move: /* r1: << 135 ldw r8, 0(r1) /* loa << 136 stw r8, 0(r2) /* sto << 137 flushd 0(r2) /* Flu << 138 addi r1, r1, 4 /* inc << 139 addi r2, r2, 4 /* inc << 140 blt r2, r3, loop_move << 141 << 142 movia r1, finish_move /* VMA << 143 jmp r1 /* jmp << 144 << 145 finish_move: << 146 << 147 /* Mask off all possible interrupts */ << 148 wrctl ienable, r0 << 149 << 150 /* Clear .bss */ << 151 movia r2, __bss_start << 152 movia r1, __bss_stop << 153 1: << 154 stb r0, 0(r2) << 155 addi r2, r2, 1 << 156 bne r1, r2, 1b << 157 << 158 movia r1, init_thread_union /* set << 159 addi sp, r1, THREAD_SIZE << 160 movia r2, _current_thread /* Rem << 161 stw r1, 0(r2) << 162 << 163 movia r1, nios2_boot_init /* sav << 164 callr r1 << 165 << 166 movia r1, start_kernel /* cal << 167 callr r1 << 168 << 169 /* If we return from start_kernel, bre << 170 * buggered we are. << 171 */ << 172 break << 173 15 174 /* End of startup code */ !! 16 __HEAD 175 .set at !! 17 .globl _stext >> 18 .set noreorder >> 19 .globl __start >> 20 .ent __start >> 21 _stext: >> 22 __start: >> 23 .prologue 0 >> 24 br $27,1f >> 25 1: ldgp $29,0($27) >> 26 /* We need to get current_task_info loaded up... */ >> 27 lda $8,init_thread_union >> 28 /* ... and find our stack ... */ >> 29 lda $30,0x4000 - SIZEOF_PT_REGS($8) >> 30 /* ... and then we can start the kernel. */ >> 31 jsr $26,start_kernel >> 32 call_pal PAL_halt >> 33 .end __start >> 34 >> 35 #ifdef CONFIG_SMP >> 36 .align 3 >> 37 .globl __smp_callin >> 38 .ent __smp_callin >> 39 /* On entry here from SRM console, the HWPCB of the per-cpu >> 40 slot for this processor has been loaded. We've arranged >> 41 for the UNIQUE value for this process to contain the PCBB >> 42 of the target idle task. */ >> 43 __smp_callin: >> 44 .prologue 1 >> 45 ldgp $29,0($27) # First order of business, load the GP. >> 46 >> 47 call_pal PAL_rduniq # Grab the target PCBB. >> 48 mov $0,$16 # Install it. >> 49 call_pal PAL_swpctx >> 50 >> 51 lda $8,0x3fff # Find "current". >> 52 bic $30,$8,$8 >> 53 >> 54 jsr $26,smp_callin >> 55 call_pal PAL_halt >> 56 .end __smp_callin >> 57 #endif /* CONFIG_SMP */ >> 58 >> 59 # >> 60 # The following two functions are needed for supporting SRM PALcode >> 61 # on the PC164 (at least), since that PALcode manages the interrupt >> 62 # masking, and we cannot duplicate the effort without causing problems >> 63 # >> 64 >> 65 .align 3 >> 66 .globl cserve_ena >> 67 .ent cserve_ena >> 68 cserve_ena: >> 69 .prologue 0 >> 70 bis $16,$16,$17 >> 71 lda $16,52($31) >> 72 call_pal PAL_cserve >> 73 ret ($26) >> 74 .end cserve_ena >> 75 >> 76 .align 3 >> 77 .globl cserve_dis >> 78 .ent cserve_dis >> 79 cserve_dis: >> 80 .prologue 0 >> 81 bis $16,$16,$17 >> 82 lda $16,53($31) >> 83 call_pal PAL_cserve >> 84 ret ($26) >> 85 .end cserve_dis >> 86 >> 87 # >> 88 # It is handy, on occasion, to make halt actually just loop. >> 89 # Putting it here means we dont have to recompile the whole >> 90 # kernel. >> 91 # >> 92 >> 93 .align 3 >> 94 .globl halt >> 95 .ent halt >> 96 halt: >> 97 .prologue 0 >> 98 call_pal PAL_halt >> 99 .end halt

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TOMOYO Linux Cross Reference
Linux/arch/nios2/kernel/head.S

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Differences between /arch/nios2/kernel/head.S (Version linux-6.12-rc7) and /arch/alpha/kernel/head.S (Version linux-4.14.336)

TOMOYO Linux Cross Reference Linux/arch/nios2/kernel/head.S

Diff markup

Differences between /arch/nios2/kernel/head.S (Version linux-6.12-rc7) and /arch/alpha/kernel/head.S (Version linux-4.14.336)

TOMOYO Linux Cross Reference
Linux/arch/nios2/kernel/head.S