1 // SPDX-License-Identifier: GPL-2.0-or-later <<
2 /* 1 /*
3 * Copyright (C) 2013 Altera Corporation !! 2 * irq.c
4 * Copyright (C) 2011 Tobias Klauser <tklauser <<
5 * Copyright (C) 2008 Thomas Chou <thomas@wytr <<
6 * 3 *
7 * based on irq.c from m68k which is: !! 4 * (C) Copyright 2007, Greg Ungerer <gerg@snapgear.com>
8 * 5 *
9 * Copyright (C) 2007 Greg Ungerer <gerg@snapg !! 6 * This file is subject to the terms and conditions of the GNU General Public
>> 7 * License. See the file COPYING in the main directory of this archive
>> 8 * for more details.
10 */ 9 */
11 10
>> 11 #include <linux/types.h>
12 #include <linux/init.h> 12 #include <linux/init.h>
>> 13 #include <linux/kernel.h>
>> 14 #include <linux/kernel_stat.h>
13 #include <linux/interrupt.h> 15 #include <linux/interrupt.h>
14 #include <linux/irqdomain.h> !! 16 #include <linux/irq.h>
15 #include <linux/of.h> !! 17 #include <linux/seq_file.h>
>> 18 #include <asm/traps.h>
16 19
17 static u32 ienable; !! 20 asmlinkage void do_IRQ(int irq, struct pt_regs *regs)
18 <<
19 asmlinkage void do_IRQ(int hwirq, struct pt_re <<
20 { 21 {
21 struct pt_regs *oldregs = set_irq_regs 22 struct pt_regs *oldregs = set_irq_regs(regs);
22 23
23 irq_enter(); 24 irq_enter();
24 generic_handle_domain_irq(NULL, hwirq) !! 25 generic_handle_irq(irq);
25 irq_exit(); 26 irq_exit();
26 27
27 set_irq_regs(oldregs); 28 set_irq_regs(oldregs);
28 } 29 }
29 30
30 static void chip_unmask(struct irq_data *d) <<
31 { <<
32 ienable |= (1 << d->hwirq); <<
33 WRCTL(CTL_IENABLE, ienable); <<
34 } <<
35 <<
36 static void chip_mask(struct irq_data *d) <<
37 { <<
38 ienable &= ~(1 << d->hwirq); <<
39 WRCTL(CTL_IENABLE, ienable); <<
40 } <<
41 31
42 static struct irq_chip m_irq_chip = { !! 32 /* The number of spurious interrupts */
43 .name = "NIOS2-INTC", !! 33 atomic_t irq_err_count;
44 .irq_unmask = chip_unmask, <<
45 .irq_mask = chip_mask, <<
46 }; <<
47 34
48 static int irq_map(struct irq_domain *h, unsig !! 35 int arch_show_interrupts(struct seq_file *p, int prec)
49 irq_hw_number_ <<
50 { 36 {
51 irq_set_chip_and_handler(virq, &m_irq_ !! 37 seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count));
52 <<
53 return 0; 38 return 0;
54 } <<
55 <<
56 static const struct irq_domain_ops irq_ops = { <<
57 .map = irq_map, <<
58 .xlate = irq_domain_xlate_onecell, <<
59 }; <<
60 <<
61 void __init init_IRQ(void) <<
62 { <<
63 struct irq_domain *domain; <<
64 struct device_node *node; <<
65 <<
66 node = of_find_compatible_node(NULL, N <<
67 if (!node) <<
68 node = of_find_compatible_node <<
69 <<
70 BUG_ON(!node); <<
71 <<
72 domain = irq_domain_add_linear(node, N <<
73 BUG_ON(!domain); <<
74 <<
75 irq_set_default_host(domain); <<
76 of_node_put(node); <<
77 /* Load the initial ienable value */ <<
78 ienable = RDCTL(CTL_IENABLE); <<
79 } 39 }
80 40
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