1 /* SPDX-License-Identifier: GPL-2.0-or-later * !! 1 /* ld script for sparc32/sparc64 kernel */
2 /* <<
3 * Copyright (C) 2009 Thomas Chou <thomas@wytro <<
4 */ <<
5 #include <asm/page.h> <<
6 #include <asm-generic/vmlinux.lds.h> <<
7 #include <asm/cache.h> <<
8 #include <asm/thread_info.h> <<
9 2
10 OUTPUT_FORMAT("elf32-littlenios2", "elf32-litt !! 3 #include <asm-generic/vmlinux.lds.h>
11 4
12 OUTPUT_ARCH(nios) !! 5 #include <asm/page.h>
13 ENTRY(_start) /* Defined in head.S */ !! 6 #include <asm/thread_info.h>
14 7
>> 8 #ifdef CONFIG_SPARC32
>> 9 #define INITIAL_ADDRESS 0x10000 + SIZEOF_HEADERS
>> 10 #define TEXTSTART 0xf0004000
>> 11
>> 12 #define SMP_CACHE_BYTES_SHIFT 5
>> 13
>> 14 #else
>> 15 #define SMP_CACHE_BYTES_SHIFT 6
>> 16 #define INITIAL_ADDRESS 0x4000
>> 17 #define TEXTSTART 0x0000000000404000
>> 18
>> 19 #endif
>> 20
>> 21 #define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT)
>> 22
>> 23 #ifdef CONFIG_SPARC32
>> 24 OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc")
>> 25 OUTPUT_ARCH(sparc)
>> 26 ENTRY(_start)
>> 27 jiffies = jiffies_64 + 4;
>> 28 #else
>> 29 /* sparc64 */
>> 30 OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "elf64-sparc")
>> 31 OUTPUT_ARCH(sparc:v9a)
>> 32 ENTRY(_start)
15 jiffies = jiffies_64; 33 jiffies = jiffies_64;
>> 34 #endif
16 35
17 SECTIONS 36 SECTIONS
18 { 37 {
19 . = CONFIG_NIOS2_MEM_BASE | CONFIG_NIO !! 38 /* swapper_low_pmd_dir is sparc64 only */
20 !! 39 swapper_low_pmd_dir = 0x0000000000402000;
21 _text = .; !! 40 . = INITIAL_ADDRESS;
22 _stext = .; !! 41 .text TEXTSTART :
23 HEAD_TEXT_SECTION !! 42 {
24 .text : { !! 43 _text = .;
>> 44 HEAD_TEXT
25 TEXT_TEXT 45 TEXT_TEXT
26 SCHED_TEXT 46 SCHED_TEXT
27 LOCK_TEXT 47 LOCK_TEXT
28 IRQENTRY_TEXT <<
29 SOFTIRQENTRY_TEXT <<
30 KPROBES_TEXT 48 KPROBES_TEXT
31 } =0 !! 49 *(.gnu.warning)
>> 50 } = 0
32 _etext = .; 51 _etext = .;
33 52
34 .got : { !! 53 RO_DATA(PAGE_SIZE)
35 *(.got.plt) !! 54 .data1 : {
36 *(.igot.plt) !! 55 *(.data1)
37 *(.got) <<
38 *(.igot) <<
39 } 56 }
>> 57 RW_DATA_SECTION(SMP_CACHE_BYTES, 0, THREAD_SIZE)
>> 58
>> 59 /* End of data section */
>> 60 _edata = .;
40 61
41 EXCEPTION_TABLE(L1_CACHE_BYTES) !! 62 .fixup : {
>> 63 __start___fixup = .;
>> 64 *(.fixup)
>> 65 __stop___fixup = .;
>> 66 }
>> 67 EXCEPTION_TABLE(16)
>> 68 NOTES
42 69
43 . = ALIGN(PAGE_SIZE); 70 . = ALIGN(PAGE_SIZE);
44 __init_begin = .; !! 71 __init_begin = ALIGN(PAGE_SIZE);
45 INIT_TEXT_SECTION(PAGE_SIZE) 72 INIT_TEXT_SECTION(PAGE_SIZE)
46 INIT_DATA_SECTION(PAGE_SIZE) !! 73 __init_text_end = .;
47 PERCPU_SECTION(L1_CACHE_BYTES) !! 74 INIT_DATA_SECTION(16)
48 __init_end = .; <<
49 75
50 _sdata = .; !! 76 . = ALIGN(4);
51 RO_DATA(PAGE_SIZE) !! 77 .tsb_ldquad_phys_patch : {
52 RW_DATA(L1_CACHE_BYTES, PAGE_SIZE, THR !! 78 __tsb_ldquad_phys_patch = .;
53 _edata = .; !! 79 *(.tsb_ldquad_phys_patch)
>> 80 __tsb_ldquad_phys_patch_end = .;
>> 81 }
>> 82
>> 83 .tsb_phys_patch : {
>> 84 __tsb_phys_patch = .;
>> 85 *(.tsb_phys_patch)
>> 86 __tsb_phys_patch_end = .;
>> 87 }
>> 88
>> 89 .cpuid_patch : {
>> 90 __cpuid_patch = .;
>> 91 *(.cpuid_patch)
>> 92 __cpuid_patch_end = .;
>> 93 }
54 94
>> 95 .sun4v_1insn_patch : {
>> 96 __sun4v_1insn_patch = .;
>> 97 *(.sun4v_1insn_patch)
>> 98 __sun4v_1insn_patch_end = .;
>> 99 }
>> 100 .sun4v_2insn_patch : {
>> 101 __sun4v_2insn_patch = .;
>> 102 *(.sun4v_2insn_patch)
>> 103 __sun4v_2insn_patch_end = .;
>> 104 }
>> 105
>> 106 PERCPU(PAGE_SIZE)
>> 107
>> 108 . = ALIGN(PAGE_SIZE);
>> 109 __init_end = .;
55 BSS_SECTION(0, 0, 0) 110 BSS_SECTION(0, 0, 0)
56 _end = .; !! 111 _end = . ;
57 112
58 STABS_DEBUG 113 STABS_DEBUG
59 DWARF_DEBUG 114 DWARF_DEBUG
60 ELF_DETAILS <<
61 115
62 DISCARDS 116 DISCARDS
63 } 117 }
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