1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0 2 # !! 2 config M68K 3 # For a description of the syntax of this conf !! 3 bool 4 # see Documentation/kbuild/kconfig-language.rs !! 4 default y 5 # !! 5 select ARCH_HAS_SYNC_DMA_FOR_DEVICE if HAS_DMA 6 !! 6 select ARCH_MIGHT_HAVE_PC_PARPORT if ISA 7 config OPENRISC !! 7 select ARCH_NO_COHERENT_DMA_MMAP if !MMU 8 def_bool y !! 8 select ARCH_NO_PREEMPT if !COLDFIRE 9 select ARCH_32BIT_OFF_T !! 9 select HAVE_IDE 10 select ARCH_HAS_DMA_SET_UNCACHED !! 10 select HAVE_AOUT if MMU 11 select ARCH_HAS_DMA_CLEAR_UNCACHED !! 11 select HAVE_DEBUG_BUGVERBOSE 12 select ARCH_HAS_SYNC_DMA_FOR_DEVICE << 13 select COMMON_CLK << 14 select OF << 15 select OF_EARLY_FLATTREE << 16 select IRQ_DOMAIN << 17 select GPIOLIB << 18 select HAVE_ARCH_TRACEHOOK << 19 select SPARSE_IRQ << 20 select GENERIC_IRQ_CHIP << 21 select GENERIC_IRQ_PROBE << 22 select GENERIC_IRQ_SHOW 12 select GENERIC_IRQ_SHOW 23 select GENERIC_PCI_IOMAP << 24 select GENERIC_IOREMAP << 25 select GENERIC_CPU_DEVICES << 26 select HAVE_PCI << 27 select HAVE_UID16 << 28 select HAVE_PAGE_SIZE_8KB << 29 select GENERIC_ATOMIC64 13 select GENERIC_ATOMIC64 30 select GENERIC_CLOCKEVENTS_BROADCAST !! 14 select HAVE_UID16 31 select GENERIC_SMP_IDLE_THREAD !! 15 select VIRT_TO_BUS >> 16 select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS >> 17 select GENERIC_CPU_DEVICES >> 18 select GENERIC_IOMAP >> 19 select GENERIC_STRNCPY_FROM_USER if MMU >> 20 select GENERIC_STRNLEN_USER if MMU >> 21 select ARCH_WANT_IPC_PARSE_VERSION >> 22 select ARCH_USES_GETTIMEOFFSET if MMU && !COLDFIRE >> 23 select HAVE_FUTEX_CMPXCHG if MMU && FUTEX >> 24 select HAVE_MOD_ARCH_SPECIFIC >> 25 select MODULES_USE_ELF_REL 32 select MODULES_USE_ELF_RELA 26 select MODULES_USE_ELF_RELA 33 select HAVE_DEBUG_STACKOVERFLOW !! 27 select OLD_SIGSUSPEND3 34 select OR1K_PIC !! 28 select OLD_SIGACTION 35 select CPU_NO_EFFICIENT_FFS if !OPENRI !! 29 select DMA_DIRECT_OPS if HAS_DMA 36 select ARCH_USE_QUEUED_RWLOCKS !! 30 select ARCH_DISCARD_MEMBLOCK 37 select OMPIC if SMP << 38 select PCI_DOMAINS_GENERIC if PCI << 39 select PCI_MSI if PCI << 40 select ARCH_WANT_FRAME_POINTERS << 41 select GENERIC_IRQ_MULTI_HANDLER << 42 select MMU_GATHER_NO_RANGE if MMU << 43 select TRACE_IRQFLAGS_SUPPORT << 44 31 45 config CPU_BIG_ENDIAN 32 config CPU_BIG_ENDIAN 46 def_bool y 33 def_bool y 47 34 48 config MMU !! 35 config RWSEM_GENERIC_SPINLOCK 49 def_bool y !! 36 bool 50 !! 37 default y 51 config GENERIC_HWEIGHT << 52 def_bool y << 53 << 54 config NO_IOPORT_MAP << 55 def_bool y << 56 << 57 # For now, use generic checksum functions << 58 #These can be reimplemented in assembly later << 59 config GENERIC_CSUM << 60 def_bool y << 61 << 62 config STACKTRACE_SUPPORT << 63 def_bool y << 64 38 65 config LOCKDEP_SUPPORT !! 39 config RWSEM_XCHGADD_ALGORITHM 66 def_bool y !! 40 bool 67 41 68 menu "Processor type and features" !! 42 config ARCH_HAS_ILOG2_U32 >> 43 bool 69 44 70 choice !! 45 config ARCH_HAS_ILOG2_U64 71 prompt "Subarchitecture" !! 46 bool 72 default OR1K_1200 << 73 47 74 config OR1K_1200 !! 48 config GENERIC_HWEIGHT 75 bool "OR1200" !! 49 bool 76 help !! 50 default y 77 Generic OpenRISC 1200 architecture << 78 51 79 endchoice !! 52 config GENERIC_CALIBRATE_DELAY >> 53 bool >> 54 default y 80 55 81 config DCACHE_WRITETHROUGH !! 56 config GENERIC_CSUM 82 bool "Have write through data caches" !! 57 bool 83 default n << 84 help << 85 Select this if your implementation f << 86 Selecting 'N' here will allow the ke << 87 caches at relevant times. Most OpenR << 88 through data caches. << 89 58 90 If unsure say N here !! 59 config TIME_LOW_RES >> 60 bool >> 61 default y 91 62 92 config OPENRISC_BUILTIN_DTB !! 63 config NO_IOPORT_MAP 93 string "Builtin DTB" !! 64 def_bool y 94 default "" << 95 65 96 menu "Class II Instructions" !! 66 config NO_DMA >> 67 def_bool (MMU && SUN3) || (!MMU && !COLDFIRE) 97 68 98 config OPENRISC_HAVE_INST_FF1 !! 69 config ZONE_DMA 99 bool "Have instruction l.ff1" !! 70 bool 100 default y 71 default y 101 help << 102 Select this if your implementation h << 103 72 104 config OPENRISC_HAVE_INST_FL1 !! 73 config HZ 105 bool "Have instruction l.fl1" !! 74 int 106 default y !! 75 default 1000 if CLEOPATRA 107 help !! 76 default 100 108 Select this if your implementation h << 109 77 110 config OPENRISC_HAVE_INST_MUL !! 78 config PGTABLE_LEVELS 111 bool "Have instruction l.mul for hardw !! 79 default 2 if SUN3 || COLDFIRE 112 default y !! 80 default 3 113 help << 114 Select this if your implementation h << 115 81 116 config OPENRISC_HAVE_INST_DIV !! 82 config MMU 117 bool "Have instruction l.div for hardw !! 83 bool "MMU-based Paged Memory Management Support" 118 default y 84 default y 119 help 85 help 120 Select this if your implementation h !! 86 Select if you want MMU-based virtualised addressing space 121 !! 87 support by paged memory management. If unsure, say 'Y'. 122 config OPENRISC_HAVE_INST_CMOV << 123 bool "Have instruction l.cmov for cond << 124 default n << 125 help << 126 This config enables gcc to generate << 127 the kernel which in general will imp << 128 binary size. << 129 << 130 Select this if your implementation h << 131 l.cmov conistional move instruction. << 132 << 133 Say N if you are unsure. << 134 << 135 config OPENRISC_HAVE_INST_ROR << 136 bool "Have instruction l.ror for rotat << 137 default n << 138 help << 139 This config enables gcc to generate << 140 the kernel which in general will imp << 141 binary size. << 142 << 143 Select this if your implementation h << 144 l.ror rotate right instruction. << 145 << 146 Say N if you are unsure. << 147 << 148 config OPENRISC_HAVE_INST_RORI << 149 bool "Have instruction l.rori for rota << 150 default n << 151 help << 152 This config enables gcc to generate << 153 the kernel which in general will imp << 154 binary size. << 155 << 156 Select this if your implementation h << 157 l.rori rotate right with immediate i << 158 << 159 Say N if you are unsure. << 160 << 161 config OPENRISC_HAVE_INST_SEXT << 162 bool "Have instructions l.ext* for sig << 163 default n << 164 help << 165 This config enables gcc to generate << 166 the kernel which in general will imp << 167 binary size. << 168 << 169 Select this if your implementation h << 170 l.exths, l.extbs, l.exthz and l.extb << 171 88 172 Say N if you are unsure. !! 89 config MMU_MOTOROLA >> 90 bool 173 91 174 endmenu !! 92 config MMU_COLDFIRE >> 93 bool 175 94 176 config NR_CPUS !! 95 config MMU_SUN3 177 int "Maximum number of CPUs (2-32)" !! 96 bool 178 range 2 32 !! 97 depends on MMU && !MMU_MOTOROLA && !MMU_COLDFIRE 179 depends on SMP << 180 default "2" << 181 98 182 config SMP !! 99 config KEXEC 183 bool "Symmetric Multi-Processing suppo !! 100 bool "kexec system call" >> 101 depends on M68KCLASSIC >> 102 select KEXEC_CORE 184 help 103 help 185 This enables support for systems wit !! 104 kexec is a system call that implements the ability to shutdown your 186 a system with only one CPU, say N. I !! 105 current kernel, and to start another kernel. It is like a reboot 187 than one CPU, say Y. !! 106 but it is independent of the system firmware. And like a reboot >> 107 you can start any kernel with it, not just Linux. 188 108 189 If you don't know what to do here, s !! 109 The name comes from the similarity to the exec system call. 190 110 191 config FPU !! 111 It is an ongoing process to be certain the hardware in a machine 192 bool "FPU support" !! 112 is properly shutdown, so do not be surprised if this code does not 193 default y !! 113 initially work for you. As of this writing the exact hardware >> 114 interface is strongly in flux, so no good recommendation can be >> 115 made. >> 116 >> 117 config BOOTINFO_PROC >> 118 bool "Export bootinfo in procfs" >> 119 depends on KEXEC && M68KCLASSIC 194 help 120 help 195 Say N here if you want to disable al !! 121 Say Y to export the bootinfo used to boot the kernel in a 196 in the kernel and reduce binary size !! 122 "bootinfo" file in procfs. This is useful with kexec. 197 123 198 If you don't know what to do here, s !! 124 menu "Platform setup" 199 125 200 source "kernel/Kconfig.hz" !! 126 source arch/m68k/Kconfig.cpu 201 127 202 config OPENRISC_NO_SPR_SR_DSX !! 128 source arch/m68k/Kconfig.machine 203 bool "use SPR_SR_DSX software emulatio << 204 default y << 205 help << 206 SPR_SR_DSX bit is status register bi << 207 the last exception has happened in d << 208 << 209 OpenRISC architecture makes it optio << 210 in hardware and the OR1200 does not << 211 129 212 Say N here if you know that your Ope !! 130 source arch/m68k/Kconfig.bus 213 SPR_SR_DSX bit implemented. Say Y if << 214 131 215 config OPENRISC_HAVE_SHADOW_GPRS !! 132 endmenu 216 bool "Support for shadow gpr files" if << 217 default y if SMP << 218 help << 219 Say Y here if your OpenRISC processo << 220 register files. They will in such ca << 221 scratch reg storage on exception ent << 222 << 223 On SMP systems, this feature is mand << 224 On a unicore system it's safe to say << 225 << 226 config CMDLINE << 227 string "Default kernel command string" << 228 default "" << 229 help << 230 On some architectures there is curre << 231 to pass arguments to the kernel. For << 232 supply some command-line options at << 233 here. << 234 133 235 menu "Debugging options" !! 134 menu "Kernel Features" 236 135 237 config JUMP_UPON_UNHANDLED_EXCEPTION !! 136 endmenu 238 bool "Try to die gracefully" << 239 default y << 240 help << 241 Now this puts kernel into infinite l << 242 your kernel crashes this doesn't hav << 243 137 244 Say Y if you are unsure. !! 138 if !MMU >> 139 menu "Power management options" 245 140 246 config OPENRISC_ESR_EXCEPTION_BUG_CHECK !! 141 config PM 247 bool "Check for possible ESR exception !! 142 bool "Power Management support" 248 default n << 249 help 143 help 250 This option enables some checks that !! 144 Support processor power management modes 251 in kernel. << 252 << 253 Say N if you are unsure. << 254 145 255 endmenu 146 endmenu >> 147 endif 256 148 257 endmenu !! 149 source "arch/m68k/Kconfig.devices"
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