1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0 2 # !! 2 config M68K 3 # For a description of the syntax of this conf !! 3 bool 4 # see Documentation/kbuild/kconfig-language.rs !! 4 default y 5 # << 6 << 7 config OPENRISC << 8 def_bool y << 9 select ARCH_32BIT_OFF_T 5 select ARCH_32BIT_OFF_T 10 select ARCH_HAS_DMA_SET_UNCACHED !! 6 select ARCH_HAS_BINFMT_FLAT 11 select ARCH_HAS_DMA_CLEAR_UNCACHED !! 7 select ARCH_HAS_CURRENT_STACK_POINTER 12 select ARCH_HAS_SYNC_DMA_FOR_DEVICE !! 8 select ARCH_HAS_DMA_PREP_COHERENT if HAS_DMA && MMU && !COLDFIRE 13 select COMMON_CLK !! 9 select ARCH_HAS_SYNC_DMA_FOR_DEVICE if HAS_DMA 14 select OF !! 10 select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS 15 select OF_EARLY_FLATTREE !! 11 select ARCH_MIGHT_HAVE_PC_PARPORT if ISA 16 select IRQ_DOMAIN !! 12 select ARCH_NO_PREEMPT if !COLDFIRE 17 select GPIOLIB !! 13 select ARCH_USE_MEMTEST if MMU_MOTOROLA 18 select HAVE_ARCH_TRACEHOOK !! 14 select ARCH_WANT_IPC_PARSE_VERSION 19 select SPARSE_IRQ !! 15 select BINFMT_FLAT_ARGVP_ENVP_ON_STACK 20 select GENERIC_IRQ_CHIP !! 16 select DMA_DIRECT_REMAP if HAS_DMA && MMU && !COLDFIRE 21 select GENERIC_IRQ_PROBE !! 17 select GENERIC_ATOMIC64 22 select GENERIC_IRQ_SHOW << 23 select GENERIC_PCI_IOMAP << 24 select GENERIC_IOREMAP << 25 select GENERIC_CPU_DEVICES 18 select GENERIC_CPU_DEVICES 26 select HAVE_PCI !! 19 select GENERIC_IOMAP >> 20 select GENERIC_IRQ_SHOW >> 21 select HAVE_ASM_MODVERSIONS >> 22 select HAVE_DEBUG_BUGVERBOSE >> 23 select HAVE_EFFICIENT_UNALIGNED_ACCESS if !CPU_HAS_NO_UNALIGNED >> 24 select HAVE_MOD_ARCH_SPECIFIC 27 select HAVE_UID16 25 select HAVE_UID16 28 select HAVE_PAGE_SIZE_8KB << 29 select GENERIC_ATOMIC64 << 30 select GENERIC_CLOCKEVENTS_BROADCAST << 31 select GENERIC_SMP_IDLE_THREAD << 32 select MODULES_USE_ELF_RELA << 33 select HAVE_DEBUG_STACKOVERFLOW << 34 select OR1K_PIC << 35 select CPU_NO_EFFICIENT_FFS if !OPENRI << 36 select ARCH_USE_QUEUED_RWLOCKS << 37 select OMPIC if SMP << 38 select PCI_DOMAINS_GENERIC if PCI << 39 select PCI_MSI if PCI << 40 select ARCH_WANT_FRAME_POINTERS << 41 select GENERIC_IRQ_MULTI_HANDLER << 42 select MMU_GATHER_NO_RANGE if MMU 26 select MMU_GATHER_NO_RANGE if MMU 43 select TRACE_IRQFLAGS_SUPPORT !! 27 select MODULES_USE_ELF_REL >> 28 select MODULES_USE_ELF_RELA >> 29 select NO_DMA if !MMU && !COLDFIRE >> 30 select OLD_SIGACTION >> 31 select OLD_SIGSUSPEND3 >> 32 select UACCESS_MEMCPY if !MMU >> 33 select ZONE_DMA 44 34 45 config CPU_BIG_ENDIAN 35 config CPU_BIG_ENDIAN 46 def_bool y 36 def_bool y 47 37 48 config MMU !! 38 config ARCH_HAS_ILOG2_U32 49 def_bool y !! 39 bool >> 40 >> 41 config ARCH_HAS_ILOG2_U64 >> 42 bool 50 43 51 config GENERIC_HWEIGHT 44 config GENERIC_HWEIGHT 52 def_bool y !! 45 bool >> 46 default y 53 47 54 config NO_IOPORT_MAP !! 48 config GENERIC_CALIBRATE_DELAY 55 def_bool y !! 49 bool >> 50 default y 56 51 57 # For now, use generic checksum functions << 58 #These can be reimplemented in assembly later << 59 config GENERIC_CSUM 52 config GENERIC_CSUM 60 def_bool y !! 53 bool 61 << 62 config STACKTRACE_SUPPORT << 63 def_bool y << 64 << 65 config LOCKDEP_SUPPORT << 66 def_bool y << 67 << 68 menu "Processor type and features" << 69 << 70 choice << 71 prompt "Subarchitecture" << 72 default OR1K_1200 << 73 << 74 config OR1K_1200 << 75 bool "OR1200" << 76 help << 77 Generic OpenRISC 1200 architecture << 78 << 79 endchoice << 80 << 81 config DCACHE_WRITETHROUGH << 82 bool "Have write through data caches" << 83 default n << 84 help << 85 Select this if your implementation f << 86 Selecting 'N' here will allow the ke << 87 caches at relevant times. Most OpenR << 88 through data caches. << 89 << 90 If unsure say N here << 91 << 92 config OPENRISC_BUILTIN_DTB << 93 string "Builtin DTB" << 94 default "" << 95 54 96 menu "Class II Instructions" !! 55 config TIME_LOW_RES 97 !! 56 bool 98 config OPENRISC_HAVE_INST_FF1 << 99 bool "Have instruction l.ff1" << 100 default y 57 default y 101 help << 102 Select this if your implementation h << 103 58 104 config OPENRISC_HAVE_INST_FL1 !! 59 config NO_IOPORT_MAP 105 bool "Have instruction l.fl1" !! 60 def_bool y 106 default y << 107 help << 108 Select this if your implementation h << 109 61 110 config OPENRISC_HAVE_INST_MUL !! 62 config HZ 111 bool "Have instruction l.mul for hardw !! 63 int 112 default y !! 64 default 1000 if CLEOPATRA 113 help !! 65 default 100 114 Select this if your implementation h !! 66 >> 67 config PGTABLE_LEVELS >> 68 default 2 if SUN3 || COLDFIRE >> 69 default 3 115 70 116 config OPENRISC_HAVE_INST_DIV !! 71 config MMU 117 bool "Have instruction l.div for hardw !! 72 bool "MMU-based Paged Memory Management Support" 118 default y 73 default y 119 help 74 help 120 Select this if your implementation h !! 75 Select if you want MMU-based virtualised addressing space >> 76 support by paged memory management. If unsure, say 'Y'. 121 77 122 config OPENRISC_HAVE_INST_CMOV !! 78 config MMU_MOTOROLA 123 bool "Have instruction l.cmov for cond !! 79 bool 124 default n << 125 help << 126 This config enables gcc to generate << 127 the kernel which in general will imp << 128 binary size. << 129 << 130 Select this if your implementation h << 131 l.cmov conistional move instruction. << 132 << 133 Say N if you are unsure. << 134 << 135 config OPENRISC_HAVE_INST_ROR << 136 bool "Have instruction l.ror for rotat << 137 default n << 138 help << 139 This config enables gcc to generate << 140 the kernel which in general will imp << 141 binary size. << 142 << 143 Select this if your implementation h << 144 l.ror rotate right instruction. << 145 << 146 Say N if you are unsure. << 147 << 148 config OPENRISC_HAVE_INST_RORI << 149 bool "Have instruction l.rori for rota << 150 default n << 151 help << 152 This config enables gcc to generate << 153 the kernel which in general will imp << 154 binary size. << 155 << 156 Select this if your implementation h << 157 l.rori rotate right with immediate i << 158 << 159 Say N if you are unsure. << 160 << 161 config OPENRISC_HAVE_INST_SEXT << 162 bool "Have instructions l.ext* for sig << 163 default n << 164 help << 165 This config enables gcc to generate << 166 the kernel which in general will imp << 167 binary size. << 168 << 169 Select this if your implementation h << 170 l.exths, l.extbs, l.exthz and l.extb << 171 80 172 Say N if you are unsure. !! 81 config MMU_COLDFIRE >> 82 bool 173 83 174 endmenu !! 84 config MMU_SUN3 >> 85 bool >> 86 depends on MMU && !MMU_MOTOROLA && !MMU_COLDFIRE 175 87 176 config NR_CPUS !! 88 config KEXEC 177 int "Maximum number of CPUs (2-32)" !! 89 bool "kexec system call" 178 range 2 32 !! 90 depends on M68KCLASSIC 179 depends on SMP !! 91 select KEXEC_CORE 180 default "2" << 181 << 182 config SMP << 183 bool "Symmetric Multi-Processing suppo << 184 help 92 help 185 This enables support for systems wit !! 93 kexec is a system call that implements the ability to shutdown your 186 a system with only one CPU, say N. I !! 94 current kernel, and to start another kernel. It is like a reboot 187 than one CPU, say Y. !! 95 but it is independent of the system firmware. And like a reboot >> 96 you can start any kernel with it, not just Linux. 188 97 189 If you don't know what to do here, s !! 98 The name comes from the similarity to the exec system call. 190 99 191 config FPU !! 100 It is an ongoing process to be certain the hardware in a machine 192 bool "FPU support" !! 101 is properly shutdown, so do not be surprised if this code does not 193 default y !! 102 initially work for you. As of this writing the exact hardware >> 103 interface is strongly in flux, so no good recommendation can be >> 104 made. >> 105 >> 106 config BOOTINFO_PROC >> 107 bool "Export bootinfo in procfs" >> 108 depends on KEXEC && M68KCLASSIC 194 help 109 help 195 Say N here if you want to disable al !! 110 Say Y to export the bootinfo used to boot the kernel in a 196 in the kernel and reduce binary size !! 111 "bootinfo" file in procfs. This is useful with kexec. 197 112 198 If you don't know what to do here, s !! 113 menu "Platform setup" 199 114 200 source "kernel/Kconfig.hz" !! 115 source "arch/m68k/Kconfig.cpu" 201 116 202 config OPENRISC_NO_SPR_SR_DSX !! 117 source "arch/m68k/Kconfig.machine" 203 bool "use SPR_SR_DSX software emulatio << 204 default y << 205 help << 206 SPR_SR_DSX bit is status register bi << 207 the last exception has happened in d << 208 << 209 OpenRISC architecture makes it optio << 210 in hardware and the OR1200 does not << 211 118 212 Say N here if you know that your Ope !! 119 source "arch/m68k/Kconfig.bus" 213 SPR_SR_DSX bit implemented. Say Y if << 214 120 215 config OPENRISC_HAVE_SHADOW_GPRS !! 121 endmenu 216 bool "Support for shadow gpr files" if << 217 default y if SMP << 218 help << 219 Say Y here if your OpenRISC processo << 220 register files. They will in such ca << 221 scratch reg storage on exception ent << 222 << 223 On SMP systems, this feature is mand << 224 On a unicore system it's safe to say << 225 << 226 config CMDLINE << 227 string "Default kernel command string" << 228 default "" << 229 help << 230 On some architectures there is curre << 231 to pass arguments to the kernel. For << 232 supply some command-line options at << 233 here. << 234 122 235 menu "Debugging options" !! 123 menu "Kernel Features" 236 124 237 config JUMP_UPON_UNHANDLED_EXCEPTION !! 125 endmenu 238 bool "Try to die gracefully" << 239 default y << 240 help << 241 Now this puts kernel into infinite l << 242 your kernel crashes this doesn't hav << 243 126 244 Say Y if you are unsure. !! 127 if !MMU >> 128 menu "Power management options" 245 129 246 config OPENRISC_ESR_EXCEPTION_BUG_CHECK !! 130 config PM 247 bool "Check for possible ESR exception !! 131 bool "Power Management support" 248 default n << 249 help 132 help 250 This option enables some checks that !! 133 Support processor power management modes 251 in kernel. << 252 << 253 Say N if you are unsure. << 254 134 255 endmenu 135 endmenu >> 136 endif 256 137 257 endmenu !! 138 source "arch/m68k/Kconfig.devices"
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