Linux/arch/openrisc/Kconfig

Version: ~ [ linux-6.12-rc7 ] ~ [ linux-6.11.7 ] ~ [ linux-6.10.14 ] ~ [ linux-6.9.12 ] ~ [ linux-6.8.12 ] ~ [ linux-6.7.12 ] ~ [ linux-6.6.60 ] ~ [ linux-6.5.13 ] ~ [ linux-6.4.16 ] ~ [ linux-6.3.13 ] ~ [ linux-6.2.16 ] ~ [ linux-6.1.116 ] ~ [ linux-6.0.19 ] ~ [ linux-5.19.17 ] ~ [ linux-5.18.19 ] ~ [ linux-5.17.15 ] ~ [ linux-5.16.20 ] ~ [ linux-5.15.171 ] ~ [ linux-5.14.21 ] ~ [ linux-5.13.19 ] ~ [ linux-5.12.19 ] ~ [ linux-5.11.22 ] ~ [ linux-5.10.229 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.285 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.323 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.336 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.337 ] ~ [ linux-4.4.302 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.12 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

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1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0 2 # !! 2 config M68K 3 # For a description of the syntax of this conf !! 3 bool 4 # see Documentation/kbuild/kconfig-language.rs !! 4 default y 5 # << 6 << 7 config OPENRISC << 8 def_bool y << 9 select ARCH_32BIT_OFF_T 5 select ARCH_32BIT_OFF_T 10 select ARCH_HAS_DMA_SET_UNCACHED !! 6 select ARCH_HAS_BINFMT_FLAT 11 select ARCH_HAS_DMA_CLEAR_UNCACHED !! 7 select ARCH_HAS_CPU_CACHE_ALIASING 12 select ARCH_HAS_SYNC_DMA_FOR_DEVICE !! 8 select ARCH_HAS_CPU_FINALIZE_INIT if MMU 13 select COMMON_CLK !! 9 select ARCH_HAS_CURRENT_STACK_POINTER 14 select OF !! 10 select ARCH_HAS_DMA_PREP_COHERENT if M68K_NONCOHERENT_DMA && !COLDFIRE 15 select OF_EARLY_FLATTREE !! 11 select ARCH_HAS_SYNC_DMA_FOR_DEVICE if M68K_NONCOHERENT_DMA 16 select IRQ_DOMAIN !! 12 select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS 17 select GPIOLIB !! 13 select ARCH_MIGHT_HAVE_PC_PARPORT if ISA 18 select HAVE_ARCH_TRACEHOOK !! 14 select ARCH_NO_PREEMPT if !COLDFIRE 19 select SPARSE_IRQ !! 15 select ARCH_USE_MEMTEST if MMU_MOTOROLA 20 select GENERIC_IRQ_CHIP !! 16 select ARCH_WANT_IPC_PARSE_VERSION 21 select GENERIC_IRQ_PROBE !! 17 select BINFMT_FLAT_ARGVP_ENVP_ON_STACK 22 select GENERIC_IRQ_SHOW !! 18 select DMA_DIRECT_REMAP if M68K_NONCOHERENT_DMA && !COLDFIRE 23 select GENERIC_PCI_IOMAP !! 19 select GENERIC_ATOMIC64 24 select GENERIC_IOREMAP << 25 select GENERIC_CPU_DEVICES 20 select GENERIC_CPU_DEVICES 26 select HAVE_PCI !! 21 select GENERIC_IOMAP if HAS_IOPORT >> 22 select GENERIC_IRQ_SHOW >> 23 select GENERIC_LIB_ASHLDI3 >> 24 select GENERIC_LIB_ASHRDI3 >> 25 select GENERIC_LIB_LSHRDI3 >> 26 select HAS_IOPORT if PCI || ISA || ATARI_ROM_ISA >> 27 select HAVE_ARCH_SECCOMP >> 28 select HAVE_ARCH_SECCOMP_FILTER >> 29 select HAVE_ASM_MODVERSIONS >> 30 select HAVE_DEBUG_BUGVERBOSE >> 31 select HAVE_EFFICIENT_UNALIGNED_ACCESS if !CPU_HAS_NO_UNALIGNED >> 32 select HAVE_MOD_ARCH_SPECIFIC 27 select HAVE_UID16 33 select HAVE_UID16 28 select HAVE_PAGE_SIZE_8KB << 29 select GENERIC_ATOMIC64 << 30 select GENERIC_CLOCKEVENTS_BROADCAST << 31 select GENERIC_SMP_IDLE_THREAD << 32 select MODULES_USE_ELF_RELA << 33 select HAVE_DEBUG_STACKOVERFLOW << 34 select OR1K_PIC << 35 select CPU_NO_EFFICIENT_FFS if !OPENRI << 36 select ARCH_USE_QUEUED_RWLOCKS << 37 select OMPIC if SMP << 38 select PCI_DOMAINS_GENERIC if PCI << 39 select PCI_MSI if PCI << 40 select ARCH_WANT_FRAME_POINTERS << 41 select GENERIC_IRQ_MULTI_HANDLER << 42 select MMU_GATHER_NO_RANGE if MMU 34 select MMU_GATHER_NO_RANGE if MMU 43 select TRACE_IRQFLAGS_SUPPORT !! 35 select MODULES_USE_ELF_REL >> 36 select MODULES_USE_ELF_RELA >> 37 select NO_DMA if !MMU && !COLDFIRE >> 38 select OLD_SIGACTION >> 39 select OLD_SIGSUSPEND3 >> 40 select UACCESS_MEMCPY if !MMU >> 41 select ZONE_DMA 44 42 45 config CPU_BIG_ENDIAN 43 config CPU_BIG_ENDIAN 46 def_bool y 44 def_bool y 47 45 48 config MMU !! 46 config ARCH_HAS_ILOG2_U32 49 def_bool y !! 47 bool >> 48 >> 49 config ARCH_HAS_ILOG2_U64 >> 50 bool 50 51 51 config GENERIC_HWEIGHT 52 config GENERIC_HWEIGHT 52 def_bool y !! 53 bool >> 54 default y 53 55 54 config NO_IOPORT_MAP !! 56 config GENERIC_CALIBRATE_DELAY 55 def_bool y !! 57 bool >> 58 default y 56 59 57 # For now, use generic checksum functions << 58 #These can be reimplemented in assembly later << 59 config GENERIC_CSUM 60 config GENERIC_CSUM 60 def_bool y !! 61 bool 61 << 62 config STACKTRACE_SUPPORT << 63 def_bool y << 64 << 65 config LOCKDEP_SUPPORT << 66 def_bool y << 67 << 68 menu "Processor type and features" << 69 << 70 choice << 71 prompt "Subarchitecture" << 72 default OR1K_1200 << 73 << 74 config OR1K_1200 << 75 bool "OR1200" << 76 help << 77 Generic OpenRISC 1200 architecture << 78 << 79 endchoice << 80 << 81 config DCACHE_WRITETHROUGH << 82 bool "Have write through data caches" << 83 default n << 84 help << 85 Select this if your implementation f << 86 Selecting 'N' here will allow the ke << 87 caches at relevant times. Most OpenR << 88 through data caches. << 89 << 90 If unsure say N here << 91 << 92 config OPENRISC_BUILTIN_DTB << 93 string "Builtin DTB" << 94 default "" << 95 << 96 menu "Class II Instructions" << 97 62 98 config OPENRISC_HAVE_INST_FF1 !! 63 config TIME_LOW_RES 99 bool "Have instruction l.ff1" !! 64 bool 100 default y 65 default y 101 help << 102 Select this if your implementation h << 103 66 104 config OPENRISC_HAVE_INST_FL1 !! 67 config NO_IOPORT_MAP 105 bool "Have instruction l.fl1" !! 68 def_bool y 106 default y << 107 help << 108 Select this if your implementation h << 109 69 110 config OPENRISC_HAVE_INST_MUL !! 70 config HZ 111 bool "Have instruction l.mul for hardw !! 71 int 112 default y !! 72 default 1000 if CLEOPATRA 113 help !! 73 default 100 114 Select this if your implementation h !! 74 >> 75 config PGTABLE_LEVELS >> 76 default 2 if SUN3 || COLDFIRE >> 77 default 3 115 78 116 config OPENRISC_HAVE_INST_DIV !! 79 config MMU 117 bool "Have instruction l.div for hardw !! 80 bool "MMU-based Paged Memory Management Support" 118 default y 81 default y 119 help 82 help 120 Select this if your implementation h !! 83 Select if you want MMU-based virtualised addressing space >> 84 support by paged memory management. If unsure, say 'Y'. 121 85 122 config OPENRISC_HAVE_INST_CMOV !! 86 config MMU_MOTOROLA 123 bool "Have instruction l.cmov for cond !! 87 bool 124 default n !! 88 select HAVE_PAGE_SIZE_4KB 125 help << 126 This config enables gcc to generate << 127 the kernel which in general will imp << 128 binary size. << 129 << 130 Select this if your implementation h << 131 l.cmov conistional move instruction. << 132 << 133 Say N if you are unsure. << 134 << 135 config OPENRISC_HAVE_INST_ROR << 136 bool "Have instruction l.ror for rotat << 137 default n << 138 help << 139 This config enables gcc to generate << 140 the kernel which in general will imp << 141 binary size. << 142 << 143 Select this if your implementation h << 144 l.ror rotate right instruction. << 145 << 146 Say N if you are unsure. << 147 << 148 config OPENRISC_HAVE_INST_RORI << 149 bool "Have instruction l.rori for rota << 150 default n << 151 help << 152 This config enables gcc to generate << 153 the kernel which in general will imp << 154 binary size. << 155 << 156 Select this if your implementation h << 157 l.rori rotate right with immediate i << 158 << 159 Say N if you are unsure. << 160 << 161 config OPENRISC_HAVE_INST_SEXT << 162 bool "Have instructions l.ext* for sig << 163 default n << 164 help << 165 This config enables gcc to generate << 166 the kernel which in general will imp << 167 binary size. << 168 << 169 Select this if your implementation h << 170 l.exths, l.extbs, l.exthz and l.extb << 171 << 172 Say N if you are unsure. << 173 << 174 endmenu << 175 89 176 config NR_CPUS !! 90 config MMU_COLDFIRE 177 int "Maximum number of CPUs (2-32)" !! 91 select HAVE_PAGE_SIZE_8KB 178 range 2 32 !! 92 bool 179 depends on SMP << 180 default "2" << 181 93 182 config SMP !! 94 config MMU_SUN3 183 bool "Symmetric Multi-Processing suppo !! 95 bool 184 help !! 96 select HAVE_PAGE_SIZE_8KB 185 This enables support for systems wit !! 97 depends on MMU && !MMU_MOTOROLA && !MMU_COLDFIRE 186 a system with only one CPU, say N. I << 187 than one CPU, say Y. << 188 98 189 If you don't know what to do here, s !! 99 config ARCH_SUPPORTS_KEXEC >> 100 def_bool M68KCLASSIC && MMU 190 101 191 config FPU !! 102 config BOOTINFO_PROC 192 bool "FPU support" !! 103 bool "Export bootinfo in procfs" 193 default y !! 104 depends on KEXEC && M68KCLASSIC 194 help 105 help 195 Say N here if you want to disable al !! 106 Say Y to export the bootinfo used to boot the kernel in a 196 in the kernel and reduce binary size !! 107 "bootinfo" file in procfs. This is useful with kexec. 197 108 198 If you don't know what to do here, s !! 109 menu "Platform setup" 199 110 200 source "kernel/Kconfig.hz" !! 111 source "arch/m68k/Kconfig.cpu" 201 112 202 config OPENRISC_NO_SPR_SR_DSX !! 113 source "arch/m68k/Kconfig.machine" 203 bool "use SPR_SR_DSX software emulatio << 204 default y << 205 help << 206 SPR_SR_DSX bit is status register bi << 207 the last exception has happened in d << 208 114 209 OpenRISC architecture makes it optio !! 115 source "arch/m68k/Kconfig.bus" 210 in hardware and the OR1200 does not << 211 116 212 Say N here if you know that your Ope !! 117 endmenu 213 SPR_SR_DSX bit implemented. Say Y if << 214 << 215 config OPENRISC_HAVE_SHADOW_GPRS << 216 bool "Support for shadow gpr files" if << 217 default y if SMP << 218 help << 219 Say Y here if your OpenRISC processo << 220 register files. They will in such ca << 221 scratch reg storage on exception ent << 222 << 223 On SMP systems, this feature is mand << 224 On a unicore system it's safe to say << 225 << 226 config CMDLINE << 227 string "Default kernel command string" << 228 default "" << 229 help << 230 On some architectures there is curre << 231 to pass arguments to the kernel. For << 232 supply some command-line options at << 233 here. << 234 118 235 menu "Debugging options" !! 119 menu "Kernel Features" 236 120 237 config JUMP_UPON_UNHANDLED_EXCEPTION !! 121 endmenu 238 bool "Try to die gracefully" << 239 default y << 240 help << 241 Now this puts kernel into infinite l << 242 your kernel crashes this doesn't hav << 243 122 244 Say Y if you are unsure. !! 123 if !MMU >> 124 menu "Power management options" 245 125 246 config OPENRISC_ESR_EXCEPTION_BUG_CHECK !! 126 config PM 247 bool "Check for possible ESR exception !! 127 bool "Power Management support" 248 default n << 249 help 128 help 250 This option enables some checks that !! 129 Support processor power management modes 251 in kernel. << 252 << 253 Say N if you are unsure. << 254 130 255 endmenu 131 endmenu >> 132 endif 256 133 257 endmenu !! 134 source "arch/m68k/Kconfig.devices"

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TOMOYO Linux Cross Reference
Linux/arch/openrisc/Kconfig

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Differences between /arch/openrisc/Kconfig (Architecture mips) and /arch/m68k/Kconfig (Architecture m68k)

TOMOYO Linux Cross Reference Linux/arch/openrisc/Kconfig

Diff markup

Differences between /arch/openrisc/Kconfig (Architecture mips) and /arch/m68k/Kconfig (Architecture m68k)

TOMOYO Linux Cross Reference
Linux/arch/openrisc/Kconfig