1 /* SPDX-License-Identifier: GPL-2.0-or-later * !! 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* 2 /*
3 * OpenRISC entry.S !! 3 * arch/alpha/kernel/entry.S
4 * 4 *
5 * Linux architectural port borrowing liberall !! 5 * Kernel entry-points.
6 * others. All original copyrights apply as p <<
7 * declaration. <<
8 * <<
9 * Modifications for the OpenRISC architecture <<
10 * Copyright (C) 2003 Matjaz Breskvar <phoenix@ <<
11 * Copyright (C) 2005 Gyorgy Jeney <nog@bsemi.c <<
12 * Copyright (C) 2010-2011 Jonas Bonn <jonas@so <<
13 */ 6 */
14 7
15 #include <linux/linkage.h> !! 8 #include <asm/asm-offsets.h>
16 #include <linux/pgtable.h> <<
17 <<
18 #include <asm/processor.h> <<
19 #include <asm/unistd.h> <<
20 #include <asm/thread_info.h> 9 #include <asm/thread_info.h>
>> 10 #include <asm/pal.h>
21 #include <asm/errno.h> 11 #include <asm/errno.h>
22 #include <asm/spr_defs.h> !! 12 #include <asm/unistd.h>
23 #include <asm/page.h> <<
24 #include <asm/mmu.h> <<
25 #include <asm/asm-offsets.h> <<
26 <<
27 #define DISABLE_INTERRUPTS(t1,t2) <<
28 l.mfspr t2,r0,SPR_SR <<
29 l.movhi t1,hi(~(SPR_SR_IEE|SPR_SR_TEE) <<
30 l.ori t1,t1,lo(~(SPR_SR_IEE|SPR_SR_T <<
31 l.and t2,t2,t1 <<
32 l.mtspr r0,t2,SPR_SR <<
33 <<
34 #define ENABLE_INTERRUPTS(t1) <<
35 l.mfspr t1,r0,SPR_SR <<
36 l.ori t1,t1,lo(SPR_SR_IEE|SPR_SR_TEE <<
37 l.mtspr r0,t1,SPR_SR <<
38 13
39 /* =========================================== !! 14 .text
>> 15 .set noat
>> 16 .cfi_sections .debug_frame
>> 17
>> 18 /* Stack offsets. */
>> 19 #define SP_OFF 184
>> 20 #define SWITCH_STACK_SIZE 64
>> 21
>> 22 .macro CFI_START_OSF_FRAME func
>> 23 .align 4
>> 24 .globl \func
>> 25 .type \func,@function
>> 26 \func:
>> 27 .cfi_startproc simple
>> 28 .cfi_return_column 64
>> 29 .cfi_def_cfa $sp, 48
>> 30 .cfi_rel_offset 64, 8
>> 31 .cfi_rel_offset $gp, 16
>> 32 .cfi_rel_offset $16, 24
>> 33 .cfi_rel_offset $17, 32
>> 34 .cfi_rel_offset $18, 40
>> 35 .endm
>> 36
>> 37 .macro CFI_END_OSF_FRAME func
>> 38 .cfi_endproc
>> 39 .size \func, . - \func
>> 40 .endm
40 41
41 #ifdef CONFIG_TRACE_IRQFLAGS <<
42 /* 42 /*
43 * Trace irq on/off creating a stack frame. !! 43 * This defines the normal kernel pt-regs layout.
44 */ !! 44 *
45 #define TRACE_IRQS_OP(trace_op) !! 45 * regs 9-15 preserved by C code
46 l.sw -8(r1),r2 /* store frame !! 46 * regs 16-18 saved by PAL-code
47 l.sw -4(r1),r9 /* store retur !! 47 * regs 29-30 saved and set up by PAL-code
48 l.addi r2,r1,0 /* move sp to !! 48 * JRP - Save regs 16-18 in a special area of the stack, so that
49 l.jal trace_op !! 49 * the palcode-provided values are available to the signal handler.
50 l.addi r1,r1,-8 !! 50 */
51 l.ori r1,r2,0 /* restore sp !! 51
52 l.lwz r9,-4(r1) /* restore ret !! 52 .macro SAVE_ALL
53 l.lwz r2,-8(r1) /* restore fp !! 53 subq $sp, SP_OFF, $sp
54 /* !! 54 .cfi_adjust_cfa_offset SP_OFF
55 * Trace irq on/off and save registers we need !! 55 stq $0, 0($sp)
56 * clobbered. !! 56 stq $1, 8($sp)
57 */ !! 57 stq $2, 16($sp)
58 #define TRACE_IRQS_SAVE(t1,trace_op) !! 58 stq $3, 24($sp)
59 l.sw -12(r1),t1 /* save extra !! 59 stq $4, 32($sp)
60 l.sw -8(r1),r2 /* store frame !! 60 stq $28, 144($sp)
61 l.sw -4(r1),r9 /* store retur !! 61 .cfi_rel_offset $0, 0
62 l.addi r2,r1,0 /* move sp to !! 62 .cfi_rel_offset $1, 8
63 l.jal trace_op !! 63 .cfi_rel_offset $2, 16
64 l.addi r1,r1,-12 !! 64 .cfi_rel_offset $3, 24
65 l.ori r1,r2,0 /* restore sp !! 65 .cfi_rel_offset $4, 32
66 l.lwz r9,-4(r1) /* restore ret !! 66 .cfi_rel_offset $28, 144
67 l.lwz r2,-8(r1) /* restore fp !! 67 lda $2, alpha_mv
68 l.lwz t1,-12(r1) /* restore ext !! 68 stq $5, 40($sp)
69 !! 69 stq $6, 48($sp)
70 #define TRACE_IRQS_OFF TRACE_IRQS_OP(trace_ha !! 70 stq $7, 56($sp)
71 #define TRACE_IRQS_ON TRACE_IRQS_OP(trace_ha !! 71 stq $8, 64($sp)
72 #define TRACE_IRQS_ON_SYSCALL !! 72 stq $19, 72($sp)
73 TRACE_IRQS_SAVE(r10,trace_hardirqs_on) !! 73 stq $20, 80($sp)
74 l.lwz r3,PT_GPR3(r1) !! 74 stq $21, 88($sp)
75 l.lwz r4,PT_GPR4(r1) !! 75 ldq $2, HAE_CACHE($2)
76 l.lwz r5,PT_GPR5(r1) !! 76 stq $22, 96($sp)
77 l.lwz r6,PT_GPR6(r1) !! 77 stq $23, 104($sp)
78 l.lwz r7,PT_GPR7(r1) !! 78 stq $24, 112($sp)
79 l.lwz r8,PT_GPR8(r1) !! 79 stq $25, 120($sp)
80 l.lwz r11,PT_GPR11(r1) !! 80 stq $26, 128($sp)
81 #define TRACE_IRQS_OFF_ENTRY !! 81 stq $27, 136($sp)
82 l.lwz r5,PT_SR(r1) !! 82 stq $2, 152($sp)
83 l.andi r3,r5,(SPR_SR_IEE|SPR_SR_TEE) !! 83 stq $16, 160($sp)
84 l.sfeq r5,r0 /* skip trace !! 84 stq $17, 168($sp)
85 l.bf 1f !! 85 stq $18, 176($sp)
86 l.nop !! 86 .cfi_rel_offset $5, 40
87 TRACE_IRQS_SAVE(r4,trace_hardirqs_off) !! 87 .cfi_rel_offset $6, 48
88 1: !! 88 .cfi_rel_offset $7, 56
89 #else !! 89 .cfi_rel_offset $8, 64
90 #define TRACE_IRQS_OFF !! 90 .cfi_rel_offset $19, 72
91 #define TRACE_IRQS_ON !! 91 .cfi_rel_offset $20, 80
92 #define TRACE_IRQS_OFF_ENTRY !! 92 .cfi_rel_offset $21, 88
93 #define TRACE_IRQS_ON_SYSCALL !! 93 .cfi_rel_offset $22, 96
94 #endif !! 94 .cfi_rel_offset $23, 104
>> 95 .cfi_rel_offset $24, 112
>> 96 .cfi_rel_offset $25, 120
>> 97 .cfi_rel_offset $26, 128
>> 98 .cfi_rel_offset $27, 136
>> 99 .endm
>> 100
>> 101 .macro RESTORE_ALL
>> 102 lda $19, alpha_mv
>> 103 ldq $0, 0($sp)
>> 104 ldq $1, 8($sp)
>> 105 ldq $2, 16($sp)
>> 106 ldq $3, 24($sp)
>> 107 ldq $21, 152($sp)
>> 108 ldq $20, HAE_CACHE($19)
>> 109 ldq $4, 32($sp)
>> 110 ldq $5, 40($sp)
>> 111 ldq $6, 48($sp)
>> 112 ldq $7, 56($sp)
>> 113 subq $20, $21, $20
>> 114 ldq $8, 64($sp)
>> 115 beq $20, 99f
>> 116 ldq $20, HAE_REG($19)
>> 117 stq $21, HAE_CACHE($19)
>> 118 stq $21, 0($20)
>> 119 99: ldq $19, 72($sp)
>> 120 ldq $20, 80($sp)
>> 121 ldq $21, 88($sp)
>> 122 ldq $22, 96($sp)
>> 123 ldq $23, 104($sp)
>> 124 ldq $24, 112($sp)
>> 125 ldq $25, 120($sp)
>> 126 ldq $26, 128($sp)
>> 127 ldq $27, 136($sp)
>> 128 ldq $28, 144($sp)
>> 129 addq $sp, SP_OFF, $sp
>> 130 .cfi_restore $0
>> 131 .cfi_restore $1
>> 132 .cfi_restore $2
>> 133 .cfi_restore $3
>> 134 .cfi_restore $4
>> 135 .cfi_restore $5
>> 136 .cfi_restore $6
>> 137 .cfi_restore $7
>> 138 .cfi_restore $8
>> 139 .cfi_restore $19
>> 140 .cfi_restore $20
>> 141 .cfi_restore $21
>> 142 .cfi_restore $22
>> 143 .cfi_restore $23
>> 144 .cfi_restore $24
>> 145 .cfi_restore $25
>> 146 .cfi_restore $26
>> 147 .cfi_restore $27
>> 148 .cfi_restore $28
>> 149 .cfi_adjust_cfa_offset -SP_OFF
>> 150 .endm
>> 151
>> 152 .macro DO_SWITCH_STACK
>> 153 bsr $1, do_switch_stack
>> 154 .cfi_adjust_cfa_offset SWITCH_STACK_SIZE
>> 155 .cfi_rel_offset $9, 0
>> 156 .cfi_rel_offset $10, 8
>> 157 .cfi_rel_offset $11, 16
>> 158 .cfi_rel_offset $12, 24
>> 159 .cfi_rel_offset $13, 32
>> 160 .cfi_rel_offset $14, 40
>> 161 .cfi_rel_offset $15, 48
>> 162 .endm
>> 163
>> 164 .macro UNDO_SWITCH_STACK
>> 165 bsr $1, undo_switch_stack
>> 166 .cfi_restore $9
>> 167 .cfi_restore $10
>> 168 .cfi_restore $11
>> 169 .cfi_restore $12
>> 170 .cfi_restore $13
>> 171 .cfi_restore $14
>> 172 .cfi_restore $15
>> 173 .cfi_adjust_cfa_offset -SWITCH_STACK_SIZE
>> 174 .endm
95 175
96 /* 176 /*
97 * We need to disable interrupts at beginning !! 177 * Non-syscall kernel entry points.
98 * since interrupt might come in after we've l <<
99 * and overwrite EPC with address somewhere in <<
100 * which is of course wrong! <<
101 */ 178 */
102 179
103 #define RESTORE_ALL !! 180 CFI_START_OSF_FRAME entInt
104 DISABLE_INTERRUPTS(r3,r4) !! 181 SAVE_ALL
105 l.lwz r3,PT_PC(r1) !! 182 lda $8, 0x3fff
106 l.mtspr r0,r3,SPR_EPCR_BASE !! 183 lda $26, ret_from_sys_call
107 l.lwz r3,PT_SR(r1) !! 184 bic $sp, $8, $8
108 l.mtspr r0,r3,SPR_ESR_BASE !! 185 mov $sp, $19
109 l.lwz r2,PT_GPR2(r1) !! 186 jsr $31, do_entInt
110 l.lwz r3,PT_GPR3(r1) !! 187 CFI_END_OSF_FRAME entInt
111 l.lwz r4,PT_GPR4(r1) !! 188
112 l.lwz r5,PT_GPR5(r1) !! 189 CFI_START_OSF_FRAME entArith
113 l.lwz r6,PT_GPR6(r1) !! 190 SAVE_ALL
114 l.lwz r7,PT_GPR7(r1) !! 191 lda $8, 0x3fff
115 l.lwz r8,PT_GPR8(r1) !! 192 lda $26, ret_from_sys_call
116 l.lwz r9,PT_GPR9(r1) !! 193 bic $sp, $8, $8
117 l.lwz r10,PT_GPR10(r1) !! 194 mov $sp, $18
118 l.lwz r11,PT_GPR11(r1) !! 195 jsr $31, do_entArith
119 l.lwz r12,PT_GPR12(r1) !! 196 CFI_END_OSF_FRAME entArith
120 l.lwz r13,PT_GPR13(r1) !! 197
121 l.lwz r14,PT_GPR14(r1) !! 198 CFI_START_OSF_FRAME entMM
122 l.lwz r15,PT_GPR15(r1) !! 199 SAVE_ALL
123 l.lwz r16,PT_GPR16(r1) !! 200 /* save $9 - $15 so the inline exception code can manipulate them. */
124 l.lwz r17,PT_GPR17(r1) !! 201 subq $sp, 56, $sp
125 l.lwz r18,PT_GPR18(r1) !! 202 .cfi_adjust_cfa_offset 56
126 l.lwz r19,PT_GPR19(r1) !! 203 stq $9, 0($sp)
127 l.lwz r20,PT_GPR20(r1) !! 204 stq $10, 8($sp)
128 l.lwz r21,PT_GPR21(r1) !! 205 stq $11, 16($sp)
129 l.lwz r22,PT_GPR22(r1) !! 206 stq $12, 24($sp)
130 l.lwz r23,PT_GPR23(r1) !! 207 stq $13, 32($sp)
131 l.lwz r24,PT_GPR24(r1) !! 208 stq $14, 40($sp)
132 l.lwz r25,PT_GPR25(r1) !! 209 stq $15, 48($sp)
133 l.lwz r26,PT_GPR26(r1) !! 210 .cfi_rel_offset $9, 0
134 l.lwz r27,PT_GPR27(r1) !! 211 .cfi_rel_offset $10, 8
135 l.lwz r28,PT_GPR28(r1) !! 212 .cfi_rel_offset $11, 16
136 l.lwz r29,PT_GPR29(r1) !! 213 .cfi_rel_offset $12, 24
137 l.lwz r30,PT_GPR30(r1) !! 214 .cfi_rel_offset $13, 32
138 l.lwz r31,PT_GPR31(r1) !! 215 .cfi_rel_offset $14, 40
139 l.lwz r1,PT_SP(r1) !! 216 .cfi_rel_offset $15, 48
140 l.rfe !! 217 addq $sp, 56, $19
141 !! 218 /* handle the fault */
142 !! 219 lda $8, 0x3fff
143 #define EXCEPTION_ENTRY(handler) !! 220 bic $sp, $8, $8
144 .global handler !! 221 jsr $26, do_page_fault
145 handler: !! 222 /* reload the registers after the exception code played. */
146 /* r1, EPCR, ESR a already saved */ !! 223 ldq $9, 0($sp)
147 l.sw PT_GPR2(r1),r2 !! 224 ldq $10, 8($sp)
148 l.sw PT_GPR3(r1),r3 !! 225 ldq $11, 16($sp)
149 /* r4 already save */ !! 226 ldq $12, 24($sp)
150 l.sw PT_GPR5(r1),r5 !! 227 ldq $13, 32($sp)
151 l.sw PT_GPR6(r1),r6 !! 228 ldq $14, 40($sp)
152 l.sw PT_GPR7(r1),r7 !! 229 ldq $15, 48($sp)
153 l.sw PT_GPR8(r1),r8 !! 230 addq $sp, 56, $sp
154 l.sw PT_GPR9(r1),r9 !! 231 .cfi_restore $9
155 /* r10 already saved */ !! 232 .cfi_restore $10
156 l.sw PT_GPR11(r1),r11 !! 233 .cfi_restore $11
157 /* r12 already saved */ !! 234 .cfi_restore $12
158 l.sw PT_GPR13(r1),r13 !! 235 .cfi_restore $13
159 l.sw PT_GPR14(r1),r14 !! 236 .cfi_restore $14
160 l.sw PT_GPR15(r1),r15 !! 237 .cfi_restore $15
161 l.sw PT_GPR16(r1),r16 !! 238 .cfi_adjust_cfa_offset -56
162 l.sw PT_GPR17(r1),r17 !! 239 /* finish up the syscall as normal. */
163 l.sw PT_GPR18(r1),r18 !! 240 br ret_from_sys_call
164 l.sw PT_GPR19(r1),r19 !! 241 CFI_END_OSF_FRAME entMM
165 l.sw PT_GPR20(r1),r20 !! 242
166 l.sw PT_GPR21(r1),r21 !! 243 CFI_START_OSF_FRAME entIF
167 l.sw PT_GPR22(r1),r22 !! 244 SAVE_ALL
168 l.sw PT_GPR23(r1),r23 !! 245 lda $8, 0x3fff
169 l.sw PT_GPR24(r1),r24 !! 246 lda $26, ret_from_sys_call
170 l.sw PT_GPR25(r1),r25 !! 247 bic $sp, $8, $8
171 l.sw PT_GPR26(r1),r26 !! 248 mov $sp, $17
172 l.sw PT_GPR27(r1),r27 !! 249 jsr $31, do_entIF
173 l.sw PT_GPR28(r1),r28 !! 250 CFI_END_OSF_FRAME entIF
174 l.sw PT_GPR29(r1),r29 !! 251
175 /* r30 already save */ !! 252 CFI_START_OSF_FRAME entUna
176 l.sw PT_GPR31(r1),r31 !! 253 lda $sp, -256($sp)
177 TRACE_IRQS_OFF_ENTRY !! 254 .cfi_adjust_cfa_offset 256
178 /* Store -1 in orig_gpr11 for non-sysc !! 255 stq $0, 0($sp)
179 l.addi r30,r0,-1 !! 256 .cfi_rel_offset $0, 0
180 l.sw PT_ORIG_GPR11(r1),r30 !! 257 .cfi_remember_state
181 !! 258 ldq $0, 256($sp) /* get PS */
182 #define UNHANDLED_EXCEPTION(handler,vector) !! 259 stq $1, 8($sp)
183 .global handler !! 260 stq $2, 16($sp)
184 handler: !! 261 stq $3, 24($sp)
185 /* r1, EPCR, ESR already saved */ !! 262 and $0, 8, $0 /* user mode? */
186 l.sw PT_GPR2(r1),r2 !! 263 stq $4, 32($sp)
187 l.sw PT_GPR3(r1),r3 !! 264 bne $0, entUnaUser /* yup -> do user-level unaligned fault */
188 l.sw PT_GPR5(r1),r5 !! 265 stq $5, 40($sp)
189 l.sw PT_GPR6(r1),r6 !! 266 stq $6, 48($sp)
190 l.sw PT_GPR7(r1),r7 !! 267 stq $7, 56($sp)
191 l.sw PT_GPR8(r1),r8 !! 268 stq $8, 64($sp)
192 l.sw PT_GPR9(r1),r9 !! 269 stq $9, 72($sp)
193 /* r10 already saved */ !! 270 stq $10, 80($sp)
194 l.sw PT_GPR11(r1),r11 !! 271 stq $11, 88($sp)
195 /* r12 already saved */ !! 272 stq $12, 96($sp)
196 l.sw PT_GPR13(r1),r13 !! 273 stq $13, 104($sp)
197 l.sw PT_GPR14(r1),r14 !! 274 stq $14, 112($sp)
198 l.sw PT_GPR15(r1),r15 !! 275 stq $15, 120($sp)
199 l.sw PT_GPR16(r1),r16 !! 276 /* 16-18 PAL-saved */
200 l.sw PT_GPR17(r1),r17 !! 277 stq $19, 152($sp)
201 l.sw PT_GPR18(r1),r18 !! 278 stq $20, 160($sp)
202 l.sw PT_GPR19(r1),r19 !! 279 stq $21, 168($sp)
203 l.sw PT_GPR20(r1),r20 !! 280 stq $22, 176($sp)
204 l.sw PT_GPR21(r1),r21 !! 281 stq $23, 184($sp)
205 l.sw PT_GPR22(r1),r22 !! 282 stq $24, 192($sp)
206 l.sw PT_GPR23(r1),r23 !! 283 stq $25, 200($sp)
207 l.sw PT_GPR24(r1),r24 !! 284 stq $26, 208($sp)
208 l.sw PT_GPR25(r1),r25 !! 285 stq $27, 216($sp)
209 l.sw PT_GPR26(r1),r26 !! 286 stq $28, 224($sp)
210 l.sw PT_GPR27(r1),r27 !! 287 mov $sp, $19
211 l.sw PT_GPR28(r1),r28 !! 288 stq $gp, 232($sp)
212 l.sw PT_GPR29(r1),r29 !! 289 .cfi_rel_offset $1, 1*8
213 /* r30 already saved */ !! 290 .cfi_rel_offset $2, 2*8
214 l.sw PT_GPR31(r1),r31 !! 291 .cfi_rel_offset $3, 3*8
215 /* Store -1 in orig_gpr11 for non-sysc !! 292 .cfi_rel_offset $4, 4*8
216 l.addi r30,r0,-1 !! 293 .cfi_rel_offset $5, 5*8
217 l.sw PT_ORIG_GPR11(r1),r30 !! 294 .cfi_rel_offset $6, 6*8
218 l.addi r3,r1,0 !! 295 .cfi_rel_offset $7, 7*8
219 /* r4 is exception EA */ !! 296 .cfi_rel_offset $8, 8*8
220 l.addi r5,r0,vector !! 297 .cfi_rel_offset $9, 9*8
221 l.jal unhandled_exception !! 298 .cfi_rel_offset $10, 10*8
222 l.nop !! 299 .cfi_rel_offset $11, 11*8
223 l.j _ret_from_exception !! 300 .cfi_rel_offset $12, 12*8
224 l.nop !! 301 .cfi_rel_offset $13, 13*8
225 !! 302 .cfi_rel_offset $14, 14*8
226 /* clobbers 'reg' */ !! 303 .cfi_rel_offset $15, 15*8
227 #define CLEAR_LWA_FLAG(reg) \ !! 304 .cfi_rel_offset $19, 19*8
228 l.movhi reg,hi(lwa_flag) ;\ !! 305 .cfi_rel_offset $20, 20*8
229 l.ori reg,reg,lo(lwa_flag) ;\ !! 306 .cfi_rel_offset $21, 21*8
230 l.sw 0(reg),r0 !! 307 .cfi_rel_offset $22, 22*8
>> 308 .cfi_rel_offset $23, 23*8
>> 309 .cfi_rel_offset $24, 24*8
>> 310 .cfi_rel_offset $25, 25*8
>> 311 .cfi_rel_offset $26, 26*8
>> 312 .cfi_rel_offset $27, 27*8
>> 313 .cfi_rel_offset $28, 28*8
>> 314 .cfi_rel_offset $29, 29*8
>> 315 lda $8, 0x3fff
>> 316 stq $31, 248($sp)
>> 317 bic $sp, $8, $8
>> 318 jsr $26, do_entUna
>> 319 ldq $0, 0($sp)
>> 320 ldq $1, 8($sp)
>> 321 ldq $2, 16($sp)
>> 322 ldq $3, 24($sp)
>> 323 ldq $4, 32($sp)
>> 324 ldq $5, 40($sp)
>> 325 ldq $6, 48($sp)
>> 326 ldq $7, 56($sp)
>> 327 ldq $8, 64($sp)
>> 328 ldq $9, 72($sp)
>> 329 ldq $10, 80($sp)
>> 330 ldq $11, 88($sp)
>> 331 ldq $12, 96($sp)
>> 332 ldq $13, 104($sp)
>> 333 ldq $14, 112($sp)
>> 334 ldq $15, 120($sp)
>> 335 /* 16-18 PAL-saved */
>> 336 ldq $19, 152($sp)
>> 337 ldq $20, 160($sp)
>> 338 ldq $21, 168($sp)
>> 339 ldq $22, 176($sp)
>> 340 ldq $23, 184($sp)
>> 341 ldq $24, 192($sp)
>> 342 ldq $25, 200($sp)
>> 343 ldq $26, 208($sp)
>> 344 ldq $27, 216($sp)
>> 345 ldq $28, 224($sp)
>> 346 ldq $gp, 232($sp)
>> 347 lda $sp, 256($sp)
>> 348 .cfi_restore $1
>> 349 .cfi_restore $2
>> 350 .cfi_restore $3
>> 351 .cfi_restore $4
>> 352 .cfi_restore $5
>> 353 .cfi_restore $6
>> 354 .cfi_restore $7
>> 355 .cfi_restore $8
>> 356 .cfi_restore $9
>> 357 .cfi_restore $10
>> 358 .cfi_restore $11
>> 359 .cfi_restore $12
>> 360 .cfi_restore $13
>> 361 .cfi_restore $14
>> 362 .cfi_restore $15
>> 363 .cfi_restore $19
>> 364 .cfi_restore $20
>> 365 .cfi_restore $21
>> 366 .cfi_restore $22
>> 367 .cfi_restore $23
>> 368 .cfi_restore $24
>> 369 .cfi_restore $25
>> 370 .cfi_restore $26
>> 371 .cfi_restore $27
>> 372 .cfi_restore $28
>> 373 .cfi_restore $29
>> 374 .cfi_adjust_cfa_offset -256
>> 375 call_pal PAL_rti
>> 376
>> 377 .align 4
>> 378 entUnaUser:
>> 379 .cfi_restore_state
>> 380 ldq $0, 0($sp) /* restore original $0 */
>> 381 lda $sp, 256($sp) /* pop entUna's stack frame */
>> 382 .cfi_restore $0
>> 383 .cfi_adjust_cfa_offset -256
>> 384 SAVE_ALL /* setup normal kernel stack */
>> 385 lda $sp, -56($sp)
>> 386 .cfi_adjust_cfa_offset 56
>> 387 stq $9, 0($sp)
>> 388 stq $10, 8($sp)
>> 389 stq $11, 16($sp)
>> 390 stq $12, 24($sp)
>> 391 stq $13, 32($sp)
>> 392 stq $14, 40($sp)
>> 393 stq $15, 48($sp)
>> 394 .cfi_rel_offset $9, 0
>> 395 .cfi_rel_offset $10, 8
>> 396 .cfi_rel_offset $11, 16
>> 397 .cfi_rel_offset $12, 24
>> 398 .cfi_rel_offset $13, 32
>> 399 .cfi_rel_offset $14, 40
>> 400 .cfi_rel_offset $15, 48
>> 401 lda $8, 0x3fff
>> 402 addq $sp, 56, $19
>> 403 bic $sp, $8, $8
>> 404 jsr $26, do_entUnaUser
>> 405 ldq $9, 0($sp)
>> 406 ldq $10, 8($sp)
>> 407 ldq $11, 16($sp)
>> 408 ldq $12, 24($sp)
>> 409 ldq $13, 32($sp)
>> 410 ldq $14, 40($sp)
>> 411 ldq $15, 48($sp)
>> 412 lda $sp, 56($sp)
>> 413 .cfi_restore $9
>> 414 .cfi_restore $10
>> 415 .cfi_restore $11
>> 416 .cfi_restore $12
>> 417 .cfi_restore $13
>> 418 .cfi_restore $14
>> 419 .cfi_restore $15
>> 420 .cfi_adjust_cfa_offset -56
>> 421 br ret_from_sys_call
>> 422 CFI_END_OSF_FRAME entUna
>> 423
>> 424 CFI_START_OSF_FRAME entDbg
>> 425 SAVE_ALL
>> 426 lda $8, 0x3fff
>> 427 lda $26, ret_from_sys_call
>> 428 bic $sp, $8, $8
>> 429 mov $sp, $16
>> 430 jsr $31, do_entDbg
>> 431 CFI_END_OSF_FRAME entDbg
>> 432
231 /* 433 /*
232 * NOTE: one should never assume that SPR_EPC, !! 434 * The system call entry point is special. Most importantly, it looks
233 * contain the same values as when excep !! 435 * like a function call to userspace as far as clobbered registers. We
234 * occured. in fact they never do. if yo !! 436 * do preserve the argument registers (for syscall restarts) and $26
235 * values saved on stack (for SPR_EPC, S !! 437 * (for leaf syscall functions).
236 * of r4 (for SPR_EEAR). for details loo !! 438 *
237 * in 'arch/openrisc/kernel/head.S' !! 439 * So much for theory. We don't take advantage of this yet.
>> 440 *
>> 441 * Note that a0-a2 are not saved by PALcode as with the other entry points.
238 */ 442 */
239 443
240 /* =========================================== !! 444 .align 4
241 !! 445 .globl entSys
242 /* ---[ 0x100: RESET exception ]-------------- !! 446 .type entSys, @function
243 !! 447 .cfi_startproc simple
244 EXCEPTION_ENTRY(_tng_kernel_start) !! 448 .cfi_return_column 64
245 l.jal _start !! 449 .cfi_def_cfa $sp, 48
246 l.andi r0,r0,0 !! 450 .cfi_rel_offset 64, 8
247 !! 451 .cfi_rel_offset $gp, 16
248 /* ---[ 0x200: BUS exception ]---------------- !! 452 entSys:
249 !! 453 SAVE_ALL
250 EXCEPTION_ENTRY(_bus_fault_handler) !! 454 lda $8, 0x3fff
251 CLEAR_LWA_FLAG(r3) !! 455 bic $sp, $8, $8
252 /* r4: EA of fault (set by EXCEPTION_H !! 456 lda $4, NR_syscalls($31)
253 l.jal do_bus_fault !! 457 stq $16, SP_OFF+24($sp)
254 l.addi r3,r1,0 /* pt_regs */ !! 458 lda $5, sys_call_table
255 !! 459 lda $27, sys_ni_syscall
256 l.j _ret_from_exception !! 460 cmpult $0, $4, $4
257 l.nop !! 461 ldl $3, TI_FLAGS($8)
258 !! 462 stq $17, SP_OFF+32($sp)
259 /* ---[ 0x300: Data Page Fault exception ]---- !! 463 s8addq $0, $5, $5
260 EXCEPTION_ENTRY(_dtlb_miss_page_fault_handler) !! 464 stq $18, SP_OFF+40($sp)
261 CLEAR_LWA_FLAG(r3) !! 465 .cfi_rel_offset $16, SP_OFF+24
262 l.and r5,r5,r0 !! 466 .cfi_rel_offset $17, SP_OFF+32
263 l.j 1f !! 467 .cfi_rel_offset $18, SP_OFF+40
264 l.nop !! 468 #ifdef CONFIG_AUDITSYSCALL
265 !! 469 lda $6, _TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT
266 EXCEPTION_ENTRY(_data_page_fault_handler) !! 470 and $3, $6, $3
267 CLEAR_LWA_FLAG(r3) !! 471 bne $3, strace
268 /* set up parameters for do_page_fault <<
269 l.ori r5,r0,0x300 // <<
270 1: <<
271 l.addi r3,r1,0 // <<
272 /* r4 set be EXCEPTION_HANDLE */ // <<
273 <<
274 #ifdef CONFIG_OPENRISC_NO_SPR_SR_DSX <<
275 l.lwz r6,PT_PC(r3) // <<
276 l.lwz r6,0(r6) // <<
277 <<
278 l.srli r6,r6,26 // <<
279 l.sfeqi r6,0 // <<
280 l.bf 8f <<
281 l.sfeqi r6,1 // <<
282 l.bf 8f <<
283 l.sfeqi r6,3 // <<
284 l.bf 8f <<
285 l.sfeqi r6,4 // <<
286 l.bf 8f <<
287 l.sfeqi r6,0x11 // <<
288 l.bf 8f <<
289 l.sfeqi r6,0x12 // <<
290 l.bf 8f <<
291 l.nop <<
292 <<
293 l.j 9f <<
294 l.nop <<
295 <<
296 8: // offending insn is in delay slot <<
297 l.lwz r6,PT_PC(r3) // <<
298 l.addi r6,r6,4 <<
299 l.lwz r6,0(r6) // <<
300 l.srli r6,r6,26 // <<
301 9: // offending instruction opcode loaded in r <<
302 <<
303 #else 472 #else
304 !! 473 blbs $3, strace /* check for SYSCALL_TRACE in disguise */
305 l.mfspr r6,r0,SPR_SR // <<
306 l.andi r6,r6,SPR_SR_DSX // <<
307 l.sfne r6,r0 // <<
308 l.bnf 7f <<
309 l.lwz r6,PT_PC(r3) // <<
310 <<
311 l.addi r6,r6,4 // <<
312 7: <<
313 l.lwz r6,0(r6) // <<
314 l.srli r6,r6,26 // <<
315 #endif <<
316 <<
317 l.sfgeui r6,0x33 // <<
318 l.bnf 1f <<
319 l.sfleui r6,0x37 <<
320 l.bnf 1f <<
321 l.ori r6,r0,0x1 // <<
322 l.j 2f <<
323 l.nop <<
324 1: l.ori r6,r0,0x0 // <<
325 2: <<
326 <<
327 /* call fault.c handler in openrisc/mm <<
328 l.jal do_page_fault <<
329 l.nop <<
330 l.j _ret_from_exception <<
331 l.nop <<
332 <<
333 /* ---[ 0x400: Insn Page Fault exception ]---- <<
334 EXCEPTION_ENTRY(_itlb_miss_page_fault_handler) <<
335 CLEAR_LWA_FLAG(r3) <<
336 l.and r5,r5,r0 <<
337 l.j 1f <<
338 l.nop <<
339 <<
340 EXCEPTION_ENTRY(_insn_page_fault_handler) <<
341 CLEAR_LWA_FLAG(r3) <<
342 /* set up parameters for do_page_fault <<
343 l.ori r5,r0,0x400 // <<
344 1: <<
345 l.addi r3,r1,0 // <<
346 /* r4 set be EXCEPTION_HANDLE */ // <<
347 l.ori r6,r0,0x0 // <<
348 <<
349 /* call fault.c handler in openrisc/mm <<
350 l.jal do_page_fault <<
351 l.nop <<
352 l.j _ret_from_exception <<
353 l.nop <<
354 <<
355 <<
356 /* ---[ 0x500: Timer exception ]-------------- <<
357 <<
358 EXCEPTION_ENTRY(_timer_handler) <<
359 CLEAR_LWA_FLAG(r3) <<
360 l.jal timer_interrupt <<
361 l.addi r3,r1,0 /* pt_regs */ <<
362 <<
363 l.j _ret_from_intr <<
364 l.nop <<
365 <<
366 /* ---[ 0x600: Alignment exception ]---------- <<
367 <<
368 EXCEPTION_ENTRY(_alignment_handler) <<
369 CLEAR_LWA_FLAG(r3) <<
370 /* r4: EA of fault (set by EXCEPTION_H <<
371 l.jal do_unaligned_access <<
372 l.addi r3,r1,0 /* pt_regs */ <<
373 <<
374 l.j _ret_from_exception <<
375 l.nop <<
376 <<
377 #if 0 <<
378 EXCEPTION_ENTRY(_alignment_handler) <<
379 // l.mfspr r2,r0,SPR_EEAR_BASE /* L <<
380 l.addi r2,r4,0 <<
381 // l.mfspr r5,r0,SPR_EPCR_BASE /* L <<
382 l.lwz r5,PT_PC(r1) <<
383 <<
384 l.lwz r3,0(r5) /* Loa <<
385 l.srli r4,r3,26 /* Shi <<
386 <<
387 l.sfeqi r4,0x00 /* Che <<
388 l.bf jmp <<
389 l.sfeqi r4,0x01 <<
390 l.bf jmp <<
391 l.sfeqi r4,0x03 <<
392 l.bf jmp <<
393 l.sfeqi r4,0x04 <<
394 l.bf jmp <<
395 l.sfeqi r4,0x11 <<
396 l.bf jr <<
397 l.sfeqi r4,0x12 <<
398 l.bf jr <<
399 l.nop <<
400 l.j 1f <<
401 l.addi r5,r5,4 /* Inc <<
402 <<
403 jmp: <<
404 l.slli r4,r3,6 /* Get <<
405 l.srai r4,r4,4 <<
406 <<
407 l.lwz r3,4(r5) /* Loa <<
408 <<
409 l.add r5,r5,r4 /* Cal <<
410 <<
411 l.j 1f <<
412 l.srli r4,r3,26 /* Shi <<
413 <<
414 jr: <<
415 l.slli r4,r3,9 /* Shi <<
416 l.andi r4,r4,0x7c <<
417 <<
418 l.lwz r3,4(r5) /* Loa <<
419 <<
420 l.add r4,r4,r1 /* Loa <<
421 l.lwz r5,0(r4) <<
422 <<
423 l.srli r4,r3,26 /* Shi <<
424 <<
425 <<
426 1: <<
427 // l.mtspr r0,r5,SPR_EPCR_BASE <<
428 l.sw PT_PC(r1),r5 <<
429 <<
430 l.sfeqi r4,0x26 <<
431 l.bf lhs <<
432 l.sfeqi r4,0x25 <<
433 l.bf lhz <<
434 l.sfeqi r4,0x22 <<
435 l.bf lws <<
436 l.sfeqi r4,0x21 <<
437 l.bf lwz <<
438 l.sfeqi r4,0x37 <<
439 l.bf sh <<
440 l.sfeqi r4,0x35 <<
441 l.bf sw <<
442 l.nop <<
443 <<
444 1: l.j 1b /* I d <<
445 l.nop <<
446 <<
447 lhs: l.lbs r5,0(r2) <<
448 l.slli r5,r5,8 <<
449 l.lbz r6,1(r2) <<
450 l.or r5,r5,r6 <<
451 l.srli r4,r3,19 <<
452 l.andi r4,r4,0x7c <<
453 l.add r4,r4,r1 <<
454 l.j align_end <<
455 l.sw 0(r4),r5 <<
456 <<
457 lhz: l.lbz r5,0(r2) <<
458 l.slli r5,r5,8 <<
459 l.lbz r6,1(r2) <<
460 l.or r5,r5,r6 <<
461 l.srli r4,r3,19 <<
462 l.andi r4,r4,0x7c <<
463 l.add r4,r4,r1 <<
464 l.j align_end <<
465 l.sw 0(r4),r5 <<
466 <<
467 lws: l.lbs r5,0(r2) <<
468 l.slli r5,r5,24 <<
469 l.lbz r6,1(r2) <<
470 l.slli r6,r6,16 <<
471 l.or r5,r5,r6 <<
472 l.lbz r6,2(r2) <<
473 l.slli r6,r6,8 <<
474 l.or r5,r5,r6 <<
475 l.lbz r6,3(r2) <<
476 l.or r5,r5,r6 <<
477 l.srli r4,r3,19 <<
478 l.andi r4,r4,0x7c <<
479 l.add r4,r4,r1 <<
480 l.j align_end <<
481 l.sw 0(r4),r5 <<
482 <<
483 lwz: l.lbz r5,0(r2) <<
484 l.slli r5,r5,24 <<
485 l.lbz r6,1(r2) <<
486 l.slli r6,r6,16 <<
487 l.or r5,r5,r6 <<
488 l.lbz r6,2(r2) <<
489 l.slli r6,r6,8 <<
490 l.or r5,r5,r6 <<
491 l.lbz r6,3(r2) <<
492 l.or r5,r5,r6 <<
493 l.srli r4,r3,19 <<
494 l.andi r4,r4,0x7c <<
495 l.add r4,r4,r1 <<
496 l.j align_end <<
497 l.sw 0(r4),r5 <<
498 <<
499 sh: <<
500 l.srli r4,r3,9 <<
501 l.andi r4,r4,0x7c <<
502 l.add r4,r4,r1 <<
503 l.lwz r5,0(r4) <<
504 l.sb 1(r2),r5 <<
505 l.srli r5,r5,8 <<
506 l.j align_end <<
507 l.sb 0(r2),r5 <<
508 <<
509 sw: <<
510 l.srli r4,r3,9 <<
511 l.andi r4,r4,0x7c <<
512 l.add r4,r4,r1 <<
513 l.lwz r5,0(r4) <<
514 l.sb 3(r2),r5 <<
515 l.srli r5,r5,8 <<
516 l.sb 2(r2),r5 <<
517 l.srli r5,r5,8 <<
518 l.sb 1(r2),r5 <<
519 l.srli r5,r5,8 <<
520 l.j align_end <<
521 l.sb 0(r2),r5 <<
522 <<
523 align_end: <<
524 l.j _ret_from_intr <<
525 l.nop <<
526 #endif <<
527 <<
528 /* ---[ 0x700: Illegal insn exception ]------- <<
529 <<
530 EXCEPTION_ENTRY(_illegal_instruction_handler) <<
531 /* r4: EA of fault (set by EXCEPTION_H <<
532 l.jal do_illegal_instruction <<
533 l.addi r3,r1,0 /* pt_regs */ <<
534 <<
535 l.j _ret_from_exception <<
536 l.nop <<
537 <<
538 /* ---[ 0x800: External interrupt exception ]- <<
539 <<
540 EXCEPTION_ENTRY(_external_irq_handler) <<
541 #ifdef CONFIG_OPENRISC_ESR_EXCEPTION_BUG_CHECK <<
542 l.lwz r4,PT_SR(r1) // wer <<
543 l.andi r4,r4,SPR_SR_IEE <<
544 l.sfeqi r4,0 <<
545 l.bnf 1f // ext <<
546 l.nop <<
547 <<
548 #ifdef CONFIG_PRINTK <<
549 l.addi r1,r1,-0x8 <<
550 l.movhi r3,hi(42f) <<
551 l.ori r3,r3,lo(42f) <<
552 l.sw 0x0(r1),r3 <<
553 l.jal _printk <<
554 l.sw 0x4(r1),r4 <<
555 l.addi r1,r1,0x8 <<
556 <<
557 .section .rodata, "a" <<
558 42: <<
559 .string "\n\rESR interrupt bug <<
560 .align 4 <<
561 .previous <<
562 #endif <<
563 <<
564 l.ori r4,r4,SPR_SR_IEE // fix <<
565 // l.sw PT_SR(r1),r4 <<
566 1: <<
567 #endif 474 #endif
568 CLEAR_LWA_FLAG(r3) !! 475 beq $4, 1f
569 l.addi r3,r1,0 !! 476 ldq $27, 0($5)
570 l.movhi r8,hi(generic_handle_arch_irq) !! 477 1: jsr $26, ($27), sys_ni_syscall
571 l.ori r8,r8,lo(generic_handle_arch_i !! 478 ldgp $gp, 0($26)
572 l.jalr r8 !! 479 blt $0, $syscall_error /* the call failed */
573 l.nop !! 480 $ret_success:
574 l.j _ret_from_intr !! 481 stq $0, 0($sp)
575 l.nop !! 482 stq $31, 72($sp) /* a3=0 => no error */
576 !! 483
577 /* ---[ 0x900: DTLB miss exception ]---------- !! 484 .align 4
578 !! 485 .globl ret_from_sys_call
579 !! 486 ret_from_sys_call:
580 /* ---[ 0xa00: ITLB miss exception ]---------- !! 487 cmovne $26, 0, $18 /* $18 = 0 => non-restartable */
581 !! 488 ldq $0, SP_OFF($sp)
582 !! 489 and $0, 8, $0
583 /* ---[ 0xb00: Range exception ]-------------- !! 490 beq $0, ret_to_kernel
>> 491 ret_to_user:
>> 492 /* Make sure need_resched and sigpending don't change between
>> 493 sampling and the rti. */
>> 494 lda $16, 7
>> 495 call_pal PAL_swpipl
>> 496 ldl $17, TI_FLAGS($8)
>> 497 and $17, _TIF_WORK_MASK, $2
>> 498 bne $2, work_pending
>> 499 restore_all:
>> 500 ldl $2, TI_STATUS($8)
>> 501 and $2, TS_SAVED_FP | TS_RESTORE_FP, $3
>> 502 bne $3, restore_fpu
>> 503 restore_other:
>> 504 .cfi_remember_state
>> 505 RESTORE_ALL
>> 506 call_pal PAL_rti
584 507
585 UNHANDLED_EXCEPTION(_vector_0xb00,0xb00) !! 508 ret_to_kernel:
>> 509 .cfi_restore_state
>> 510 lda $16, 7
>> 511 call_pal PAL_swpipl
>> 512 br restore_other
586 513
587 /* ---[ 0xc00: Syscall exception ]------------ !! 514 .align 3
>> 515 $syscall_error:
>> 516 /*
>> 517 * Some system calls (e.g., ptrace) can return arbitrary
>> 518 * values which might normally be mistaken as error numbers.
>> 519 * Those functions must zero $0 (v0) directly in the stack
>> 520 * frame to indicate that a negative return value wasn't an
>> 521 * error number..
>> 522 */
>> 523 ldq $18, 0($sp) /* old syscall nr (zero if success) */
>> 524 beq $18, $ret_success
>> 525
>> 526 ldq $19, 72($sp) /* .. and this a3 */
>> 527 subq $31, $0, $0 /* with error in v0 */
>> 528 addq $31, 1, $1 /* set a3 for errno return */
>> 529 stq $0, 0($sp)
>> 530 mov $31, $26 /* tell "ret_from_sys_call" we can restart */
>> 531 stq $1, 72($sp) /* a3 for return */
>> 532 br ret_from_sys_call
588 533
589 /* 534 /*
590 * Syscalls are a special type of exception in !! 535 * Do all cleanup when returning from all interrupts and system calls.
591 * _explicitly_ invoked by userspace and can t !! 536 *
592 * held to conform to the same ABI as normal f !! 537 * Arguments:
593 * respect to whether registers are preserved !! 538 * $8: current.
594 * or not. !! 539 * $17: TI_FLAGS.
595 */ !! 540 * $18: The old syscall number, or zero if this is not a return
596 !! 541 * from a syscall that errored and is possibly restartable.
597 /* Upon syscall entry we just save the callee- !! 542 * $19: The old a3 value
598 * and not the call-clobbered ones. <<
599 */ 543 */
600 544
601 _string_syscall_return: !! 545 .align 4
602 .string "syscall r9:0x%08x -> syscall( !! 546 .type work_pending, @function
603 .align 4 !! 547 work_pending:
>> 548 and $17, _TIF_NOTIFY_RESUME | _TIF_SIGPENDING | _TIF_NOTIFY_SIGNAL, $2
>> 549 bne $2, $work_notifysig
604 550
605 ENTRY(_sys_call_handler) !! 551 $work_resched:
606 /* r1, EPCR, ESR a already saved */ <<
607 l.sw PT_GPR2(r1),r2 <<
608 /* r3-r8 must be saved because syscall <<
609 * on us being able to restart the sys <<
610 * they should be clobbered, otherwise <<
611 */ <<
612 l.sw PT_GPR3(r1),r3 <<
613 /* 552 /*
614 * r4 already saved !! 553 * We can get here only if we returned from syscall without SIGPENDING
615 * r4 holds the EEAR address of the fa !! 554 * or got through work_notifysig already. Either case means no syscall
616 * then load the original r4 !! 555 * restarts for us, so let $18 and $19 burn.
617 */ !! 556 */
618 CLEAR_LWA_FLAG(r4) !! 557 jsr $26, schedule
619 l.lwz r4,PT_GPR4(r1) !! 558 mov 0, $18
620 l.sw PT_GPR5(r1),r5 !! 559 br ret_to_user
621 l.sw PT_GPR6(r1),r6 !! 560
622 l.sw PT_GPR7(r1),r7 !! 561 $work_notifysig:
623 l.sw PT_GPR8(r1),r8 !! 562 mov $sp, $16
624 l.sw PT_GPR9(r1),r9 !! 563 DO_SWITCH_STACK
625 /* r10 already saved */ !! 564 jsr $26, do_work_pending
626 l.sw PT_GPR11(r1),r11 !! 565 UNDO_SWITCH_STACK
627 /* orig_gpr11 must be set for syscalls !! 566 br restore_all
628 l.sw PT_ORIG_GPR11(r1),r11 <<
629 /* r12,r13 already saved */ <<
630 <<
631 /* r14-r28 (even) aren't touched by th <<
632 * so we don't need to save them. How <<
633 * to userspace via a call to switch() <<
634 * switch() effectively clobbers them. <<
635 * such functions is handled in their <<
636 * and clone, below). <<
637 <<
638 /* r30 is the only register we clobber <<
639 /* r30 already saved */ <<
640 /* l.sw PT_GPR30(r1),r30 */ <<
641 <<
642 _syscall_check_trace_enter: <<
643 /* syscalls run with interrupts enable <<
644 TRACE_IRQS_ON_SYSCALL <<
645 ENABLE_INTERRUPTS(r29) // ena <<
646 <<
647 /* If TIF_SYSCALL_TRACE is set, then w <<
648 l.lwz r30,TI_FLAGS(r10) <<
649 l.andi r30,r30,_TIF_SYSCALL_TRACE <<
650 l.sfne r30,r0 <<
651 l.bf _syscall_trace_enter <<
652 l.nop <<
653 <<
654 _syscall_check: <<
655 /* Ensure that the syscall number is r <<
656 l.sfgeui r11,__NR_syscalls <<
657 l.bf _syscall_badsys <<
658 l.nop <<
659 <<
660 _syscall_call: <<
661 l.movhi r29,hi(sys_call_table) <<
662 l.ori r29,r29,lo(sys_call_table) <<
663 l.slli r11,r11,2 <<
664 l.add r29,r29,r11 <<
665 l.lwz r29,0(r29) <<
666 <<
667 l.jalr r29 <<
668 l.nop <<
669 <<
670 _syscall_return: <<
671 /* All syscalls return here... just pa <<
672 * which does it in a round-about way. <<
673 */ <<
674 l.sw PT_GPR11(r1),r11 // <<
675 567
676 #if 0 !! 568 /*
677 _syscall_debug: !! 569 * PTRACE syscall handler
678 l.movhi r3,hi(_string_syscall_return) <<
679 l.ori r3,r3,lo(_string_syscall_retur <<
680 l.ori r27,r0,2 <<
681 l.sw -4(r1),r27 <<
682 l.sw -8(r1),r11 <<
683 l.lwz r29,PT_ORIG_GPR11(r1) <<
684 l.sw -12(r1),r29 <<
685 l.lwz r29,PT_GPR9(r1) <<
686 l.sw -16(r1),r29 <<
687 l.movhi r27,hi(_printk) <<
688 l.ori r27,r27,lo(_printk) <<
689 l.jalr r27 <<
690 l.addi r1,r1,-16 <<
691 l.addi r1,r1,16 <<
692 #endif <<
693 #if 0 <<
694 _syscall_show_regs: <<
695 l.movhi r27,hi(show_registers) <<
696 l.ori r27,r27,lo(show_registers) <<
697 l.jalr r27 <<
698 l.or r3,r1,r1 <<
699 #endif <<
700 <<
701 _syscall_check_trace_leave: <<
702 /* r30 is a callee-saved register so t <<
703 * _TIF_SYSCALL_TRACE flag from _sysca <<
704 * _syscall_trace_leave expects syscal <<
705 */ <<
706 l.sfne r30,r0 <<
707 l.bf _syscall_trace_leave <<
708 l.nop <<
709 <<
710 /* This is where the exception-return code beg <<
711 * disabled the rest of the way here because w <<
712 * interrupts that set NEED_RESCHED or SIGNALP <<
713 <<
714 _syscall_check_work: <<
715 /* Here we need to disable interrupts <<
716 DISABLE_INTERRUPTS(r27,r29) <<
717 TRACE_IRQS_OFF <<
718 l.lwz r30,TI_FLAGS(r10) <<
719 l.andi r30,r30,_TIF_WORK_MASK <<
720 l.sfne r30,r0 <<
721 <<
722 l.bnf _syscall_resume_userspace <<
723 l.nop <<
724 <<
725 /* Work pending follows a different re <<
726 * make sure that all the call-saved r <<
727 * before branching... <<
728 */ <<
729 l.sw PT_GPR14(r1),r14 <<
730 l.sw PT_GPR16(r1),r16 <<
731 l.sw PT_GPR18(r1),r18 <<
732 l.sw PT_GPR20(r1),r20 <<
733 l.sw PT_GPR22(r1),r22 <<
734 l.sw PT_GPR24(r1),r24 <<
735 l.sw PT_GPR26(r1),r26 <<
736 l.sw PT_GPR28(r1),r28 <<
737 <<
738 /* _work_pending needs to be called wi <<
739 l.j _work_pending <<
740 l.nop <<
741 <<
742 _syscall_resume_userspace: <<
743 // ENABLE_INTERRUPTS(r29) <<
744 <<
745 <<
746 /* This is the hot path for returning to users <<
747 * work to be done and the branch to _work_pen <<
748 * return to userspace will be done via the no <<
749 * that path restores _all_ registers and will <<
750 * registers with whatever garbage is in pt_re <<
751 * registers are clobbered anyway and because <<
752 * in the context of the extra work that _work <<
753 <<
754 /* Once again, syscalls are special and only g <<
755 * same registers as a normal function call */ <<
756 <<
757 /* The assumption here is that the registers r <<
758 * don't need to be restored... be sure that t <<
759 */ <<
760 <<
761 /* This is still too much... we should only be <<
762 * clobbered... we should even be using 'scrat <<
763 * we don't need to restore anything, hardly.. <<
764 */ 570 */
765 571
766 l.lwz r2,PT_GPR2(r1) !! 572 .align 4
767 !! 573 .type strace, @function
768 /* Restore args */ !! 574 strace:
769 /* r3-r8 are technically clobbered, bu !! 575 /* set up signal stack, call syscall_trace */
770 * to be restored... !! 576 // NB: if anyone adds preemption, this block will need to be protected
771 */ !! 577 ldl $1, TI_STATUS($8)
772 l.lwz r3,PT_GPR3(r1) !! 578 and $1, TS_SAVED_FP, $3
773 l.lwz r4,PT_GPR4(r1) !! 579 or $1, TS_SAVED_FP, $2
774 l.lwz r5,PT_GPR5(r1) !! 580 bne $3, 1f
775 l.lwz r6,PT_GPR6(r1) !! 581 stl $2, TI_STATUS($8)
776 l.lwz r7,PT_GPR7(r1) !! 582 bsr $26, __save_fpu
777 l.lwz r8,PT_GPR8(r1) <<
778 <<
779 l.lwz r9,PT_GPR9(r1) <<
780 l.lwz r10,PT_GPR10(r1) <<
781 l.lwz r11,PT_GPR11(r1) <<
782 <<
783 /* r30 is the only register we clobber <<
784 l.lwz r30,PT_GPR30(r1) <<
785 <<
786 /* Here we use r13-r19 (odd) as scratc <<
787 l.lwz r13,PT_PC(r1) <<
788 l.lwz r15,PT_SR(r1) <<
789 l.lwz r1,PT_SP(r1) <<
790 /* Interrupts need to be disabled for <<
791 * so that another interrupt doesn't c <<
792 * them before we can use them for our <<
793 DISABLE_INTERRUPTS(r17,r19) <<
794 l.mtspr r0,r13,SPR_EPCR_BASE <<
795 l.mtspr r0,r15,SPR_ESR_BASE <<
796 l.rfe <<
797 <<
798 /* End of hot path! <<
799 * Keep the below tracing and error handling o <<
800 */ <<
801 <<
802 _syscall_trace_enter: <<
803 /* Here we pass pt_regs to do_syscall_ <<
804 * that function is really getting all <<
805 * pt_regs isn't a complete set of use <<
806 * ones relevant to the syscall... <<
807 * <<
808 * Note use of delay slot for setting <<
809 */ <<
810 l.jal do_syscall_trace_enter <<
811 l.addi r3,r1,0 <<
812 <<
813 /* Restore arguments (not preserved ac <<
814 * so that we can do the syscall for r <<
815 * hot path. <<
816 */ <<
817 l.lwz r11,PT_GPR11(r1) <<
818 l.lwz r3,PT_GPR3(r1) <<
819 l.lwz r4,PT_GPR4(r1) <<
820 l.lwz r5,PT_GPR5(r1) <<
821 l.lwz r6,PT_GPR6(r1) <<
822 l.lwz r7,PT_GPR7(r1) <<
823 <<
824 l.j _syscall_check <<
825 l.lwz r8,PT_GPR8(r1) <<
826 <<
827 _syscall_trace_leave: <<
828 l.jal do_syscall_trace_leave <<
829 l.addi r3,r1,0 <<
830 <<
831 l.j _syscall_check_work <<
832 l.nop <<
833 <<
834 _syscall_badsys: <<
835 /* Here we effectively pretend to have <<
836 * syscall that returns -ENOSYS and th <<
837 * syscall hot path. <<
838 * Note that "return value" is set in <<
839 */ <<
840 l.j _syscall_return <<
841 l.addi r11,r0,-ENOSYS <<
842 <<
843 /******* END SYSCALL HANDLING *******/ <<
844 <<
845 /* ---[ 0xd00: Floating Point exception ]----- <<
846 <<
847 EXCEPTION_ENTRY(_fpe_trap_handler) <<
848 CLEAR_LWA_FLAG(r3) <<
849 <<
850 /* r4: EA of fault (set by EXCEPTION_H <<
851 l.jal do_fpe_trap <<
852 l.addi r3,r1,0 /* pt_regs */ <<
853 <<
854 l.j _ret_from_exception <<
855 l.nop <<
856 <<
857 /* ---[ 0xe00: Trap exception ]--------------- <<
858 <<
859 EXCEPTION_ENTRY(_trap_handler) <<
860 CLEAR_LWA_FLAG(r3) <<
861 /* r4: EA of fault (set by EXCEPTION_H <<
862 l.jal do_trap <<
863 l.addi r3,r1,0 /* pt_regs */ <<
864 <<
865 l.j _ret_from_exception <<
866 l.nop <<
867 <<
868 /* ---[ 0xf00: Reserved exception ]----------- <<
869 <<
870 UNHANDLED_EXCEPTION(_vector_0xf00,0xf00) <<
871 <<
872 /* ---[ 0x1000: Reserved exception ]---------- <<
873 <<
874 UNHANDLED_EXCEPTION(_vector_0x1000,0x1000) <<
875 <<
876 /* ---[ 0x1100: Reserved exception ]---------- <<
877 <<
878 UNHANDLED_EXCEPTION(_vector_0x1100,0x1100) <<
879 <<
880 /* ---[ 0x1200: Reserved exception ]---------- <<
881 <<
882 UNHANDLED_EXCEPTION(_vector_0x1200,0x1200) <<
883 <<
884 /* ---[ 0x1300: Reserved exception ]---------- <<
885 <<
886 UNHANDLED_EXCEPTION(_vector_0x1300,0x1300) <<
887 <<
888 /* ---[ 0x1400: Reserved exception ]---------- <<
889 <<
890 UNHANDLED_EXCEPTION(_vector_0x1400,0x1400) <<
891 <<
892 /* ---[ 0x1500: Reserved exception ]---------- <<
893 <<
894 UNHANDLED_EXCEPTION(_vector_0x1500,0x1500) <<
895 <<
896 /* ---[ 0x1600: Reserved exception ]---------- <<
897 <<
898 UNHANDLED_EXCEPTION(_vector_0x1600,0x1600) <<
899 <<
900 /* ---[ 0x1700: Reserved exception ]---------- <<
901 <<
902 UNHANDLED_EXCEPTION(_vector_0x1700,0x1700) <<
903 <<
904 /* ---[ 0x1800: Reserved exception ]---------- <<
905 <<
906 UNHANDLED_EXCEPTION(_vector_0x1800,0x1800) <<
907 <<
908 /* ---[ 0x1900: Reserved exception ]---------- <<
909 <<
910 UNHANDLED_EXCEPTION(_vector_0x1900,0x1900) <<
911 <<
912 /* ---[ 0x1a00: Reserved exception ]---------- <<
913 <<
914 UNHANDLED_EXCEPTION(_vector_0x1a00,0x1a00) <<
915 <<
916 /* ---[ 0x1b00: Reserved exception ]---------- <<
917 <<
918 UNHANDLED_EXCEPTION(_vector_0x1b00,0x1b00) <<
919 <<
920 /* ---[ 0x1c00: Reserved exception ]---------- <<
921 <<
922 UNHANDLED_EXCEPTION(_vector_0x1c00,0x1c00) <<
923 <<
924 /* ---[ 0x1d00: Reserved exception ]---------- <<
925 <<
926 UNHANDLED_EXCEPTION(_vector_0x1d00,0x1d00) <<
927 <<
928 /* ---[ 0x1e00: Reserved exception ]---------- <<
929 <<
930 UNHANDLED_EXCEPTION(_vector_0x1e00,0x1e00) <<
931 <<
932 /* ---[ 0x1f00: Reserved exception ]---------- <<
933 <<
934 UNHANDLED_EXCEPTION(_vector_0x1f00,0x1f00) <<
935 <<
936 /* =========================================== <<
937 <<
938 _resume_userspace: <<
939 DISABLE_INTERRUPTS(r3,r4) <<
940 TRACE_IRQS_OFF <<
941 l.lwz r4,TI_FLAGS(r10) <<
942 l.andi r13,r4,_TIF_WORK_MASK <<
943 l.sfeqi r13,0 <<
944 l.bf _restore_all <<
945 l.nop <<
946 <<
947 _work_pending: <<
948 l.lwz r5,PT_ORIG_GPR11(r1) <<
949 l.sfltsi r5,0 <<
950 l.bnf 1f <<
951 l.nop <<
952 l.andi r5,r5,0 <<
953 1: <<
954 l.jal do_work_pending <<
955 l.ori r3,r1,0 /* pt_ <<
956 <<
957 l.sfeqi r11,0 <<
958 l.bf _restore_all <<
959 l.nop <<
960 l.sfltsi r11,0 <<
961 l.bnf 1f <<
962 l.nop <<
963 l.and r11,r11,r0 <<
964 l.ori r11,r11,__NR_restart_syscall <<
965 l.j _syscall_check_trace_enter <<
966 l.nop <<
967 1: <<
968 l.lwz r11,PT_ORIG_GPR11(r1) <<
969 /* Restore arg registers */ <<
970 l.lwz r3,PT_GPR3(r1) <<
971 l.lwz r4,PT_GPR4(r1) <<
972 l.lwz r5,PT_GPR5(r1) <<
973 l.lwz r6,PT_GPR6(r1) <<
974 l.lwz r7,PT_GPR7(r1) <<
975 l.j _syscall_check_trace_enter <<
976 l.lwz r8,PT_GPR8(r1) <<
977 <<
978 _restore_all: <<
979 #ifdef CONFIG_TRACE_IRQFLAGS <<
980 l.lwz r4,PT_SR(r1) <<
981 l.andi r3,r4,(SPR_SR_IEE|SPR_SR_TEE) <<
982 l.sfeq r3,r0 /* skip trace <<
983 l.bf skip_hardirqs_on <<
984 l.nop <<
985 TRACE_IRQS_ON <<
986 skip_hardirqs_on: <<
987 #endif <<
988 RESTORE_ALL <<
989 /* This returns to userspace code */ <<
990 <<
991 <<
992 ENTRY(_ret_from_intr) <<
993 ENTRY(_ret_from_exception) <<
994 l.lwz r4,PT_SR(r1) <<
995 l.andi r3,r4,SPR_SR_SM <<
996 l.sfeqi r3,0 <<
997 l.bnf _restore_all <<
998 l.nop <<
999 l.j _resume_userspace <<
1000 l.nop <<
1001 <<
1002 ENTRY(ret_from_fork) <<
1003 l.jal schedule_tail <<
1004 l.nop <<
1005 <<
1006 /* Check if we are a kernel thread */ <<
1007 l.sfeqi r20,0 <<
1008 l.bf 1f <<
1009 l.nop <<
1010 <<
1011 /* ...we are a kernel thread so invok <<
1012 l.jalr r20 <<
1013 l.or r3,r22,r0 <<
1014 <<
1015 1: 583 1:
1016 /* _syscall_returns expect r11 to con !! 584 DO_SWITCH_STACK
1017 l.lwz r11,PT_GPR11(r1) !! 585 jsr $26, syscall_trace_enter /* returns the syscall number */
1018 !! 586 UNDO_SWITCH_STACK
1019 /* The syscall fast path return expec !! 587
1020 * r14-r28 to be untouched, so we res !! 588 /* get the arguments back.. */
1021 * will have been effectively clobber !! 589 ldq $16, SP_OFF+24($sp)
1022 * via the call to switch() !! 590 ldq $17, SP_OFF+32($sp)
1023 */ !! 591 ldq $18, SP_OFF+40($sp)
1024 l.lwz r14,PT_GPR14(r1) !! 592 ldq $19, 72($sp)
1025 l.lwz r16,PT_GPR16(r1) !! 593 ldq $20, 80($sp)
1026 l.lwz r18,PT_GPR18(r1) !! 594 ldq $21, 88($sp)
1027 l.lwz r20,PT_GPR20(r1) !! 595
1028 l.lwz r22,PT_GPR22(r1) !! 596 /* get the system call pointer.. */
1029 l.lwz r24,PT_GPR24(r1) !! 597 lda $1, NR_syscalls($31)
1030 l.lwz r26,PT_GPR26(r1) !! 598 lda $2, sys_call_table
1031 l.lwz r28,PT_GPR28(r1) !! 599 lda $27, sys_ni_syscall
1032 !! 600 cmpult $0, $1, $1
1033 l.j _syscall_return !! 601 s8addq $0, $2, $2
1034 l.nop !! 602 beq $1, 1f
1035 !! 603 ldq $27, 0($2)
1036 /* ========================================== !! 604 1: jsr $26, ($27), sys_gettimeofday
1037 !! 605 ret_from_straced:
>> 606 ldgp $gp, 0($26)
>> 607
>> 608 /* check return.. */
>> 609 blt $0, $strace_error /* the call failed */
>> 610 $strace_success:
>> 611 stq $31, 72($sp) /* a3=0 => no error */
>> 612 stq $0, 0($sp) /* save return value */
>> 613
>> 614 DO_SWITCH_STACK
>> 615 jsr $26, syscall_trace_leave
>> 616 UNDO_SWITCH_STACK
>> 617 br $31, ret_from_sys_call
>> 618
>> 619 .align 3
>> 620 $strace_error:
>> 621 ldq $18, 0($sp) /* old syscall nr (zero if success) */
>> 622 beq $18, $strace_success
>> 623 ldq $19, 72($sp) /* .. and this a3 */
>> 624
>> 625 subq $31, $0, $0 /* with error in v0 */
>> 626 addq $31, 1, $1 /* set a3 for errno return */
>> 627 stq $0, 0($sp)
>> 628 stq $1, 72($sp) /* a3 for return */
>> 629
>> 630 DO_SWITCH_STACK
>> 631 mov $18, $9 /* save old syscall number */
>> 632 mov $19, $10 /* save old a3 */
>> 633 jsr $26, syscall_trace_leave
>> 634 mov $9, $18
>> 635 mov $10, $19
>> 636 UNDO_SWITCH_STACK
>> 637
>> 638 mov $31, $26 /* tell "ret_from_sys_call" we can restart */
>> 639 br ret_from_sys_call
>> 640 CFI_END_OSF_FRAME entSys
>> 641
1038 /* 642 /*
1039 * This routine switches between two differen !! 643 * Save and restore the switch stack -- aka the balance of the user context.
1040 * state of one is saved on its kernel stack. <<
1041 * of the other is restored from its kernel s <<
1042 * management hardware is updated to the seco <<
1043 * Finally, we can return to the second proce <<
1044 * <<
1045 * Note: there are two ways to get to the "go <<
1046 * of this code; either by coming in via the <<
1047 * or via "fork" which must set up an environ <<
1048 * to the "_switch" path. If you change this <<
1049 * SAVE_REGS macro), you'll have to change th <<
1050 */ 644 */
1051 645
>> 646 .align 4
>> 647 .type do_switch_stack, @function
>> 648 .cfi_startproc simple
>> 649 .cfi_return_column 64
>> 650 .cfi_def_cfa $sp, 0
>> 651 .cfi_register 64, $1
>> 652 do_switch_stack:
>> 653 lda $sp, -SWITCH_STACK_SIZE($sp)
>> 654 .cfi_adjust_cfa_offset SWITCH_STACK_SIZE
>> 655 stq $9, 0($sp)
>> 656 stq $10, 8($sp)
>> 657 stq $11, 16($sp)
>> 658 stq $12, 24($sp)
>> 659 stq $13, 32($sp)
>> 660 stq $14, 40($sp)
>> 661 stq $15, 48($sp)
>> 662 stq $26, 56($sp)
>> 663 ret $31, ($1), 1
>> 664 .cfi_endproc
>> 665 .size do_switch_stack, .-do_switch_stack
>> 666
>> 667 .align 4
>> 668 .type undo_switch_stack, @function
>> 669 .cfi_startproc simple
>> 670 .cfi_def_cfa $sp, 0
>> 671 .cfi_register 64, $1
>> 672 undo_switch_stack:
>> 673 ldq $9, 0($sp)
>> 674 ldq $10, 8($sp)
>> 675 ldq $11, 16($sp)
>> 676 ldq $12, 24($sp)
>> 677 ldq $13, 32($sp)
>> 678 ldq $14, 40($sp)
>> 679 ldq $15, 48($sp)
>> 680 ldq $26, 56($sp)
>> 681 lda $sp, SWITCH_STACK_SIZE($sp)
>> 682 ret $31, ($1), 1
>> 683 .cfi_endproc
>> 684 .size undo_switch_stack, .-undo_switch_stack
>> 685
>> 686 #define FR(n) n * 8 + TI_FP($8)
>> 687 .align 4
>> 688 .globl __save_fpu
>> 689 .type __save_fpu, @function
>> 690 __save_fpu:
>> 691 #define V(n) stt $f##n, FR(n)
>> 692 V( 0); V( 1); V( 2); V( 3)
>> 693 V( 4); V( 5); V( 6); V( 7)
>> 694 V( 8); V( 9); V(10); V(11)
>> 695 V(12); V(13); V(14); V(15)
>> 696 V(16); V(17); V(18); V(19)
>> 697 V(20); V(21); V(22); V(23)
>> 698 V(24); V(25); V(26); V(27)
>> 699 mf_fpcr $f0 # get fpcr
>> 700 V(28); V(29); V(30)
>> 701 stt $f0, FR(31) # save fpcr in slot of $f31
>> 702 ldt $f0, FR(0) # don't let "__save_fpu" change fp state.
>> 703 ret
>> 704 #undef V
>> 705 .size __save_fpu, .-__save_fpu
>> 706
>> 707 .align 4
>> 708 restore_fpu:
>> 709 and $3, TS_RESTORE_FP, $3
>> 710 bic $2, TS_SAVED_FP | TS_RESTORE_FP, $2
>> 711 beq $3, 1f
>> 712 #define V(n) ldt $f##n, FR(n)
>> 713 ldt $f30, FR(31) # get saved fpcr
>> 714 V( 0); V( 1); V( 2); V( 3)
>> 715 mt_fpcr $f30 # install saved fpcr
>> 716 V( 4); V( 5); V( 6); V( 7)
>> 717 V( 8); V( 9); V(10); V(11)
>> 718 V(12); V(13); V(14); V(15)
>> 719 V(16); V(17); V(18); V(19)
>> 720 V(20); V(21); V(22); V(23)
>> 721 V(24); V(25); V(26); V(27)
>> 722 V(28); V(29); V(30)
>> 723 1: stl $2, TI_STATUS($8)
>> 724 br restore_other
>> 725 #undef V
1052 726
1053 /* _switch MUST never lay on page boundry, ca !! 727
1054 * effective addresses and beeing interrupted !! 728 /*
1055 * dTLB miss seems to never accour in the bad !! 729 * The meat of the context switch code.
1056 * are from task structures which are always <<
1057 * <<
1058 * The problem happens in RESTORE_ALL where w <<
1059 * register, then load the previous register <<
1060 * the l.rfe instruction. If get TLB miss in <<
1061 * garbled and we end up calling l.rfe with t <<
1062 * holds for ESR) <<
1063 * <<
1064 * To avoid this problems it is sufficient to <<
1065 * some nice round number smaller than it's s <<
1066 */ 730 */
>> 731 .align 4
>> 732 .globl alpha_switch_to
>> 733 .type alpha_switch_to, @function
>> 734 .cfi_startproc
>> 735 alpha_switch_to:
>> 736 DO_SWITCH_STACK
>> 737 ldl $1, TI_STATUS($8)
>> 738 and $1, TS_RESTORE_FP, $3
>> 739 bne $3, 1f
>> 740 or $1, TS_RESTORE_FP | TS_SAVED_FP, $2
>> 741 and $1, TS_SAVED_FP, $3
>> 742 stl $2, TI_STATUS($8)
>> 743 bne $3, 1f
>> 744 bsr $26, __save_fpu
>> 745 1:
>> 746 call_pal PAL_swpctx
>> 747 lda $8, 0x3fff
>> 748 UNDO_SWITCH_STACK
>> 749 bic $sp, $8, $8
>> 750 mov $17, $0
>> 751 ret
>> 752 .cfi_endproc
>> 753 .size alpha_switch_to, .-alpha_switch_to
1067 754
1068 /* ABI rules apply here... we either enter _s !! 755 /*
1069 * an imaginary call to which we shall return !! 756 * New processes begin life here.
1070 * way, we are a function call and only need <<
1071 * registers when we return. As such, we don <<
1072 * on the stack that we won't be returning as <<
1073 */ 757 */
1074 758
1075 .align 0x400 !! 759 .globl ret_from_fork
1076 ENTRY(_switch) !! 760 .align 4
1077 /* We don't store SR as _switch only !! 761 .ent ret_from_fork
1078 * the SR will be the same going in a !! 762 ret_from_fork:
1079 !! 763 lda $26, ret_to_user
1080 /* Set up new pt_regs struct for savi !! 764 mov $17, $16
1081 l.addi r1,r1,-(INT_FRAME_SIZE) !! 765 jmp $31, schedule_tail
1082 !! 766 .end ret_from_fork
1083 /* No need to store r1/PT_SP as it go <<
1084 l.sw PT_GPR2(r1),r2 <<
1085 l.sw PT_GPR9(r1),r9 <<
1086 <<
1087 /* Save callee-saved registers to the <<
1088 l.sw PT_GPR14(r1),r14 <<
1089 l.sw PT_GPR16(r1),r16 <<
1090 l.sw PT_GPR18(r1),r18 <<
1091 l.sw PT_GPR20(r1),r20 <<
1092 l.sw PT_GPR22(r1),r22 <<
1093 l.sw PT_GPR24(r1),r24 <<
1094 l.sw PT_GPR26(r1),r26 <<
1095 l.sw PT_GPR28(r1),r28 <<
1096 l.sw PT_GPR30(r1),r30 <<
1097 <<
1098 l.addi r11,r10,0 <<
1099 <<
1100 /* We use thread_info->ksp for storin <<
1101 * structure so that we can get back <<
1102 * to lose the value of thread_info-> <<
1103 * pt_regs->sp so that we can easily <<
1104 * live again... <<
1105 */ <<
1106 <<
1107 /* Save the old value of thread_info- <<
1108 l.lwz r29,TI_KSP(r10) <<
1109 l.sw PT_SP(r1),r29 <<
1110 <<
1111 /* Swap kernel stack pointers */ <<
1112 l.sw TI_KSP(r10),r1 <<
1113 l.or r10,r4,r0 <<
1114 l.lwz r1,TI_KSP(r10) <<
1115 <<
1116 /* Restore the old value of thread_in <<
1117 l.lwz r29,PT_SP(r1) <<
1118 l.sw TI_KSP(r10),r29 <<
1119 <<
1120 /* ...and restore the registers, exce <<
1121 * has already been set above. <<
1122 */ <<
1123 l.lwz r2,PT_GPR2(r1) <<
1124 l.lwz r9,PT_GPR9(r1) <<
1125 /* No need to restore r10 */ <<
1126 /* ...and do not restore r11 */ <<
1127 <<
1128 /* Restore callee-saved registers */ <<
1129 l.lwz r14,PT_GPR14(r1) <<
1130 l.lwz r16,PT_GPR16(r1) <<
1131 l.lwz r18,PT_GPR18(r1) <<
1132 l.lwz r20,PT_GPR20(r1) <<
1133 l.lwz r22,PT_GPR22(r1) <<
1134 l.lwz r24,PT_GPR24(r1) <<
1135 l.lwz r26,PT_GPR26(r1) <<
1136 l.lwz r28,PT_GPR28(r1) <<
1137 l.lwz r30,PT_GPR30(r1) <<
1138 <<
1139 /* Unwind stack to pre-switch state * <<
1140 l.addi r1,r1,(INT_FRAME_SIZE) <<
1141 <<
1142 /* Return via the link-register back <<
1143 * that may be either schedule(), ret <<
1144 * ret_from_kernel_thread(). If we a <<
1145 * we are expected to have set up the <<
1146 * hence we do so here unconditionall <<
1147 */ <<
1148 l.lwz r3,TI_TASK(r3) /* Lo <<
1149 l.jr r9 <<
1150 l.nop <<
1151 <<
1152 /* ========================================== <<
1153 <<
1154 /* These all use the delay slot for setting t <<
1155 * jump is always happening after the l.addi <<
1156 * <<
1157 * These are all just wrappers that don't tou <<
1158 * return from the "real" syscall function wi <<
1159 * code that did the l.jal that brought us he <<
1160 */ <<
1161 767
1162 /* fork requires that we save all the callee- !! 768 /*
1163 * are all effectively clobbered by the call !! 769 * ... and new kernel threads - here
1164 * all the registers that aren't touched by t <<
1165 * weren't saved there. <<
1166 */ 770 */
>> 771 .align 4
>> 772 .globl ret_from_kernel_thread
>> 773 .ent ret_from_kernel_thread
>> 774 ret_from_kernel_thread:
>> 775 mov $17, $16
>> 776 jsr $26, schedule_tail
>> 777 mov $9, $27
>> 778 mov $10, $16
>> 779 jsr $26, ($9)
>> 780 br $31, ret_to_user
>> 781 .end ret_from_kernel_thread
1167 782
1168 _fork_save_extra_regs_and_call: !! 783
1169 l.sw PT_GPR14(r1),r14 !! 784 /*
1170 l.sw PT_GPR16(r1),r16 !! 785 * Special system calls. Most of these are special in that they either
1171 l.sw PT_GPR18(r1),r18 !! 786 * have to play switch_stack games.
1172 l.sw PT_GPR20(r1),r20 <<
1173 l.sw PT_GPR22(r1),r22 <<
1174 l.sw PT_GPR24(r1),r24 <<
1175 l.sw PT_GPR26(r1),r26 <<
1176 l.jr r29 <<
1177 l.sw PT_GPR28(r1),r28 <<
1178 <<
1179 ENTRY(__sys_clone) <<
1180 l.movhi r29,hi(sys_clone) <<
1181 l.j _fork_save_extra_regs_and_cal <<
1182 l.ori r29,r29,lo(sys_clone) <<
1183 <<
1184 ENTRY(__sys_clone3) <<
1185 l.movhi r29,hi(sys_clone3) <<
1186 l.j _fork_save_extra_regs_and_cal <<
1187 l.ori r29,r29,lo(sys_clone3) <<
1188 <<
1189 ENTRY(__sys_fork) <<
1190 l.movhi r29,hi(sys_fork) <<
1191 l.j _fork_save_extra_regs_and_cal <<
1192 l.ori r29,r29,lo(sys_fork) <<
1193 <<
1194 ENTRY(sys_rt_sigreturn) <<
1195 l.jal _sys_rt_sigreturn <<
1196 l.addi r3,r1,0 <<
1197 l.sfne r30,r0 <<
1198 l.bnf _no_syscall_trace <<
1199 l.nop <<
1200 l.jal do_syscall_trace_leave <<
1201 l.addi r3,r1,0 <<
1202 _no_syscall_trace: <<
1203 l.j _resume_userspace <<
1204 l.nop <<
1205 <<
1206 /* This is a catch-all syscall for atomic ins <<
1207 * The functions takes a variable number of p <<
1208 * particular flavour of atomic you want... p <<
1209 * the atomic in question. Currently, this f <<
1210 * following variants: <<
1211 * <<
1212 * XCHG: <<
1213 * @flag: 1 <<
1214 * @ptr1: <<
1215 * @ptr2: <<
1216 * Atomically exchange the values in pointers <<
1217 * <<
1218 */ 787 */
1219 788
1220 ENTRY(sys_or1k_atomic) !! 789 .macro fork_like name
1221 /* FIXME: This ignores r3 and always !! 790 .align 4
1222 DISABLE_INTERRUPTS(r17,r19) !! 791 .globl alpha_\name
1223 l.lwz r29,0(r4) !! 792 .ent alpha_\name
1224 l.lwz r27,0(r5) !! 793 alpha_\name:
1225 l.sw 0(r4),r27 !! 794 .prologue 0
1226 l.sw 0(r5),r29 !! 795 bsr $1, do_switch_stack
1227 ENABLE_INTERRUPTS(r17) !! 796 // NB: if anyone adds preemption, this block will need to be protected
1228 l.jr r9 !! 797 ldl $1, TI_STATUS($8)
1229 l.or r11,r0,r0 !! 798 and $1, TS_SAVED_FP, $3
1230 !! 799 or $1, TS_SAVED_FP, $2
1231 /* ========================================== !! 800 bne $3, 1f
>> 801 stl $2, TI_STATUS($8)
>> 802 bsr $26, __save_fpu
>> 803 1:
>> 804 jsr $26, sys_\name
>> 805 ldq $26, 56($sp)
>> 806 lda $sp, SWITCH_STACK_SIZE($sp)
>> 807 ret
>> 808 .end alpha_\name
>> 809 .endm
>> 810
>> 811 fork_like fork
>> 812 fork_like vfork
>> 813 fork_like clone
>> 814 fork_like clone3
>> 815
>> 816 .macro sigreturn_like name
>> 817 .align 4
>> 818 .globl sys_\name
>> 819 .ent sys_\name
>> 820 sys_\name:
>> 821 .prologue 0
>> 822 lda $9, ret_from_straced
>> 823 cmpult $26, $9, $9
>> 824 lda $sp, -SWITCH_STACK_SIZE($sp)
>> 825 jsr $26, do_\name
>> 826 bne $9, 1f
>> 827 jsr $26, syscall_trace_leave
>> 828 1: br $1, undo_switch_stack
>> 829 br ret_from_sys_call
>> 830 .end sys_\name
>> 831 .endm
>> 832
>> 833 sigreturn_like sigreturn
>> 834 sigreturn_like rt_sigreturn
>> 835
>> 836 .align 4
>> 837 .globl alpha_syscall_zero
>> 838 .ent alpha_syscall_zero
>> 839 alpha_syscall_zero:
>> 840 .prologue 0
>> 841 /* Special because it needs to do something opposite to
>> 842 force_successful_syscall_return(). We use the saved
>> 843 syscall number for that, zero meaning "not an error".
>> 844 That works nicely, but for real syscall 0 we need to
>> 845 make sure that this logics doesn't get confused.
>> 846 Store a non-zero there - -ENOSYS we need in register
>> 847 for our return value will do just fine.
>> 848 */
>> 849 lda $0, -ENOSYS
>> 850 unop
>> 851 stq $0, 0($sp)
>> 852 ret
>> 853 .end alpha_syscall_zero
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