1 /* SPDX-License-Identifier: GPL-2.0-or-later * !! 1 #include <asm/asm-offsets.h>
2 /* !! 2 #include <asm/thread_info.h>
3 * OpenRISC vmlinux.lds.S <<
4 * <<
5 * Linux architectural port borrowing liberall <<
6 * others. All original copyrights apply as p <<
7 * declaration. <<
8 * <<
9 * Modifications for the OpenRISC architecture <<
10 * Copyright (C) 2003 Matjaz Breskvar <phoenix@ <<
11 * Copyright (C) 2010-2011 Jonas Bonn <jonas@so <<
12 * <<
13 * ld script for OpenRISC architecture <<
14 */ <<
15 3
16 /* TODO !! 4 #define PAGE_SIZE _PAGE_SIZE
17 * - clean up __offset & stuff <<
18 * - change all 8192 alignment to <<
19 * - recheck if all alignments ar <<
20 */ <<
21 5
22 # define LOAD_OFFSET PAGE_OFFSET !! 6 /*
23 # define LOAD_BASE PAGE_OFFSET !! 7 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
>> 8 * ensure that it has .bss alignment (64K).
>> 9 */
>> 10 #define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
24 11
25 #include <asm/page.h> <<
26 #include <asm/cache.h> <<
27 #include <asm/thread_info.h> <<
28 #include <asm-generic/vmlinux.lds.h> 12 #include <asm-generic/vmlinux.lds.h>
29 13
30 #ifdef __OR1K__ !! 14 #undef mips
31 #define __OUTPUT_FORMAT "elf32-or1k" !! 15 #define mips mips
>> 16 OUTPUT_ARCH(mips)
>> 17 ENTRY(kernel_entry)
>> 18 PHDRS {
>> 19 text PT_LOAD FLAGS(7); /* RWX */
>> 20 #ifndef CONFIG_CAVIUM_OCTEON_SOC
>> 21 note PT_NOTE FLAGS(4); /* R__ */
>> 22 #endif /* CAVIUM_OCTEON_SOC */
>> 23 }
>> 24
>> 25 #ifdef CONFIG_32BIT
>> 26 #ifdef CONFIG_CPU_LITTLE_ENDIAN
>> 27 jiffies = jiffies_64;
>> 28 #else
>> 29 jiffies = jiffies_64 + 4;
>> 30 #endif
32 #else 31 #else
33 #define __OUTPUT_FORMAT "elf32-or32" !! 32 jiffies = jiffies_64;
34 #endif 33 #endif
35 34
36 OUTPUT_FORMAT(__OUTPUT_FORMAT, __OUTPUT_FORMAT <<
37 jiffies = jiffies_64 + 4; <<
38 <<
39 SECTIONS 35 SECTIONS
40 { 36 {
41 /* Read-only sections, merged into tex !! 37 #ifdef CONFIG_BOOT_ELF64
42 . = LOAD_BASE ; !! 38 /* Read-only sections, merged into text segment: */
43 !! 39 /* . = 0xc000000000000000; */
44 _text = .; !! 40
45 !! 41 /* This is the value for an Origin kernel, taken from an IRIX kernel. */
46 /* _s_kernel_ro must be page aligned * !! 42 /* . = 0xc00000000001c000; */
47 . = ALIGN(PAGE_SIZE); !! 43
48 _s_kernel_ro = .; !! 44 /* Set the vaddr for the text segment to a value
49 !! 45 * >= 0xa800 0000 0001 9000 if no symmon is going to configured
50 .text : AT(ADDR(.tex !! 46 * >= 0xa800 0000 0030 0000 otherwise
51 { <<
52 _stext = .; <<
53 TEXT_TEXT <<
54 SCHED_TEXT <<
55 LOCK_TEXT <<
56 KPROBES_TEXT <<
57 IRQENTRY_TEXT <<
58 SOFTIRQENTRY_TEXT <<
59 *(.fixup) <<
60 *(.text.__*) <<
61 _etext = .; <<
62 } <<
63 /* TODO: Check if fixup and text.__* a <<
64 * fixup is definitely necessary <<
65 */ 47 */
66 48
67 _sdata = .; !! 49 /* . = 0xa800000000300000; */
68 !! 50 . = 0xffffffff80300000;
69 /* Page alignment required for RO_DATA !! 51 #endif
70 RO_DATA(PAGE_SIZE) !! 52 . = VMLINUX_LOAD_ADDRESS;
71 _e_kernel_ro = .; !! 53 /* read-only */
72 !! 54 _text = .; /* Text and read-only data */
73 /* Whatever comes after _e_kernel_ro h !! 55 .text : {
74 !! 56 TEXT_TEXT
75 /* 32 here is cacheline size... rechec !! 57 SCHED_TEXT
76 RW_DATA(32, PAGE_SIZE, PAGE_SIZE) !! 58 LOCK_TEXT
77 !! 59 KPROBES_TEXT
78 _edata = .; !! 60 IRQENTRY_TEXT
>> 61 *(.text.*)
>> 62 *(.fixup)
>> 63 *(.gnu.warning)
>> 64 } :text = 0
>> 65 _etext = .; /* End of text section */
>> 66
>> 67 EXCEPTION_TABLE(16)
>> 68
>> 69 /* Exception table for data bus errors */
>> 70 __dbe_table : {
>> 71 __start___dbe_table = .;
>> 72 *(__dbe_table)
>> 73 __stop___dbe_table = .;
>> 74 }
79 75
80 EXCEPTION_TABLE(4) !! 76 #ifdef CONFIG_CAVIUM_OCTEON_SOC
>> 77 #define NOTES_HEADER
>> 78 #else /* CONFIG_CAVIUM_OCTEON_SOC */
>> 79 #define NOTES_HEADER :note
>> 80 #endif /* CONFIG_CAVIUM_OCTEON_SOC */
>> 81 NOTES :text NOTES_HEADER
>> 82 .dummy : { *(.dummy) } :text
>> 83
>> 84 _sdata = .; /* Start of data section */
>> 85 RODATA
>> 86
>> 87 /* writeable */
>> 88 .data : { /* Data */
>> 89 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
>> 90
>> 91 INIT_TASK_DATA(THREAD_SIZE)
>> 92 NOSAVE_DATA
>> 93 PAGE_ALIGNED_DATA(PAGE_SIZE)
>> 94 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
>> 95 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
>> 96 DATA_DATA
>> 97 CONSTRUCTORS
>> 98 }
>> 99 _gp = . + 0x8000;
>> 100 .lit8 : {
>> 101 *(.lit8)
>> 102 }
>> 103 .lit4 : {
>> 104 *(.lit4)
>> 105 }
>> 106 /* We want the small data sections together, so single-instruction offsets
>> 107 can access them all, and initialized data all before uninitialized, so
>> 108 we can shorten the on-disk segment size. */
>> 109 .sdata : {
>> 110 *(.sdata)
>> 111 }
>> 112 _edata = .; /* End of data section */
81 113
82 /* Init code and data */ !! 114 /* will be freed after init */
83 . = ALIGN(PAGE_SIZE); !! 115 . = ALIGN(PAGE_SIZE); /* Init code and data */
84 __init_begin = .; 116 __init_begin = .;
85 <<
86 HEAD_TEXT_SECTION <<
87 <<
88 /* Page aligned */ <<
89 INIT_TEXT_SECTION(PAGE_SIZE) 117 INIT_TEXT_SECTION(PAGE_SIZE)
90 <<
91 /* Align __setup_start on 16 byte boun <<
92 INIT_DATA_SECTION(16) 118 INIT_DATA_SECTION(16)
93 119
94 PERCPU_SECTION(L1_CACHE_BYTES) !! 120 . = ALIGN(4);
95 !! 121 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
96 __init_end = .; !! 122 __mips_machines_start = .;
>> 123 *(.mips.machines.init)
>> 124 __mips_machines_end = .;
>> 125 }
97 126
98 BSS_SECTION(0, 0, 0x20) !! 127 /* .exit.text is discarded at runtime, not link time, to deal with
>> 128 * references from .rodata
>> 129 */
>> 130 .exit.text : {
>> 131 EXIT_TEXT
>> 132 }
>> 133 .exit.data : {
>> 134 EXIT_DATA
>> 135 }
>> 136 #ifdef CONFIG_SMP
>> 137 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
>> 138 #endif
>> 139 #ifdef CONFIG_MIPS_RAW_APPENDED_DTB
>> 140 __appended_dtb = .;
>> 141 /* leave space for appended DTB */
>> 142 . += 0x100000;
>> 143 #elif defined(CONFIG_MIPS_ELF_APPENDED_DTB)
>> 144 .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
>> 145 *(.appended_dtb)
>> 146 KEEP(*(.appended_dtb))
>> 147 }
>> 148 #endif
>> 149 /*
>> 150 * Align to 64K in attempt to eliminate holes before the
>> 151 * .bss..swapper_pg_dir section at the start of .bss. This
>> 152 * also satisfies PAGE_SIZE alignment as the largest page size
>> 153 * allowed is 64K.
>> 154 */
>> 155 . = ALIGN(0x10000);
>> 156 __init_end = .;
>> 157 /* freed after init ends here */
>> 158
>> 159 /*
>> 160 * Force .bss to 64K alignment so that .bss..swapper_pg_dir
>> 161 * gets that alignment. .sbss should be empty, so there will be
>> 162 * no holes after __init_end. */
>> 163 BSS_SECTION(0, 0x10000, 8)
>> 164
>> 165 _end = . ;
>> 166
>> 167 /* These mark the ABI of the kernel for debuggers. */
>> 168 .mdebug.abi32 : {
>> 169 KEEP(*(.mdebug.abi32))
>> 170 }
>> 171 .mdebug.abi64 : {
>> 172 KEEP(*(.mdebug.abi64))
>> 173 }
99 174
100 _end = .; !! 175 /* This is the MIPS specific mdebug section. */
>> 176 .mdebug : {
>> 177 *(.mdebug)
>> 178 }
101 179
102 /* Throw in the debugging sections */ <<
103 STABS_DEBUG 180 STABS_DEBUG
104 DWARF_DEBUG 181 DWARF_DEBUG
105 ELF_DETAILS <<
106 182
107 /* Sections to be discarded -- must be !! 183 /* These must appear regardless of . */
>> 184 .gptab.sdata : {
>> 185 *(.gptab.data)
>> 186 *(.gptab.sdata)
>> 187 }
>> 188 .gptab.sbss : {
>> 189 *(.gptab.bss)
>> 190 *(.gptab.sbss)
>> 191 }
>> 192
>> 193 /* Sections to be discarded */
108 DISCARDS 194 DISCARDS
>> 195 /DISCARD/ : {
>> 196 /* ABI crap starts here */
>> 197 *(.MIPS.abiflags)
>> 198 *(.MIPS.options)
>> 199 *(.options)
>> 200 *(.pdr)
>> 201 *(.reginfo)
>> 202 *(.eh_frame)
>> 203 }
109 } 204 }
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