1 /* SPDX-License-Identifier: GPL-2.0-or-later * !! 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* !! 2 #include <asm/asm-offsets.h>
3 * OpenRISC vmlinux.lds.S !! 3 #include <asm/thread_info.h>
4 * <<
5 * Linux architectural port borrowing liberall <<
6 * others. All original copyrights apply as p <<
7 * declaration. <<
8 * <<
9 * Modifications for the OpenRISC architecture <<
10 * Copyright (C) 2003 Matjaz Breskvar <phoenix@ <<
11 * Copyright (C) 2010-2011 Jonas Bonn <jonas@so <<
12 * <<
13 * ld script for OpenRISC architecture <<
14 */ <<
15 4
16 /* TODO !! 5 #define PAGE_SIZE _PAGE_SIZE
17 * - clean up __offset & stuff !! 6
18 * - change all 8192 alignment to !! 7 /*
19 * - recheck if all alignments ar !! 8 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
>> 9 * ensure that it has .bss alignment (64K).
20 */ 10 */
>> 11 #define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
21 12
22 # define LOAD_OFFSET PAGE_OFFSET !! 13 /* Cavium Octeon should not have a separate PT_NOTE Program Header. */
23 # define LOAD_BASE PAGE_OFFSET !! 14 #ifndef CONFIG_CAVIUM_OCTEON_SOC
>> 15 #define EMITS_PT_NOTE
>> 16 #endif
24 17
25 #include <asm/page.h> <<
26 #include <asm/cache.h> <<
27 #include <asm/thread_info.h> <<
28 #include <asm-generic/vmlinux.lds.h> 18 #include <asm-generic/vmlinux.lds.h>
29 19
30 #ifdef __OR1K__ !! 20 #undef mips
31 #define __OUTPUT_FORMAT "elf32-or1k" !! 21 #define mips mips
>> 22 OUTPUT_ARCH(mips)
>> 23 ENTRY(kernel_entry)
>> 24 PHDRS {
>> 25 text PT_LOAD FLAGS(7); /* RWX */
>> 26 #ifndef CONFIG_CAVIUM_OCTEON_SOC
>> 27 note PT_NOTE FLAGS(4); /* R__ */
>> 28 #endif /* CAVIUM_OCTEON_SOC */
>> 29 }
>> 30
>> 31 #ifdef CONFIG_32BIT
>> 32 #ifdef CONFIG_CPU_LITTLE_ENDIAN
>> 33 jiffies = jiffies_64;
>> 34 #else
>> 35 jiffies = jiffies_64 + 4;
>> 36 #endif
32 #else 37 #else
33 #define __OUTPUT_FORMAT "elf32-or32" !! 38 jiffies = jiffies_64;
34 #endif 39 #endif
35 40
36 OUTPUT_FORMAT(__OUTPUT_FORMAT, __OUTPUT_FORMAT <<
37 jiffies = jiffies_64 + 4; <<
38 <<
39 SECTIONS 41 SECTIONS
40 { 42 {
41 /* Read-only sections, merged into tex !! 43 #ifdef CONFIG_BOOT_ELF64
42 . = LOAD_BASE ; !! 44 /* Read-only sections, merged into text segment: */
43 !! 45 /* . = 0xc000000000000000; */
44 _text = .; !! 46
45 !! 47 /* This is the value for an Origin kernel, taken from an IRIX kernel. */
46 /* _s_kernel_ro must be page aligned * !! 48 /* . = 0xc00000000001c000; */
47 . = ALIGN(PAGE_SIZE); !! 49
48 _s_kernel_ro = .; !! 50 /* Set the vaddr for the text segment to a value
49 !! 51 * >= 0xa800 0000 0001 9000 if no symmon is going to configured
50 .text : AT(ADDR(.tex !! 52 * >= 0xa800 0000 0030 0000 otherwise
51 { <<
52 _stext = .; <<
53 TEXT_TEXT <<
54 SCHED_TEXT <<
55 LOCK_TEXT <<
56 KPROBES_TEXT <<
57 IRQENTRY_TEXT <<
58 SOFTIRQENTRY_TEXT <<
59 *(.fixup) <<
60 *(.text.__*) <<
61 _etext = .; <<
62 } <<
63 /* TODO: Check if fixup and text.__* a <<
64 * fixup is definitely necessary <<
65 */ 53 */
66 54
67 _sdata = .; !! 55 /* . = 0xa800000000300000; */
68 !! 56 . = 0xffffffff80300000;
69 /* Page alignment required for RO_DATA !! 57 #endif
70 RO_DATA(PAGE_SIZE) !! 58 . = LINKER_LOAD_ADDRESS;
71 _e_kernel_ro = .; !! 59 /* read-only */
72 !! 60 _text = .; /* Text and read-only data */
73 /* Whatever comes after _e_kernel_ro h !! 61 .text : {
74 !! 62 TEXT_TEXT
75 /* 32 here is cacheline size... rechec !! 63 SCHED_TEXT
76 RW_DATA(32, PAGE_SIZE, PAGE_SIZE) !! 64 CPUIDLE_TEXT
>> 65 LOCK_TEXT
>> 66 KPROBES_TEXT
>> 67 IRQENTRY_TEXT
>> 68 SOFTIRQENTRY_TEXT
>> 69 *(.text.*)
>> 70 *(.fixup)
>> 71 *(.gnu.warning)
>> 72 } :text = 0
>> 73 _etext = .; /* End of text section */
>> 74
>> 75 EXCEPTION_TABLE(16)
>> 76
>> 77 /* Exception table for data bus errors */
>> 78 __dbe_table : {
>> 79 __start___dbe_table = .;
>> 80 KEEP(*(__dbe_table))
>> 81 __stop___dbe_table = .;
>> 82 }
77 83
78 _edata = .; !! 84 _sdata = .; /* Start of data section */
>> 85 RO_DATA(4096)
79 86
80 EXCEPTION_TABLE(4) !! 87 /* writeable */
>> 88 .data : { /* Data */
>> 89 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
>> 90
>> 91 INIT_TASK_DATA(THREAD_SIZE)
>> 92 NOSAVE_DATA
>> 93 PAGE_ALIGNED_DATA(PAGE_SIZE)
>> 94 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
>> 95 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
>> 96 DATA_DATA
>> 97 CONSTRUCTORS
>> 98 }
>> 99 BUG_TABLE
>> 100 _gp = . + 0x8000;
>> 101 .lit8 : {
>> 102 *(.lit8)
>> 103 }
>> 104 .lit4 : {
>> 105 *(.lit4)
>> 106 }
>> 107 /* We want the small data sections together, so single-instruction offsets
>> 108 can access them all, and initialized data all before uninitialized, so
>> 109 we can shorten the on-disk segment size. */
>> 110 .sdata : {
>> 111 *(.sdata)
>> 112 }
>> 113 _edata = .; /* End of data section */
81 114
82 /* Init code and data */ !! 115 /* will be freed after init */
83 . = ALIGN(PAGE_SIZE); !! 116 . = ALIGN(PAGE_SIZE); /* Init code and data */
84 __init_begin = .; 117 __init_begin = .;
>> 118 INIT_TEXT_SECTION(PAGE_SIZE)
>> 119 INIT_DATA_SECTION(16)
85 120
86 HEAD_TEXT_SECTION !! 121 . = ALIGN(4);
>> 122 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
>> 123 __mips_machines_start = .;
>> 124 KEEP(*(.mips.machines.init))
>> 125 __mips_machines_end = .;
>> 126 }
87 127
88 /* Page aligned */ !! 128 /* .exit.text is discarded at runtime, not link time, to deal with
89 INIT_TEXT_SECTION(PAGE_SIZE) !! 129 * references from .rodata
>> 130 */
>> 131 .exit.text : {
>> 132 EXIT_TEXT
>> 133 }
>> 134 .exit.data : {
>> 135 EXIT_DATA
>> 136 }
>> 137 #ifdef CONFIG_SMP
>> 138 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
>> 139 #endif
90 140
91 /* Align __setup_start on 16 byte boun !! 141 #ifdef CONFIG_MIPS_ELF_APPENDED_DTB
92 INIT_DATA_SECTION(16) !! 142 .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
>> 143 *(.appended_dtb)
>> 144 KEEP(*(.appended_dtb))
>> 145 }
>> 146 #endif
93 147
94 PERCPU_SECTION(L1_CACHE_BYTES) !! 148 #ifdef CONFIG_RELOCATABLE
>> 149 . = ALIGN(4);
95 150
96 __init_end = .; !! 151 .data.reloc : {
>> 152 _relocation_start = .;
>> 153 /*
>> 154 * Space for relocation table
>> 155 * This needs to be filled so that the
>> 156 * relocs tool can overwrite the content.
>> 157 * An invalid value is left at the start of the
>> 158 * section to abort relocation if the table
>> 159 * has not been filled in.
>> 160 */
>> 161 LONG(0xFFFFFFFF);
>> 162 FILL(0);
>> 163 . += CONFIG_RELOCATION_TABLE_SIZE - 4;
>> 164 _relocation_end = .;
>> 165 }
>> 166 #endif
97 167
98 BSS_SECTION(0, 0, 0x20) !! 168 #ifdef CONFIG_MIPS_RAW_APPENDED_DTB
>> 169 __appended_dtb = .;
>> 170 /* leave space for appended DTB */
>> 171 . += 0x100000;
>> 172 #endif
>> 173 /*
>> 174 * Align to 64K in attempt to eliminate holes before the
>> 175 * .bss..swapper_pg_dir section at the start of .bss. This
>> 176 * also satisfies PAGE_SIZE alignment as the largest page size
>> 177 * allowed is 64K.
>> 178 */
>> 179 . = ALIGN(0x10000);
>> 180 __init_end = .;
>> 181 /* freed after init ends here */
>> 182
>> 183 /*
>> 184 * Force .bss to 64K alignment so that .bss..swapper_pg_dir
>> 185 * gets that alignment. .sbss should be empty, so there will be
>> 186 * no holes after __init_end. */
>> 187 BSS_SECTION(0, 0x10000, 8)
>> 188
>> 189 _end = . ;
>> 190
>> 191 /* These mark the ABI of the kernel for debuggers. */
>> 192 .mdebug.abi32 : {
>> 193 KEEP(*(.mdebug.abi32))
>> 194 }
>> 195 .mdebug.abi64 : {
>> 196 KEEP(*(.mdebug.abi64))
>> 197 }
99 198
100 _end = .; !! 199 /* This is the MIPS specific mdebug section. */
>> 200 .mdebug : {
>> 201 *(.mdebug)
>> 202 }
101 203
102 /* Throw in the debugging sections */ <<
103 STABS_DEBUG 204 STABS_DEBUG
104 DWARF_DEBUG 205 DWARF_DEBUG
105 ELF_DETAILS 206 ELF_DETAILS
106 207
107 /* Sections to be discarded -- must be !! 208 /* These must appear regardless of . */
>> 209 .gptab.sdata : {
>> 210 *(.gptab.data)
>> 211 *(.gptab.sdata)
>> 212 }
>> 213 .gptab.sbss : {
>> 214 *(.gptab.bss)
>> 215 *(.gptab.sbss)
>> 216 }
>> 217
>> 218 /* Sections to be discarded */
108 DISCARDS 219 DISCARDS
>> 220 /DISCARD/ : {
>> 221 /* ABI crap starts here */
>> 222 *(.MIPS.abiflags)
>> 223 *(.MIPS.options)
>> 224 *(.options)
>> 225 *(.pdr)
>> 226 *(.reginfo)
>> 227 }
109 } 228 }
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