1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 # !! 2
3 config LIGHTWEIGHT_SPINLOCK_CHECK !! 3 config TRACE_IRQFLAGS_SUPPORT
4 bool "Enable lightweight spinlock chec !! 4 bool
5 depends on DEBUG_KERNEL && SMP && !DEB !! 5 default y
>> 6
>> 7 config EARLY_PRINTK
>> 8 bool "Early printk" if EXPERT
>> 9 depends on SYS_HAS_EARLY_PRINTK
>> 10 default y
>> 11 help
>> 12 This option enables special console drivers which allow the kernel
>> 13 to print messages very early in the bootup process.
>> 14
>> 15 This is useful for kernel debugging when your machine crashes very
>> 16 early before the console code is initialized. For normal operation,
>> 17 it is not recommended because it looks ugly on some machines and
>> 18 doesn't cooperate with an X server. You should normally say N here,
>> 19 unless you want to debug such a crash.
>> 20
>> 21 config EARLY_PRINTK_8250
>> 22 bool
>> 23 depends on EARLY_PRINTK && USE_GENERIC_EARLY_PRINTK_8250
6 default y 24 default y
7 help 25 help
8 Add checks with low performance impa !! 26 "8250/16550 and compatible serial early printk driver"
9 to catch memory overwrites at runtim !! 27 If you say Y here, it will be possible to use a 8250/16550 serial
10 spinlock debugging you should choose !! 28 port as the boot console.
11 which will detect unitialized spinlo !! 29
12 If unsure say Y here. !! 30 config USE_GENERIC_EARLY_PRINTK_8250
13 !! 31 bool
14 config TLB_PTLOCK !! 32
15 bool "Use page table locks in TLB faul !! 33 config CMDLINE_BOOL
16 depends on DEBUG_KERNEL && SMP !! 34 bool "Built-in kernel command line"
>> 35 default n
>> 36 help
>> 37 For most systems, it is firmware or second stage bootloader that
>> 38 by default specifies the kernel command line options. However,
>> 39 it might be necessary or advantageous to either override the
>> 40 default kernel command line or add a few extra options to it.
>> 41 For such cases, this option allows you to hardcode your own
>> 42 command line options directly into the kernel. For that, you
>> 43 should choose 'Y' here, and fill in the extra boot arguments
>> 44 in CONFIG_CMDLINE.
>> 45
>> 46 The built-in options will be concatenated to the default command
>> 47 line if CMDLINE_OVERRIDE is set to 'N'. Otherwise, the default
>> 48 command line will be ignored and replaced by the built-in string.
>> 49
>> 50 Most MIPS systems will normally expect 'N' here and rely upon
>> 51 the command line from the firmware or the second-stage bootloader.
>> 52
>> 53 config CMDLINE
>> 54 string "Default kernel command string"
>> 55 depends on CMDLINE_BOOL
>> 56 default ""
>> 57 help
>> 58 On some platforms, there is currently no way for the boot loader to
>> 59 pass arguments to the kernel. For these platforms, and for the cases
>> 60 when you want to add some extra options to the command line or ignore
>> 61 the default command line, you can supply some command-line options at
>> 62 build time by entering them here. In other cases you can specify
>> 63 kernel args so that you don't have to set them up in board prom
>> 64 initialization routines.
>> 65
>> 66 For more information, see the CMDLINE_BOOL and CMDLINE_OVERRIDE
>> 67 options.
>> 68
>> 69 config CMDLINE_OVERRIDE
>> 70 bool "Built-in command line overrides firmware arguments"
>> 71 default n
>> 72 depends on CMDLINE_BOOL
>> 73 help
>> 74 By setting this option to 'Y' you will have your kernel ignore
>> 75 command line arguments from firmware or second stage bootloader.
>> 76 Instead, the built-in command line will be used exclusively.
>> 77
>> 78 Normally, you will choose 'N' here.
>> 79
>> 80 config SB1XXX_CORELIS
>> 81 bool "Corelis Debugger"
>> 82 depends on SIBYTE_SB1xxx_SOC
>> 83 select DEBUG_INFO if !COMPILE_TEST
>> 84 help
>> 85 Select compile flags that produce code that can be processed by the
>> 86 Corelis mksym utility and UDB Emulator.
>> 87
>> 88 config DEBUG_ZBOOT
>> 89 bool "Enable compressed kernel support debugging"
>> 90 depends on DEBUG_KERNEL && SYS_SUPPORTS_ZBOOT
>> 91 default n
>> 92 help
>> 93 If you want to add compressed kernel support to a new board, and the
>> 94 board supports uart16550 compatible serial port, please select
>> 95 SYS_SUPPORTS_ZBOOT_UART16550 for your board and enable this option to
>> 96 debug it.
>> 97
>> 98 If your board doesn't support uart16550 compatible serial port, you
>> 99 can try to select SYS_SUPPORTS_ZBOOT and use the other methods to
>> 100 debug it. for example, add a new serial port support just as
>> 101 arch/mips/boot/compressed/uart-16550.c does.
>> 102
>> 103 After the compressed kernel support works, please disable this option
>> 104 to reduce the kernel image size and speed up the booting procedure a
>> 105 little.
>> 106
>> 107 config SPINLOCK_TEST
>> 108 bool "Enable spinlock timing tests in debugfs"
>> 109 depends on DEBUG_FS
17 default n 110 default n
18 help 111 help
19 Select this option to enable page ta !! 112 Add several files to the debugfs to test spinlock speed.
20 fault handler. This ensures that pag !! 113
21 updated consistently on SMP machines !! 114 config SCACHE_DEBUGFS
22 loss in performance. !! 115 bool "L2 cache debugfs entries"
>> 116 depends on DEBUG_FS
>> 117 help
>> 118 Enable this to allow parts of the L2 cache configuration, such as
>> 119 whether or not prefetching is enabled, to be exposed to userland
>> 120 via debugfs.
>> 121
>> 122 If unsure, say N.
>> 123
>> 124 menuconfig MIPS_CPS_NS16550_BOOL
>> 125 bool "CPS SMP NS16550 UART output"
>> 126 depends on MIPS_CPS
>> 127 help
>> 128 Output debug information via an ns16550 compatible UART if exceptions
>> 129 occur early in the boot process of a secondary core.
>> 130
>> 131 if MIPS_CPS_NS16550_BOOL
>> 132
>> 133 config MIPS_CPS_NS16550
>> 134 def_bool MIPS_CPS_NS16550_BASE != 0
>> 135
>> 136 config MIPS_CPS_NS16550_BASE
>> 137 hex "UART Base Address"
>> 138 default 0x1b0003f8 if MIPS_MALTA
>> 139 default 0
>> 140 help
>> 141 The base address of the ns16550 compatible UART on which to output
>> 142 debug information from the early stages of core startup.
>> 143
>> 144 This is only used if non-zero.
>> 145
>> 146 config MIPS_CPS_NS16550_SHIFT
>> 147 int "UART Register Shift"
>> 148 default 0
>> 149 help
>> 150 The number of bits to shift ns16550 register indices by in order to
>> 151 form their addresses. That is, log base 2 of the span between
>> 152 adjacent ns16550 registers in the system.
23 153
>> 154 endif # MIPS_CPS_NS16550_BOOL
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